acpi_cpu.c revision 141238
1/*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_cpu.c 141238 2005-02-04 05:36:40Z njl $"); 30 31#include "opt_acpi.h" 32#include <sys/param.h> 33#include <sys/bus.h> 34#include <sys/cpu.h> 35#include <sys/kernel.h> 36#include <sys/malloc.h> 37#include <sys/module.h> 38#include <sys/pcpu.h> 39#include <sys/power.h> 40#include <sys/proc.h> 41#include <sys/sbuf.h> 42#include <sys/smp.h> 43 44#include <dev/pci/pcivar.h> 45#include <machine/atomic.h> 46#include <machine/bus.h> 47#include <sys/rman.h> 48 49#include "acpi.h" 50#include <dev/acpica/acpivar.h> 51 52/* 53 * Support for ACPI Processor devices, including ACPI 2.0 throttling 54 * and C[1-3] sleep states. 55 * 56 * TODO: implement scans of all CPUs to be sure all Cx states are 57 * equivalent. 58 */ 59 60/* Hooks for the ACPI CA debugging infrastructure */ 61#define _COMPONENT ACPI_PROCESSOR 62ACPI_MODULE_NAME("PROCESSOR") 63 64struct acpi_cx { 65 struct resource *p_lvlx; /* Register to read to enter state. */ 66 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 67 uint32_t trans_lat; /* Transition latency (usec). */ 68 uint32_t power; /* Power consumed (mW). */ 69}; 70#define MAX_CX_STATES 8 71 72struct acpi_cpu_softc { 73 device_t cpu_dev; 74 ACPI_HANDLE cpu_handle; 75 struct pcpu *cpu_pcpu; 76 uint32_t cpu_acpi_id; /* ACPI processor id */ 77 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 78 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 79 struct resource *cpu_p_cnt; /* Throttling control register */ 80 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 81 int cpu_cx_count; /* Number of valid Cx states. */ 82 int cpu_prev_sleep;/* Last idle sleep duration. */ 83}; 84 85struct acpi_cpu_device { 86 struct resource_list ad_rl; 87}; 88 89#define CPU_GET_REG(reg, width) \ 90 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 91 rman_get_bushandle((reg)), 0)) 92#define CPU_SET_REG(reg, width, val) \ 93 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 94 rman_get_bushandle((reg)), 0, (val))) 95 96/* 97 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 98 * reported to the user in tenths of a percent. 99 */ 100static uint32_t cpu_duty_offset; 101static uint32_t cpu_duty_width; 102#define CPU_MAX_SPEED (1 << cpu_duty_width) 103#define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED) 104#define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 105 (CPU_SPEED_PERCENT(x) % 10) 106#define CPU_P_CNT_THT_EN (1<<4) 107#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 108 109#define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 110#define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 111 112#define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 113#define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */ 114#define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 115 116#define PCI_VENDOR_INTEL 0x8086 117#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 118#define PCI_REVISION_A_STEP 0 119#define PCI_REVISION_B_STEP 1 120#define PCI_REVISION_4E 2 121#define PCI_REVISION_4M 3 122 123/* Platform hardware resource information. */ 124static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 125static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */ 126static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 127static int cpu_rid; /* Driver-wide resource id. */ 128static int cpu_quirks; /* Indicate any hardware bugs. */ 129 130/* Runtime state. */ 131static int cpu_cx_count; /* Number of valid states */ 132static int cpu_non_c3; /* Index of lowest non-C3 state. */ 133static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 134 135/* Values for sysctl. */ 136static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 137static struct sysctl_oid *acpi_cpu_sysctl_tree; 138static uint32_t cpu_throttle_state; 139static uint32_t cpu_throttle_max; 140static int cpu_cx_lowest; 141static char cpu_cx_supported[64]; 142 143static device_t *cpu_devices; 144static int cpu_ndevices; 145static struct acpi_cpu_softc **cpu_softc; 146ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 147 148static int acpi_cpu_probe(device_t dev); 149static int acpi_cpu_attach(device_t dev); 150static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 151 uint32_t *cpu_id); 152static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 153static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 154 int unit); 155static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 156 uintptr_t *result); 157static int acpi_cpu_shutdown(device_t dev); 158static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc); 159static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 160static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 161static void acpi_cpu_startup(void *arg); 162static void acpi_cpu_startup_throttling(void); 163static void acpi_cpu_startup_cx(void); 164static void acpi_cpu_throttle_set(uint32_t speed); 165static void acpi_cpu_idle(void); 166static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 167static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 168static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS); 169static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 170static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 171 172static device_method_t acpi_cpu_methods[] = { 173 /* Device interface */ 174 DEVMETHOD(device_probe, acpi_cpu_probe), 175 DEVMETHOD(device_attach, acpi_cpu_attach), 176 DEVMETHOD(device_detach, bus_generic_detach), 177 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 178 DEVMETHOD(device_suspend, bus_generic_suspend), 179 DEVMETHOD(device_resume, bus_generic_resume), 180 181 /* Bus interface */ 182 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 183 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 184 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 185 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 186 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 187 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 188 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 189 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 190 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 191 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 192 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 193 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 194 195 {0, 0} 196}; 197 198static driver_t acpi_cpu_driver = { 199 "cpu", 200 acpi_cpu_methods, 201 sizeof(struct acpi_cpu_softc), 202}; 203 204extern devclass_t cpu_devclass; 205DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, cpu_devclass, 0, 0); 206MODULE_DEPEND(cpu, acpi, 1, 1, 1); 207 208static int 209acpi_cpu_probe(device_t dev) 210{ 211 int acpi_id, cpu_id, cx_count; 212 ACPI_BUFFER buf; 213 ACPI_HANDLE handle; 214 char msg[32]; 215 ACPI_OBJECT *obj; 216 ACPI_STATUS status; 217 218 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 219 return (ENXIO); 220 221 handle = acpi_get_handle(dev); 222 if (cpu_softc == NULL) 223 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 224 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 225 226 /* Get our Processor object. */ 227 buf.Pointer = NULL; 228 buf.Length = ACPI_ALLOCATE_BUFFER; 229 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 230 if (ACPI_FAILURE(status)) { 231 device_printf(dev, "probe failed to get Processor obj - %s\n", 232 AcpiFormatException(status)); 233 return (ENXIO); 234 } 235 obj = (ACPI_OBJECT *)buf.Pointer; 236 if (obj->Type != ACPI_TYPE_PROCESSOR) { 237 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 238 AcpiOsFree(obj); 239 return (ENXIO); 240 } 241 242 /* 243 * Find the processor associated with our unit. We could use the 244 * ProcId as a key, however, some boxes do not have the same values 245 * in their Processor object as the ProcId values in the MADT. 246 */ 247 acpi_id = obj->Processor.ProcId; 248 AcpiOsFree(obj); 249 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 250 return (ENXIO); 251 252 /* 253 * Check if we already probed this processor. We scan the bus twice 254 * so it's possible we've already seen this one. 255 */ 256 if (cpu_softc[cpu_id] != NULL) 257 return (ENXIO); 258 259 /* Get a count of Cx states for our device string. */ 260 cx_count = 0; 261 buf.Pointer = NULL; 262 buf.Length = ACPI_ALLOCATE_BUFFER; 263 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf); 264 if (ACPI_SUCCESS(status)) { 265 obj = (ACPI_OBJECT *)buf.Pointer; 266 if (ACPI_PKG_VALID(obj, 2)) 267 acpi_PkgInt32(obj, 0, &cx_count); 268 AcpiOsFree(obj); 269 } else { 270 if (AcpiGbl_FADT->Plvl2Lat <= 100) 271 cx_count++; 272 if (AcpiGbl_FADT->Plvl3Lat <= 1000) 273 cx_count++; 274 if (cx_count > 0) 275 cx_count++; 276 } 277 if (cx_count > 0) 278 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count); 279 else 280 strlcpy(msg, "ACPI CPU", sizeof(msg)); 281 device_set_desc_copy(dev, msg); 282 283 /* Mark this processor as in-use and save our derived id for attach. */ 284 cpu_softc[cpu_id] = (void *)1; 285 acpi_set_magic(dev, cpu_id); 286 287 return (0); 288} 289 290static int 291acpi_cpu_attach(device_t dev) 292{ 293 ACPI_BUFFER buf; 294 ACPI_OBJECT *obj; 295 struct pcpu *pcpu_data; 296 struct acpi_cpu_softc *sc; 297 struct acpi_softc *acpi_sc; 298 ACPI_STATUS status; 299 int cx_ret, cpu_id, thr_ret; 300 301 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 302 303 sc = device_get_softc(dev); 304 sc->cpu_dev = dev; 305 sc->cpu_handle = acpi_get_handle(dev); 306 cpu_id = acpi_get_magic(dev); 307 cpu_softc[cpu_id] = sc; 308 pcpu_data = pcpu_find(cpu_id); 309 pcpu_data->pc_device = dev; 310 sc->cpu_pcpu = pcpu_data; 311 312 buf.Pointer = NULL; 313 buf.Length = ACPI_ALLOCATE_BUFFER; 314 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 315 if (ACPI_FAILURE(status)) { 316 device_printf(dev, "attach failed to get Processor obj - %s\n", 317 AcpiFormatException(status)); 318 return (ENXIO); 319 } 320 obj = (ACPI_OBJECT *)buf.Pointer; 321 sc->cpu_p_blk = obj->Processor.PblkAddress; 322 sc->cpu_p_blk_len = obj->Processor.PblkLength; 323 sc->cpu_acpi_id = obj->Processor.ProcId; 324 AcpiOsFree(obj); 325 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 326 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 327 328 acpi_sc = acpi_device_get_parent_softc(dev); 329 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 330 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 331 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 332 CTLFLAG_RD, 0, ""); 333 334 /* 335 * Probe for throttling and Cx state support. 336 * If none of these is present, free up unused resources. 337 */ 338 thr_ret = acpi_cpu_throttle_probe(sc); 339 cx_ret = acpi_cpu_cx_probe(sc); 340 if (thr_ret == 0 || cx_ret == 0) { 341 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 342 acpi_cpu_notify, sc); 343 if (device_get_unit(dev) == 0) 344 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 345 } else { 346 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 347 } 348 349 /* Call identify and then probe/attach for cpu child drivers. */ 350 bus_generic_probe(dev); 351 bus_generic_attach(dev); 352 353 return (0); 354} 355 356/* 357 * Find the nth present CPU and return its pc_cpuid as well as set the 358 * pc_acpi_id from the most reliable source. 359 */ 360static int 361acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 362{ 363 struct pcpu *pcpu_data; 364 uint32_t i; 365 366 KASSERT(acpi_id != NULL, ("Null acpi_id")); 367 KASSERT(cpu_id != NULL, ("Null cpu_id")); 368 for (i = 0; i <= mp_maxid; i++) { 369 if (CPU_ABSENT(i)) 370 continue; 371 pcpu_data = pcpu_find(i); 372 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 373 if (idx-- == 0) { 374 /* 375 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 376 * override it with the value from the ASL. Otherwise, if the 377 * two don't match, prefer the MADT-derived value. Finally, 378 * return the pc_cpuid to reference this processor. 379 */ 380 if (pcpu_data->pc_acpi_id == 0xffffffff) 381 pcpu_data->pc_acpi_id = *acpi_id; 382 else if (pcpu_data->pc_acpi_id != *acpi_id) 383 *acpi_id = pcpu_data->pc_acpi_id; 384 *cpu_id = pcpu_data->pc_cpuid; 385 return (0); 386 } 387 } 388 389 return (ESRCH); 390} 391 392static struct resource_list * 393acpi_cpu_get_rlist(device_t dev, device_t child) 394{ 395 struct acpi_cpu_device *ad; 396 397 ad = device_get_ivars(child); 398 if (ad == NULL) 399 return (NULL); 400 return (&ad->ad_rl); 401} 402 403static device_t 404acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 405{ 406 struct acpi_cpu_device *ad; 407 device_t child; 408 409 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 410 return (NULL); 411 412 resource_list_init(&ad->ad_rl); 413 414 child = device_add_child_ordered(dev, order, name, unit); 415 if (child != NULL) 416 device_set_ivars(child, ad); 417 return (child); 418} 419 420static int 421acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 422{ 423 struct acpi_cpu_softc *sc; 424 425 sc = device_get_softc(dev); 426 switch (index) { 427 case ACPI_IVAR_HANDLE: 428 *result = (uintptr_t)sc->cpu_handle; 429 break; 430 case CPU_IVAR_PCPU: 431 *result = (uintptr_t)sc->cpu_pcpu; 432 break; 433 default: 434 return (ENOENT); 435 } 436 return (0); 437} 438 439static int 440acpi_cpu_shutdown(device_t dev) 441{ 442 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 443 444 /* Allow children to shutdown first. */ 445 bus_generic_shutdown(dev); 446 447 /* Disable any entry to the idle function. */ 448 cpu_cx_count = 0; 449 450 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 451 smp_rendezvous(NULL, NULL, NULL, NULL); 452 453 return_VALUE (0); 454} 455 456static int 457acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc) 458{ 459 uint32_t duty_end; 460 ACPI_BUFFER buf; 461 ACPI_OBJECT obj; 462 ACPI_GENERIC_ADDRESS gas; 463 ACPI_STATUS status; 464 465 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 466 467 /* Get throttling parameters from the FADT. 0 means not supported. */ 468 if (device_get_unit(sc->cpu_dev) == 0) { 469 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 470 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt; 471 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 472 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 473 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 474 } 475 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 476 return (ENXIO); 477 478 /* Validate the duty offset/width. */ 479 duty_end = cpu_duty_offset + cpu_duty_width - 1; 480 if (duty_end > 31) { 481 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n"); 482 return (ENXIO); 483 } 484 if (cpu_duty_offset <= 4 && duty_end >= 4) { 485 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n"); 486 return (ENXIO); 487 } 488 489 /* 490 * If not present, fall back to using the processor's P_BLK to find 491 * the P_CNT register. 492 * 493 * Note that some systems seem to duplicate the P_BLK pointer 494 * across multiple CPUs, so not getting the resource is not fatal. 495 */ 496 buf.Pointer = &obj; 497 buf.Length = sizeof(obj); 498 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 499 if (ACPI_SUCCESS(status)) { 500 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 501 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 502 return (ENXIO); 503 } 504 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 505 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 506 if (sc->cpu_p_cnt != NULL) { 507 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n", 508 device_get_unit(sc->cpu_dev))); 509 } 510 } 511 512 /* If _PTC not present or other failure, try the P_BLK. */ 513 if (sc->cpu_p_cnt == NULL) { 514 /* 515 * The spec says P_BLK must be 6 bytes long. However, some 516 * systems use it to indicate a fractional set of features 517 * present so we take anything >= 4. 518 */ 519 if (sc->cpu_p_blk_len < 4) 520 return (ENXIO); 521 gas.Address = sc->cpu_p_blk; 522 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 523 gas.RegisterBitWidth = 32; 524 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 525 if (sc->cpu_p_cnt != NULL) { 526 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n", 527 device_get_unit(sc->cpu_dev))); 528 } else { 529 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n"); 530 return (ENXIO); 531 } 532 } 533 cpu_rid++; 534 535 return (0); 536} 537 538static int 539acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 540{ 541 ACPI_GENERIC_ADDRESS gas; 542 struct acpi_cx *cx_ptr; 543 int error; 544 545 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 546 547 /* 548 * Bus mastering arbitration control is needed to keep caches coherent 549 * while sleeping in C3. If it's not present but a working flush cache 550 * instruction is present, flush the caches before entering C3 instead. 551 * Otherwise, just disable C3 completely. 552 */ 553 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 554 if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) { 555 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 556 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 557 "acpi_cpu%d: no BM control, using flush cache method\n", 558 device_get_unit(sc->cpu_dev))); 559 } else { 560 cpu_quirks |= CPU_QUIRK_NO_C3; 561 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 562 "acpi_cpu%d: no BM control, C3 not available\n", 563 device_get_unit(sc->cpu_dev))); 564 } 565 } 566 567 /* 568 * First, check for the ACPI 2.0 _CST sleep states object. 569 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 570 */ 571 sc->cpu_cx_count = 0; 572 error = acpi_cpu_cx_cst(sc); 573 if (error != 0) { 574 cx_ptr = sc->cpu_cx_states; 575 576 /* C1 has been required since just after ACPI 1.0 */ 577 cx_ptr->type = ACPI_STATE_C1; 578 cx_ptr->trans_lat = 0; 579 cpu_non_c3 = 0; 580 cx_ptr++; 581 sc->cpu_cx_count++; 582 583 /* 584 * The spec says P_BLK must be 6 bytes long. However, some systems 585 * use it to indicate a fractional set of features present so we 586 * take 5 as C2. Some may also have a value of 7 to indicate 587 * another C3 but most use _CST for this (as required) and having 588 * "only" C1-C3 is not a hardship. 589 */ 590 if (sc->cpu_p_blk_len < 5) 591 goto done; 592 593 /* Validate and allocate resources for C2 (P_LVL2). */ 594 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 595 gas.RegisterBitWidth = 8; 596 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 597 gas.Address = sc->cpu_p_blk + 4; 598 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 599 if (cx_ptr->p_lvlx != NULL) { 600 cpu_rid++; 601 cx_ptr->type = ACPI_STATE_C2; 602 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 603 cpu_non_c3 = 1; 604 cx_ptr++; 605 sc->cpu_cx_count++; 606 } 607 } 608 if (sc->cpu_p_blk_len < 6) 609 goto done; 610 611 /* Validate and allocate resources for C3 (P_LVL3). */ 612 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 613 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 614 615 gas.Address = sc->cpu_p_blk + 5; 616 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas); 617 if (cx_ptr->p_lvlx != NULL) { 618 cpu_rid++; 619 cx_ptr->type = ACPI_STATE_C3; 620 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 621 cx_ptr++; 622 sc->cpu_cx_count++; 623 } 624 } 625 } 626 627done: 628 /* If no valid registers were found, don't attach. */ 629 if (sc->cpu_cx_count == 0) 630 return (ENXIO); 631 632 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 633 sc->cpu_prev_sleep = 1000000; 634 635 return (0); 636} 637 638/* 639 * Parse a _CST package and set up its Cx states. Since the _CST object 640 * can change dynamically, our notify handler may call this function 641 * to clean up and probe the new _CST package. 642 */ 643static int 644acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 645{ 646 struct acpi_cx *cx_ptr; 647 ACPI_STATUS status; 648 ACPI_BUFFER buf; 649 ACPI_OBJECT *top; 650 ACPI_OBJECT *pkg; 651 uint32_t count; 652 int i; 653 654 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 655 656 buf.Pointer = NULL; 657 buf.Length = ACPI_ALLOCATE_BUFFER; 658 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 659 if (ACPI_FAILURE(status)) 660 return (ENXIO); 661 662 /* _CST is a package with a count and at least one Cx package. */ 663 top = (ACPI_OBJECT *)buf.Pointer; 664 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 665 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 666 AcpiOsFree(buf.Pointer); 667 return (ENXIO); 668 } 669 if (count != top->Package.Count - 1) { 670 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 671 count, top->Package.Count - 1); 672 count = top->Package.Count - 1; 673 } 674 if (count > MAX_CX_STATES) { 675 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 676 count = MAX_CX_STATES; 677 } 678 679 /* Set up all valid states. */ 680 sc->cpu_cx_count = 0; 681 cx_ptr = sc->cpu_cx_states; 682 for (i = 0; i < count; i++) { 683 pkg = &top->Package.Elements[i + 1]; 684 if (!ACPI_PKG_VALID(pkg, 4) || 685 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 686 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 687 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 688 689 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 690 continue; 691 } 692 693 /* Validate the state to see if we should use it. */ 694 switch (cx_ptr->type) { 695 case ACPI_STATE_C1: 696 cpu_non_c3 = i; 697 cx_ptr++; 698 sc->cpu_cx_count++; 699 continue; 700 case ACPI_STATE_C2: 701 if (cx_ptr->trans_lat > 100) { 702 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 703 "acpi_cpu%d: C2[%d] not available.\n", 704 device_get_unit(sc->cpu_dev), i)); 705 continue; 706 } 707 cpu_non_c3 = i; 708 break; 709 case ACPI_STATE_C3: 710 default: 711 if (cx_ptr->trans_lat > 1000 || 712 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 713 714 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 715 "acpi_cpu%d: C3[%d] not available.\n", 716 device_get_unit(sc->cpu_dev), i)); 717 continue; 718 } 719 break; 720 } 721 722#ifdef notyet 723 /* Free up any previous register. */ 724 if (cx_ptr->p_lvlx != NULL) { 725 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 726 cx_ptr->p_lvlx = NULL; 727 } 728#endif 729 730 /* Allocate the control register for C2 or C3. */ 731 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx); 732 if (cx_ptr->p_lvlx != NULL) { 733 cpu_rid++; 734 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 735 "acpi_cpu%d: Got C%d - %d latency\n", 736 device_get_unit(sc->cpu_dev), cx_ptr->type, 737 cx_ptr->trans_lat)); 738 cx_ptr++; 739 sc->cpu_cx_count++; 740 } 741 } 742 AcpiOsFree(buf.Pointer); 743 744 return (0); 745} 746 747/* 748 * Call this *after* all CPUs have been attached. 749 */ 750static void 751acpi_cpu_startup(void *arg) 752{ 753 struct acpi_cpu_softc *sc; 754 int count, i; 755 756 /* Get set of CPU devices */ 757 devclass_get_devices(cpu_devclass, &cpu_devices, &cpu_ndevices); 758 759 /* Check for quirks via the first CPU device. */ 760 sc = device_get_softc(cpu_devices[0]); 761 acpi_cpu_quirks(sc); 762 763 /* 764 * Make sure all the processors' Cx counts match. We should probably 765 * also check the contents of each. However, no known systems have 766 * non-matching Cx counts so we'll deal with this later. 767 */ 768 count = MAX_CX_STATES; 769 for (i = 0; i < cpu_ndevices; i++) { 770 sc = device_get_softc(cpu_devices[i]); 771 count = min(sc->cpu_cx_count, count); 772 } 773 cpu_cx_count = count; 774 775 /* Perform throttling and Cx final initialization. */ 776 sc = device_get_softc(cpu_devices[0]); 777 if (sc->cpu_p_cnt != NULL) 778 acpi_cpu_startup_throttling(); 779 if (cpu_cx_count > 0) 780 acpi_cpu_startup_cx(); 781} 782 783/* 784 * Takes the ACPI lock to avoid fighting anyone over the SMI command 785 * port. 786 */ 787static void 788acpi_cpu_startup_throttling() 789{ 790 791 /* If throttling is not usable, don't initialize it. */ 792 if (cpu_quirks & CPU_QUIRK_NO_THROTTLE) 793 return; 794 795 /* Initialise throttling states */ 796 cpu_throttle_max = CPU_MAX_SPEED; 797 cpu_throttle_state = CPU_MAX_SPEED; 798 799 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx, 800 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 801 OID_AUTO, "throttle_max", CTLFLAG_RD, 802 &cpu_throttle_max, 0, "maximum CPU speed"); 803 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 804 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 805 OID_AUTO, "throttle_state", 806 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state, 807 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed"); 808 809 /* If ACPI 2.0+, signal platform that we are taking over throttling. */ 810 if (cpu_pstate_cnt != 0) { 811 ACPI_LOCK(acpi); 812 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8); 813 ACPI_UNLOCK(acpi); 814 } 815 816 /* Set initial speed to maximum. */ 817 ACPI_SERIAL_BEGIN(cpu); 818 acpi_cpu_throttle_set(cpu_throttle_max); 819 ACPI_SERIAL_END(cpu); 820 821 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), " 822 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1), 823 CPU_SPEED_PRINTABLE(cpu_throttle_state)); 824} 825 826static void 827acpi_cpu_startup_cx() 828{ 829 struct acpi_cpu_softc *sc; 830 struct sbuf sb; 831 int i; 832 833 /* 834 * Set up the list of Cx states, eliminating C3 states by truncating 835 * cpu_cx_count if quirks indicate C3 is not usable. 836 */ 837 sc = device_get_softc(cpu_devices[0]); 838 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 839 for (i = 0; i < cpu_cx_count; i++) { 840 if ((cpu_quirks & CPU_QUIRK_NO_C3) == 0 || 841 sc->cpu_cx_states[i].type != ACPI_STATE_C3) 842 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 843 else 844 cpu_cx_count = i; 845 } 846 sbuf_trim(&sb); 847 sbuf_finish(&sb); 848 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 849 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 850 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 851 0, "Cx/microsecond values for supported Cx states"); 852 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 853 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 854 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 855 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 856 "lowest Cx sleep state to use"); 857 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 858 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 859 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 860 NULL, 0, acpi_cpu_usage_sysctl, "A", 861 "percent usage for each Cx state"); 862 863#ifdef notyet 864 /* Signal platform that we can handle _CST notification. */ 865 if (cpu_cst_cnt != 0) { 866 ACPI_LOCK(acpi); 867 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 868 ACPI_UNLOCK(acpi); 869 } 870#endif 871 872 /* Take over idling from cpu_idle_default(). */ 873 cpu_idle_hook = acpi_cpu_idle; 874} 875 876/* 877 * Set CPUs to the new state. 878 * 879 * Must be called with the ACPI lock held. 880 */ 881static void 882acpi_cpu_throttle_set(uint32_t speed) 883{ 884 struct acpi_cpu_softc *sc; 885 int i; 886 uint32_t p_cnt, clk_val; 887 888 ACPI_SERIAL_ASSERT(cpu); 889 890 /* Iterate over processors */ 891 for (i = 0; i < cpu_ndevices; i++) { 892 sc = device_get_softc(cpu_devices[i]); 893 if (sc->cpu_p_cnt == NULL) 894 continue; 895 896 /* Get the current P_CNT value and disable throttling */ 897 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4); 898 p_cnt &= ~CPU_P_CNT_THT_EN; 899 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 900 901 /* If we're at maximum speed, that's all */ 902 if (speed < CPU_MAX_SPEED) { 903 /* Mask the old CLK_VAL off and or-in the new value */ 904 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 905 p_cnt &= ~clk_val; 906 p_cnt |= (speed << cpu_duty_offset); 907 908 /* Write the new P_CNT value and then enable throttling */ 909 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 910 p_cnt |= CPU_P_CNT_THT_EN; 911 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 912 } 913 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev), 914 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed)); 915 } 916 cpu_throttle_state = speed; 917} 918 919/* 920 * Idle the CPU in the lowest state possible. This function is called with 921 * interrupts disabled. Note that once it re-enables interrupts, a task 922 * switch can occur so do not access shared data (i.e. the softc) after 923 * interrupts are re-enabled. 924 */ 925static void 926acpi_cpu_idle() 927{ 928 struct acpi_cpu_softc *sc; 929 struct acpi_cx *cx_next; 930 uint32_t start_time, end_time; 931 int bm_active, cx_next_idx, i; 932 933 /* If disabled, return immediately. */ 934 if (cpu_cx_count == 0) { 935 ACPI_ENABLE_IRQS(); 936 return; 937 } 938 939 /* 940 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 941 * since there is no ACPI processor object for this CPU. This occurs 942 * for logical CPUs in the HTT case. 943 */ 944 sc = cpu_softc[PCPU_GET(cpuid)]; 945 if (sc == NULL) { 946 acpi_cpu_c1(); 947 return; 948 } 949 950 /* 951 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 952 * find the lowest state that has a latency less than or equal to 953 * the length of our last sleep. 954 */ 955 cx_next_idx = cpu_cx_lowest; 956 if (sc->cpu_prev_sleep < 100) 957 for (i = cpu_cx_lowest; i >= 0; i--) 958 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 959 cx_next_idx = i; 960 break; 961 } 962 963 /* 964 * Check for bus master activity. If there was activity, clear 965 * the bit and use the lowest non-C3 state. Note that the USB 966 * driver polling for new devices keeps this bit set all the 967 * time if USB is loaded. 968 */ 969 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 970 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 971 ACPI_MTX_DO_NOT_LOCK); 972 if (bm_active != 0) { 973 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 974 ACPI_MTX_DO_NOT_LOCK); 975 cx_next_idx = min(cx_next_idx, cpu_non_c3); 976 } 977 } 978 979 /* Select the next state and update statistics. */ 980 cx_next = &sc->cpu_cx_states[cx_next_idx]; 981 cpu_cx_stats[cx_next_idx]++; 982 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 983 984 /* 985 * Execute HLT (or equivalent) and wait for an interrupt. We can't 986 * calculate the time spent in C1 since the place we wake up is an 987 * ISR. Assume we slept one quantum and return. 988 */ 989 if (cx_next->type == ACPI_STATE_C1) { 990 sc->cpu_prev_sleep = 1000000 / hz; 991 acpi_cpu_c1(); 992 return; 993 } 994 995 /* 996 * For C3, disable bus master arbitration and enable bus master wake 997 * if BM control is available, otherwise flush the CPU cache. 998 */ 999 if (cx_next->type == ACPI_STATE_C3) { 1000 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 1001 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 1002 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, 1003 ACPI_MTX_DO_NOT_LOCK); 1004 } else 1005 ACPI_FLUSH_CPU_CACHE(); 1006 } 1007 1008 /* 1009 * Read from P_LVLx to enter C2(+), checking time spent asleep. 1010 * Use the ACPI timer for measuring sleep time. Since we need to 1011 * get the time very close to the CPU start/stop clock logic, this 1012 * is the only reliable time source. 1013 */ 1014 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 1015 CPU_GET_REG(cx_next->p_lvlx, 1); 1016 1017 /* 1018 * Read the end time twice. Since it may take an arbitrary time 1019 * to enter the idle state, the first read may be executed before 1020 * the processor has stopped. Doing it again provides enough 1021 * margin that we are certain to have a correct value. 1022 */ 1023 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 1024 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 1025 1026 /* Enable bus master arbitration and disable bus master wakeup. */ 1027 if (cx_next->type == ACPI_STATE_C3 && 1028 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 1029 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 1030 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 1031 } 1032 1033 /* Find the actual time asleep in microseconds, minus overhead. */ 1034 end_time = acpi_TimerDelta(end_time, start_time); 1035 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 1036 ACPI_ENABLE_IRQS(); 1037} 1038 1039/* 1040 * Re-evaluate the _PSS and _CST objects when we are notified that they 1041 * have changed. 1042 * 1043 * XXX Re-evaluation disabled until locking is done. 1044 */ 1045static void 1046acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 1047{ 1048 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 1049 1050 switch (notify) { 1051 case ACPI_CPU_NOTIFY_PERF_STATES: 1052 device_printf(sc->cpu_dev, "Performance states changed\n"); 1053 /* acpi_cpu_px_available(sc); */ 1054 break; 1055 case ACPI_CPU_NOTIFY_CX_STATES: 1056 device_printf(sc->cpu_dev, "Cx states changed\n"); 1057 /* acpi_cpu_cx_cst(sc); */ 1058 break; 1059 default: 1060 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify); 1061 break; 1062 } 1063} 1064 1065static int 1066acpi_cpu_quirks(struct acpi_cpu_softc *sc) 1067{ 1068 device_t acpi_dev; 1069 1070 /* 1071 * C3 on multiple CPUs requires using the expensive flush cache 1072 * instruction. 1073 */ 1074 if (mp_ncpus > 1) 1075 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1076 1077 /* Look for various quirks of the PIIX4 part. */ 1078 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1079 if (acpi_dev != NULL) { 1080 switch (pci_get_revid(acpi_dev)) { 1081 /* 1082 * Disable throttling control on PIIX4 A and B-step. 1083 * See specification changes #13 ("Manual Throttle Duty Cycle") 1084 * and #14 ("Enabling and Disabling Manual Throttle"), plus 1085 * erratum #5 ("STPCLK# Deassertion Time") from the January 1086 * 2002 PIIX4 specification update. Note that few (if any) 1087 * mobile systems ever used this part. 1088 */ 1089 case PCI_REVISION_A_STEP: 1090 case PCI_REVISION_B_STEP: 1091 cpu_quirks |= CPU_QUIRK_NO_THROTTLE; 1092 /* FALLTHROUGH */ 1093 /* 1094 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1095 * do not report the BMIDE status to the BM status register and 1096 * others have a livelock bug if Type-F DMA is enabled. Linux 1097 * works around the BMIDE bug by reading the BM status directly 1098 * but we take the simpler approach of disabling C3 for these 1099 * parts. 1100 * 1101 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1102 * Livelock") from the January 2002 PIIX4 specification update. 1103 * Applies to all PIIX4 models. 1104 */ 1105 case PCI_REVISION_4E: 1106 case PCI_REVISION_4M: 1107 cpu_quirks |= CPU_QUIRK_NO_C3; 1108 break; 1109 default: 1110 break; 1111 } 1112 } 1113 1114 return (0); 1115} 1116 1117/* Handle changes in the CPU throttling setting. */ 1118static int 1119acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS) 1120{ 1121 uint32_t *argp; 1122 uint32_t arg; 1123 int error; 1124 1125 argp = (uint32_t *)oidp->oid_arg1; 1126 arg = *argp; 1127 error = sysctl_handle_int(oidp, &arg, 0, req); 1128 1129 /* Error or no new value */ 1130 if (error != 0 || req->newptr == NULL) 1131 return (error); 1132 if (arg < 1 || arg > cpu_throttle_max) 1133 return (EINVAL); 1134 1135 /* If throttling changed, notify the BIOS of the new rate. */ 1136 ACPI_SERIAL_BEGIN(cpu); 1137 if (*argp != arg) { 1138 *argp = arg; 1139 acpi_cpu_throttle_set(arg); 1140 } 1141 ACPI_SERIAL_END(cpu); 1142 1143 return (0); 1144} 1145 1146static int 1147acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1148{ 1149 struct sbuf sb; 1150 char buf[128]; 1151 int i; 1152 uintmax_t fract, sum, whole; 1153 1154 sum = 0; 1155 for (i = 0; i < cpu_cx_count; i++) 1156 sum += cpu_cx_stats[i]; 1157 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1158 for (i = 0; i < cpu_cx_count; i++) { 1159 if (sum > 0) { 1160 whole = (uintmax_t)cpu_cx_stats[i] * 100; 1161 fract = (whole % sum) * 100; 1162 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1163 (u_int)(fract / sum)); 1164 } else 1165 sbuf_printf(&sb, "0%% "); 1166 } 1167 sbuf_trim(&sb); 1168 sbuf_finish(&sb); 1169 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1170 sbuf_delete(&sb); 1171 1172 return (0); 1173} 1174 1175static int 1176acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1177{ 1178 struct acpi_cpu_softc *sc; 1179 char state[8]; 1180 int val, error, i; 1181 1182 sc = device_get_softc(cpu_devices[0]); 1183 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1184 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1185 if (error != 0 || req->newptr == NULL) 1186 return (error); 1187 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1188 return (EINVAL); 1189 val = (int) strtol(state + 1, NULL, 10) - 1; 1190 if (val < 0 || val > cpu_cx_count - 1) 1191 return (EINVAL); 1192 1193 ACPI_SERIAL_BEGIN(cpu); 1194 cpu_cx_lowest = val; 1195 1196 /* If not disabling, cache the new lowest non-C3 state. */ 1197 cpu_non_c3 = 0; 1198 for (i = cpu_cx_lowest; i >= 0; i--) { 1199 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1200 cpu_non_c3 = i; 1201 break; 1202 } 1203 } 1204 1205 /* Reset the statistics counters. */ 1206 bzero(cpu_cx_stats, sizeof(cpu_cx_stats)); 1207 ACPI_SERIAL_END(cpu); 1208 1209 return (0); 1210} 1211