cvmx-twsi.h revision 210286
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38
39
40
41
42
43
44/**
45 * @file
46 *
47 * Interface to the TWSI / I2C bus
48 *
49 * Note: Currently on 7 bit device addresses are supported
50 *
51 * <hr>$Revision: 41586 $<hr>
52 *
53 */
54
55#ifndef __CVMX_TWSI_H__
56#define __CVMX_TWSI_H__
57
58#ifdef	__cplusplus
59extern "C" {
60#endif
61
62
63
64/**
65 * Do a twsi read from a 7 bit device address using an (optional) internal address.
66 * Up to 8 bytes can be read at a time.
67 *
68 * @param twsi_id   which Octeon TWSI bus to use
69 * @param dev_addr  Device address (7 bit)
70 * @param internal_addr
71 *                  Internal address.  Can be 0, 1 or 2 bytes in width
72 * @param num_bytes Number of data bytes to read
73 * @param ia_width_bytes
74 *                  Internal address size in bytes (0, 1, or 2)
75 * @param data      Pointer argument where the read data is returned.
76 *
77 * @return read data returned in 'data' argument
78 *         Number of bytes read on success
79 *         -1 on failure
80 */
81int cvmx_twsix_read_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t *data);
82
83
84
85
86/**
87 * A convenience wrapper function around cvmx_twsix_read_ia() that
88 * only supports 8 bit internal addresses.
89 * Reads up to 7 bytes, and returns both the value read or error
90 * value in the return value
91 *
92 * @param twsi_id   which Octeon TWSI bus to use
93 * @param dev_addr  Device address (7 bit only)
94 * @param internal_addr
95 *                  Internal address (8 bit only)
96 * @param num_bytes Number of bytes to read (0-7)
97 *
98 * @return Value read from TWSI on success
99 *         -1 on error
100 */
101static inline int64_t cvmx_twsix_read_ia8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, int num_bytes)
102{
103    uint64_t data;
104    if (num_bytes < 1 || num_bytes > 7)
105        return -1;
106    if (cvmx_twsix_read_ia(twsi_id,dev_addr,internal_addr,num_bytes, 1, &data) < 0)
107        return -1;
108    return data;
109}
110
111/**
112 * A convenience wrapper function around cvmx_twsix_read_ia() that
113 * only supports 16 bit internal addresses.
114 * Reads up to 7 bytes, and returns both the value read or error
115 * value in the return value
116 *
117 * @param twsi_id   which Octeon TWSI bus to use
118 * @param dev_addr  Device address (7 bit only)
119 * @param internal_addr
120 *                  Internal address (16 bit only)
121 * @param num_bytes Number of bytes to read (0-7)
122 *
123 * @return Value read from TWSI on success
124 *         -1 on error
125 */
126static inline int64_t cvmx_twsix_read_ia16(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes)
127{
128    uint64_t data;
129    if (num_bytes < 1 || num_bytes > 7)
130        return -1;
131    if (cvmx_twsix_read_ia(twsi_id, dev_addr, internal_addr, num_bytes, 2, &data) < 0)
132        return -1;
133    return data;
134}
135
136
137
138/**
139 * Read from a TWSI device (7 bit device address only) without generating any
140 * internal addresses.
141 * Read from 1-8 bytes and returns them in the data pointer.
142 *
143 * @param twsi_id   TWSI interface on Octeon to use
144 * @param dev_addr  TWSI device address (7 bit only)
145 * @param num_bytes number of bytes to read
146 * @param data      Pointer to data read from TWSI device
147 *
148 * @return Number of bytes read on success
149 *         -1 on error
150 */
151int cvmx_twsix_read(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t *data);
152
153
154
155/**
156 * Perform a twsi write operation to a 7 bit device address.
157 *
158 * Note that many eeprom devices have page restrictions regarding address boundaries
159 * that can be crossed in one write operation.  This is device dependent, and this routine
160 * does nothing in this regard.
161 * This command does not generate any internal addressess.
162 *
163 * @param twsi_id   Octeon TWSI interface to use
164 * @param dev_addr  TWSI device address
165 * @param num_bytes Number of bytes to write (between 1 and 8 inclusive)
166 * @param data      Data to write
167 *
168 * @return 0 on success
169 *         -1 on failure
170 */
171int cvmx_twsix_write(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t data);
172
173/**
174 * Write 1-8 bytes to a TWSI device using an internal address.
175 *
176 * @param twsi_id   which TWSI interface on Octeon to use
177 * @param dev_addr  TWSI device address (7 bit only)
178 * @param internal_addr
179 *                  TWSI internal address (0, 8, or 16 bits)
180 * @param num_bytes Number of bytes to write (1-8)
181 * @param ia_width_bytes
182 *                  internal address width, in bytes (0, 1, 2)
183 * @param data      Data to write.  Data is written MSB first on the twsi bus, and only the lower
184 *                  num_bytes bytes of the argument are valid.  (If a 2 byte write is done, only
185 *                  the low 2 bytes of the argument is used.
186 *
187 * @return Number of bytes read on success,
188 *         -1 on error
189 */
190int cvmx_twsix_write_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t data);
191
192/***********************************************************************
193** Functions below are deprecated, and not recomended for use.
194** They have been superceded by more flexible functions that are
195** now provided.
196************************************************************************/
197
198
199
200
201
202
203/**
204 * Read 8-bit from a device on the TWSI / I2C bus
205 *
206 * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
207 *                 support 0. CN56XX and CN57XX support 0-1.
208 * @param dev_addr I2C device address (7 bit)
209 * @param internal_addr
210 *                 Internal device address
211 *
212 * @return 8-bit data or < 0 in case of error
213 */
214static inline int cvmx_twsix_read8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr)
215{
216    return cvmx_twsix_read_ia8(twsi_id, dev_addr, internal_addr, 1);
217}
218
219/**
220 * Read 8-bit from a device on the TWSI / I2C bus
221 *
222 * Uses current internal address
223 *
224 * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
225 *                 support 0. CN56XX and CN57XX support 0-1.
226 * @param dev_addr I2C device address (7 bit)
227 *
228 * @return 8-bit value or < 0 in case of error
229 */
230static inline int cvmx_twsix_read8_cur_addr(int twsi_id, uint8_t dev_addr)
231{
232    uint64_t data;
233
234    if (cvmx_twsix_read(twsi_id,dev_addr, 1, &data) < 0)
235        return -1;
236    return(data & 0xff);
237}
238
239/**
240 * Write 8-bit to a device on the TWSI / I2C bus
241 *
242 * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
243 *                 support 0. CN56XX and CN57XX support 0-1.
244 * @param dev_addr I2C device address (7 bit)
245 * @param internal_addr
246 *                 Internal device address
247 * @param data     Data to be written
248 *
249 * @return 0 on success and < 0 in case of error
250 */
251static inline int cvmx_twsix_write8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
252{
253    if (cvmx_twsix_write_ia(twsi_id,dev_addr,internal_addr, 1, 1,data) < 0)
254        return -1;
255    return 0;
256}
257
258/**
259 * Read 8-bit from a device on the TWSI / I2C bus zero.
260 *
261 * This function is for compatibility with SDK 1.6.0 and
262 * before which only supported a single TWSI bus.
263 *
264 * @param dev_addr I2C device address (7 bit)
265 * @param internal_addr
266 *                 Internal device address
267 *
268 * @return 8-bit data or < 0 in case of error
269 */
270static inline int cvmx_twsi_read8(uint8_t dev_addr, uint8_t internal_addr)
271{
272    return cvmx_twsix_read8(0, dev_addr, internal_addr);
273}
274
275/**
276 * Read 8-bit from a device on the TWSI / I2C bus zero.
277 *
278 * Uses current internal address
279 *
280 * This function is for compatibility with SDK 1.6.0 and
281 * before which only supported a single TWSI bus.
282 *
283 * @param dev_addr I2C device address (7 bit)
284 *
285 * @return 8-bit value or < 0 in case of error
286 */
287static inline int cvmx_twsi_read8_cur_addr(uint8_t dev_addr)
288{
289    return cvmx_twsix_read8_cur_addr(0, dev_addr);
290}
291
292/**
293 * Write 8-bit to a device on the TWSI / I2C bus zero.
294 * This function is for compatibility with SDK 1.6.0 and
295 * before which only supported a single TWSI bus.
296 *
297 * @param dev_addr I2C device address (7 bit)
298 * @param internal_addr
299 *                 Internal device address
300 * @param data     Data to be written
301 *
302 * @return 0 on success and < 0 in case of error
303 */
304static inline int cvmx_twsi_write8(uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
305{
306    return cvmx_twsix_write8(0, dev_addr, internal_addr, data);
307}
308
309#ifdef	__cplusplus
310}
311#endif
312
313#endif  /*  __CVMX_TWSI_H__ */
314