cvmx-srio.h revision 232812
1326938Sdim/***********************license start*************** 2326938Sdim * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights 3353358Sdim * reserved. 4353358Sdim * 5353358Sdim * 6326938Sdim * Redistribution and use in source and binary forms, with or without 7326938Sdim * modification, are permitted provided that the following conditions are 8326938Sdim * met: 9326938Sdim * 10341825Sdim * * Redistributions of source code must retain the above copyright 11326938Sdim * notice, this list of conditions and the following disclaimer. 12326938Sdim * 13326938Sdim * * Redistributions in binary form must reproduce the above 14326938Sdim * copyright notice, this list of conditions and the following 15326938Sdim * disclaimer in the documentation and/or other materials provided 16326938Sdim * with the distribution. 17326938Sdim 18326938Sdim * * Neither the name of Cavium Inc. nor the names of 19326938Sdim * its contributors may be used to endorse or promote products 20326938Sdim * derived from this software without specific prior written 21341825Sdim * permission. 22326938Sdim 23341825Sdim * This Software, including technical data, may be subject to U.S. export control 24326938Sdim * laws, including the U.S. Export Administration Act and its associated 25326938Sdim * regulations, and may be subject to export or import regulations in other 26326938Sdim * countries. 27326938Sdim 28326938Sdim * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29326938Sdim * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30326938Sdim * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31326938Sdim * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32326938Sdim * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33326938Sdim * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34326938Sdim * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35326938Sdim * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36326938Sdim * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37326938Sdim * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38326938Sdim ***********************license end**************************************/ 39326938Sdim 40341825Sdim 41326938Sdim 42326938Sdim/** 43326938Sdim * @file 44326938Sdim * 45326938Sdim * Interface to SRIO 46326938Sdim * 47326938Sdim * <hr>$Revision: 41586 $<hr> 48326938Sdim */ 49326938Sdim 50326938Sdim#ifndef __CVMX_SRIO_H__ 51326938Sdim#define __CVMX_SRIO_H__ 52341825Sdim 53341825Sdim#ifdef __cplusplus 54341825Sdimextern "C" { 55341825Sdim#endif 56341825Sdim 57341825Sdim/** 58341825Sdim * Enumeration of the type of operations that can be performed 59341825Sdim * by a mapped write operation. 60341825Sdim */ 61341825Sdimtypedef enum 62341825Sdim{ 63341825Sdim CVMX_SRIO_WRITE_MODE_NWRITE = 0, /**< Only create NWrite operations */ 64341825Sdim CVMX_SRIO_WRITE_MODE_NWRITE_RESP = 1, /**< Create NWrite with response */ 65341825Sdim CVMX_SRIO_WRITE_MODE_AUTO = 2, /**< Intelligently breaks writes into multiple transactions based on alignment */ 66341825Sdim CVMX_SRIO_WRITE_MODE_AUTO_RESP = 3, /**< CVMX_SRIO_WRITE_MODE_WRITE followed with a response */ 67341825Sdim CVMX_SRIO_WRITE_MODE_MAINTENANCE = 6, /**< Create a MAINTENANCE transaction. Use cvmx_srio_config_write32() instead */ 68341825Sdim CVMX_SRIO_WRITE_MODE_PORT = 7 /**< Port Write? */ 69341825Sdim} cvmx_srio_write_mode_t; 70341825Sdim 71341825Sdim/** 72341825Sdim * Enumeration of the type of operations that can be performed 73341825Sdim * by a mapped read operation. 74341825Sdim */ 75341825Sdimtypedef enum 76341825Sdim{ 77341825Sdim CVMX_SRIO_READ_MODE_NORMAL = 0, /**< Perform a normal read */ 78341825Sdim CVMX_SRIO_READ_MODE_ATOMIC_SET = 2, /**< Atomically sets bits in data on remote device */ 79341825Sdim CVMX_SRIO_READ_MODE_ATOMIC_CLEAR = 3, /**< Atomically clears bits in data on remote device */ 80341825Sdim CVMX_SRIO_READ_MODE_ATOMIC_INCREMENT = 4,/**< Atomically increments data on remote device */ 81341825Sdim CVMX_SRIO_READ_MODE_ATOMIC_DECREMENT = 5,/**< Atomically decrements data on remote device */ 82341825Sdim CVMX_SRIO_READ_MODE_MAINTENANCE = 6 /**< Create a MAINTENANCE transaction. Use cvmx_srio_config_read32() instead */ 83341825Sdim} cvmx_srio_read_mode_t; 84341825Sdim 85341825Sdim/** 86341825Sdim * Initialization flags for SRIO 87341825Sdim */ 88341825Sdimtypedef enum 89341825Sdim{ 90341825Sdim CVMX_SRIO_INITIALIZE_DEBUG = 1, 91341825Sdim} cvmx_srio_initialize_flags_t; 92341825Sdim 93341825Sdim/** 94341825Sdim * The possible results from a doorbell operation 95341825Sdim */ 96341825Sdimtypedef enum 97341825Sdim{ 98341825Sdim CVMX_SRIO_DOORBELL_DONE, /**< The doorbell is complete */ 99341825Sdim CVMX_SRIO_DOORBELL_NONE, /**< There wasn't an outstanding doorbell */ 100341825Sdim CVMX_SRIO_DOORBELL_BUSY, /**< The doorbell is still processing */ 101341825Sdim CVMX_SRIO_DOORBELL_RETRY, /**< The doorbell needs to be retried */ 102341825Sdim CVMX_SRIO_DOORBELL_ERROR, /**< The doorbell failed with an error */ 103341825Sdim CVMX_SRIO_DOORBELL_TMOUT /**< The doorbell failed due to timeout */ 104341825Sdim} cvmx_srio_doorbell_status_t; 105341825Sdim 106341825Sdim/** 107341825Sdim * This structure represents the SRIO header received from SRIO on 108341825Sdim * the top of every received message. This header passes through 109341825Sdim * IPD/PIP unmodified. 110341825Sdim */ 111341825Sdimtypedef struct 112341825Sdim{ 113341825Sdim union 114341825Sdim { 115341825Sdim uint64_t u64; 116341825Sdim struct 117326938Sdim { 118326938Sdim#ifdef __BIG_ENDIAN_BITFIELD 119341825Sdim uint64_t prio : 2; /**< The sRIO prio (priority) field in the 120341825Sdim first sRIO message segment received for the 121341825Sdim message. */ 122326938Sdim uint64_t tt : 1; /**< When set, indicates that the first sRIO 123326938Sdim message segment received for the message had 124341825Sdim 16-bit source and destination ID's. When 125341825Sdim clear, indicates 8-bit ID were present. */ 126341825Sdim uint64_t dis : 1; /**< When set, indicates that the destination 127341825Sdim ID in the first sRIO message segment received 128326938Sdim for the message matched the 63xx's secondary 129326938Sdim ID. When clear, indicates that the destination 130341825Sdim ID in the first sRIO message segment 131341825Sdim received for the message matched the 63xx's 132341825Sdim primary ID. Note that the full destination 133341825Sdim ID in the received sRIO message can be 134341825Sdim determined via the combination of 135341825Sdim WORD0[DIS] in the sRIO inbound message 136341825Sdim header and WORD1[iprt] in the work queue 137341825Sdim entry created by PIP/IPD. */ 138341825Sdim uint64_t ssize : 4; /**< The RIO ssize (standard message packet data 139341825Sdim size) field used for the message. */ 140341825Sdim uint64_t sid : 16; /**< The source ID in the first sRIO message 141341825Sdim segment received for the message. When TT is 142341825Sdim clear, the most-significant 8 bits are zero. */ 143341825Sdim uint64_t xmbox : 4; /**< The RIO xmbox (recipient mailbox extension) 144341825Sdim field in the first sRIO message segment 145341825Sdim received for the message. Always zero for 146341825Sdim multi-segment messages. */ 147341825Sdim uint64_t mbox : 2; /**< The RIO mbox (recipient mailbox) field in 148353358Sdim the first sRIO message segment received for 149341825Sdim the message. */ 150326938Sdim uint64_t letter : 2; /**< The RIO letter (slot within a mailbox) 151326938Sdim field in the first sRIO message segment 152341825Sdim received for the message. */ 153326938Sdim uint64_t seq : 32; /**< A sequence number. Whenever the OCTEON 154341825Sdim 63xx sRIO hardware accepts the first sRIO 155341825Sdim segment of either a message or doorbell, it 156326938Sdim samples the current value of a counter 157341825Sdim register and increments the counter 158326938Sdim register. SEQ is the value sampled for the 159326938Sdim message. The counter increments once per 160326938Sdim message/doorbell. SEQ can be used to 161326938Sdim determine the relative order of 162326938Sdim packets/doorbells. Note that the SEQ-implied 163341825Sdim order may differ from the order that the 164326938Sdim WQE's are received by software for a number 165326938Sdim of reasons, including the fact that the WQE 166326938Sdim is not created until the end of the message, 167326938Sdim while SEQ is sampled when the first segment. */ 168326938Sdim#else 169341825Sdim uint64_t seq : 32; 170341825Sdim uint64_t letter : 2; 171341825Sdim uint64_t mbox : 2; 172341825Sdim uint64_t xmbox : 4; 173341825Sdim uint64_t sid : 16; 174341825Sdim uint64_t ssize : 4; 175341825Sdim uint64_t dis : 1; 176341825Sdim uint64_t tt : 1; 177341825Sdim uint64_t prio : 2; 178341825Sdim#endif 179341825Sdim } s; 180341825Sdim } word0; 181341825Sdim union 182341825Sdim { 183341825Sdim uint64_t u64; 184341825Sdim struct 185341825Sdim { 186341825Sdim#ifdef __BIG_ENDIAN_BITFIELD 187341825Sdim uint64_t r : 1; /**< When set, WORD1[R]/PKT_INST_HDR[R] selects 188326938Sdim either RAWFULL or RAWSCHED special PIP 189326938Sdim instruction form. WORD1[R] may commonly be 190326938Sdim set so that WORD1[QOS,GRP] will be directly 191326938Sdim used by the PIP hardware. */ 192326938Sdim uint64_t reserved_62_58 : 5; 193326938Sdim uint64_t pm : 2; /**< WORD1[PM]/PKT_INST_HDR[PM] selects the PIP 194326938Sdim parse mode (uninterpreted, skip-to-L2, 195326938Sdim skip-to-IP), and chooses between 196326938Sdim RAWFULL/RAWSCHED when WORD1[R] is set. */ 197326938Sdim uint64_t reserved_55 : 1; 198326938Sdim uint64_t sl : 7; /**< WORD1[SL]/PKT_INST_HDR[SL] selects the 199326938Sdim skip II length. WORD1[SL] may typically be 200341825Sdim set to 8 (or larger) so that PIP skips this 201341825Sdim WORD1. */ 202341825Sdim uint64_t reserved_47_46 : 2; 203341825Sdim uint64_t nqos : 1; /**< WORD1[NQOS] must not be set when WORD1[R] 204341825Sdim is clear and PIP interprets WORD1 as a 205341825Sdim PKT_INST_HDR. When set, WORD1[NQOS]/PKT_INST_HDR[NQOS] 206341825Sdim prevents PIP from directly using 207341825Sdim WORD1[QOS]/PKT_INST_HDR[QOS] for the QOS 208341825Sdim value in the work queue entry created by 209341825Sdim PIP. WORD1[NQOS] may commonly be clear so 210341825Sdim that WORD1[QOS] will be directly used by the 211341825Sdim PIP hardware. PKT_INST_HDR[NQOS] is new to 212341825Sdim 63xx - this functionality did not exist in 213341825Sdim prior OCTEON's. */ 214341825Sdim uint64_t ngrp : 1; /**< WORD1[NGRP] must not be set when WORD1[R] 215341825Sdim is clear and PIP interprets WORD1 as a 216341825Sdim PKT_INST_HDR. When set, WORD1[NGRP]/PKT_INST_HDR[NGRP] 217341825Sdim prevents PIP from directly using 218341825Sdim WORD1[GRP]/PKT_INST_HDR[GRP] for the GRP 219341825Sdim value in the work queue entry created by 220341825Sdim PIP. WORD1[NGRP] may commonly be clear so 221341825Sdim that WORD1[GRP] will be directly used by the 222341825Sdim PIP hardware. PKT_INST_HDR[NGRP] is new to 223341825Sdim 63xx - this functionality did not exist in 224341825Sdim prior OCTEON's. */ 225341825Sdim uint64_t ntt : 1; /**< WORD1[NTT] must not be set when WORD1[R] 226341825Sdim is clear and PIP interprets WORD1 as a 227341825Sdim PKT_INST_HDR. When set, WORD1[NTT]/PKT_INST_HDR[NTT] 228341825Sdim prevents PIP from directly using 229341825Sdim WORD1[TT]/PKT_INST_HDR[TT] for the TT value 230326938Sdim in the work queue entry created by PIP. 231341825Sdim PKT_INST_HDR[NTT] is new to 63xx - this 232341825Sdim functionality did not exist in prior OCTEON's. */ 233341825Sdim uint64_t ntag : 1; /**< WORD1[NTAG] must not be set when WORD1[R] 234326938Sdim is clear and PIP interprets WORD1 as a 235341825Sdim PKT_INST_HDR. When set, WORD1[NTAG]/PKT_INST_HDR[NTAG] 236341825Sdim prevents PIP from directly using 237341825Sdim WORD1[TAG]/PKT_INST_HDR[TAG] for the TAG 238326938Sdim value in the work queue entry created by PIP. 239326938Sdim PKT_INST_HDR[NTAG] is new to 63xx - this 240341825Sdim functionality did not exist in prior OCTEON's. */ 241341825Sdim uint64_t qos : 3; /**< Created by the hardware from an entry in a 242326938Sdim 256-entry table. The 8-bit value 243341825Sdim WORD0[PRIO,TT,DIS,MBOX,LETTER] selects the 244341825Sdim table entry. When WORD1[R] is set and WORD1[NQOS] 245341825Sdim is clear, WORD1[QOS] becomes the QOS value 246341825Sdim in the work queue entry created by PIP. The 247326938Sdim QOS value in the work queue entry determines 248326938Sdim the priority that SSO/POW will schedule the 249341825Sdim work, and can also control how/if the sRIO 250341825Sdim message gets dropped by PIP/IPD. The 256-entry 251326938Sdim table is unique to each sRIO core, but 252341825Sdim shared by the two controllers associated 253326938Sdim with the sRIO core. */ 254326938Sdim uint64_t grp : 4; /**< Created by the hardware from an entry in a 255344779Sdim 256-entry table. The 8-bit value 256326938Sdim WORD0[PRIO,TT,DIS,MBOX,LETTER] selects the 257341825Sdim table entry. When WORD1[R] is set and WORD1[NGRP] 258326938Sdim is clear, WORD1[GRP] becomes the GRP value 259341825Sdim in the work queue entry created by PIP. The 260326938Sdim GRP value in the work queue entry can direct 261341825Sdim the work to particular cores or particular 262341825Sdim groups of cores. The 256-entry table is 263326938Sdim unique to each sRIO core, but shared by the 264341825Sdim two controllers associated with the sRIO core. */ 265341825Sdim uint64_t rs : 1; /**< In some configurations, enables the sRIO 266341825Sdim message to be buffered solely in the work 267341825Sdim queue entry, and not otherwise in L2/DRAM. */ 268341825Sdim uint64_t tt : 2; /**< When WORD1[R] is set and WORD1[NTT] is 269341825Sdim clear, WORD1[TT]/PKT_INST_HDR[TT] becomes 270326938Sdim the TT value in the work queue entry created 271341825Sdim by PIP. The TT and TAG values in the work 272341825Sdim queue entry determine the scheduling/synchronization 273341825Sdim constraints for the work (no constraints, 274341825Sdim tag order, atomic tag order). */ 275326938Sdim uint64_t tag : 32; /**< Created by the hardware from a CSR 276341825Sdim associated with the sRIO inbound message 277341825Sdim controller. When WORD1[R] is set and WORD1[NTAG] 278341825Sdim is clear, WORD1[TAG]/PKT_INST_HDR[TAG] 279341825Sdim becomes the TAG value in the work queue 280341825Sdim entry created by PIP. The TT and TAG values 281341825Sdim in the work queue entry determine the 282341825Sdim scheduling/synchronization constraints for 283341825Sdim the work (no constraints, tag order, atomic 284341825Sdim tag order). */ 285341825Sdim#else 286341825Sdim uint64_t tag : 32; 287341825Sdim uint64_t tt : 2; 288341825Sdim uint64_t rs : 1; 289341825Sdim uint64_t grp : 4; 290341825Sdim uint64_t qos : 3; 291341825Sdim uint64_t ntag : 1; 292341825Sdim uint64_t ntt : 1; 293341825Sdim uint64_t ngrp : 1; 294341825Sdim uint64_t nqos : 1; 295341825Sdim uint64_t reserved_47_46 : 2; 296341825Sdim uint64_t sl : 7; 297341825Sdim uint64_t reserved_55 : 1; 298341825Sdim uint64_t pm : 2; 299341825Sdim uint64_t reserved_62_58 : 5; 300341825Sdim uint64_t r : 1; 301341825Sdim#endif 302341825Sdim } s; 303341825Sdim } word1; 304341825Sdim} cvmx_srio_rx_message_header_t; 305341825Sdim 306341825Sdim/** 307341825Sdim * This structure represents the SRIO header required on the front 308341825Sdim * of PKO packets destine for SRIO message queues. 309326938Sdim */ 310326938Sdimtypedef union 311326938Sdim{ 312326938Sdim uint64_t u64; 313326938Sdim struct 314341825Sdim { 315326938Sdim#ifdef __BIG_ENDIAN_BITFIELD 316326938Sdim uint64_t prio : 2; /**< The sRIO prio (priority) field for all 317326938Sdim segments in the message. */ 318326938Sdim uint64_t tt : 1; /**< When set, the sRIO message segments use a 319326938Sdim 16-bit source and destination ID for all the 320341825Sdim segments in the message. When clear, the 321326938Sdim message segments use an 8-bit ID. */ 322341825Sdim uint64_t sis : 1; /**< When set, the sRIO message segments use the 323341825Sdim 63xx's secondary ID as the source ID. When 324341825Sdim clear, the sRIO message segments use the 325341825Sdim primary ID as the source ID. */ 326341825Sdim uint64_t ssize : 4; /**< The RIO ssize (standard message segment 327341825Sdim data size) field used for the message. */ 328341825Sdim uint64_t did : 16; /**< The destination ID in the sRIO message 329341825Sdim segments of the message. When TT is clear, 330341825Sdim the most-significant 8 bits must be zero. */ 331341825Sdim uint64_t xmbox : 4; /**< The RIO xmbox (recipient mailbox extension) 332341825Sdim field in the sRIO message segment for a 333341825Sdim single-segment message. Must be zero for 334341825Sdim multi-segment messages. */ 335341825Sdim uint64_t mbox : 2; /**< The RIO mbox (recipient mailbox) field in 336341825Sdim the sRIO message segments of the message. */ 337341825Sdim uint64_t letter : 2; /**< The RIO letter (slot within mailbox) field 338341825Sdim in the sRIO message segments of the message 339341825Sdim when LNS is clear. When LNS is set, this 340341825Sdim LETTER field is not used and must be zero. */ 341341825Sdim uint64_t reserved_31_2 : 30; 342341825Sdim uint64_t lns : 1; /**< When set, the outbound message controller 343341825Sdim will dynamically selects an sRIO letter 344341825Sdim field for the message (based on LETTER_SP or 345341825Sdim LETTER_MP - see appendix A), and the LETTER 346341825Sdim field in this sRIO outbound message 347341825Sdim descriptor is unused. When clear, the LETTER 348341825Sdim field in this sRIO outbound message 349341825Sdim descriptor selects the sRIO letter used for 350341825Sdim the message. */ 351341825Sdim uint64_t intr : 1; /**< When set, the outbound message controller 352341825Sdim will set an interrupt bit after all sRIO 353341825Sdim segments of the message receive a message 354341825Sdim DONE response. If the message transfer has 355353358Sdim errors, the interrupt bit is not set (but 356353358Sdim others are). */ 357353358Sdim#else 358353358Sdim uint64_t intr : 1; 359353358Sdim uint64_t lns : 1; 360353358Sdim uint64_t reserved_31_2 : 30; 361353358Sdim uint64_t letter : 2; 362353358Sdim uint64_t mbox : 2; 363353358Sdim uint64_t xmbox : 4; 364353358Sdim uint64_t did : 16; 365353358Sdim uint64_t ssize : 4; 366353358Sdim uint64_t sis : 1; 367353358Sdim uint64_t tt : 1; 368353358Sdim uint64_t prio : 2; 369353358Sdim#endif 370353358Sdim } s; 371353358Sdim} cvmx_srio_tx_message_header_t; 372353358Sdim 373353358Sdim/** 374353358Sdim * Reset SRIO to link partner 375353358Sdim * 376353358Sdim * @param srio_port SRIO port to initialize 377353358Sdim * 378353358Sdim * @return Zero on success 379353358Sdim */ 380353358Sdimint cvmx_srio_link_rst(int srio_port); 381353358Sdim 382353358Sdim/** 383353358Sdim * Initialize a SRIO port for use. 384353358Sdim * 385353358Sdim * @param srio_port SRIO port to initialize 386353358Sdim * @param flags Optional flags 387353358Sdim * 388353358Sdim * @return Zero on success 389341825Sdim */ 390341825Sdimint cvmx_srio_initialize(int srio_port, cvmx_srio_initialize_flags_t flags); 391341825Sdim 392341825Sdim/** 393341825Sdim * Read 32bits from a Device's config space 394341825Sdim * 395341825Sdim * @param srio_port SRIO port the device is on 396341825Sdim * @param srcid_index 397341825Sdim * Which SRIO source ID to use. 0 = Primary, 1 = Secondary 398341825Sdim * @param destid RapidIO device ID, or -1 for the local Octeon. 399341825Sdim * @param is16bit Non zero if the transactions should use 16bit device IDs. Zero 400341825Sdim * if transactions should use 8bit device IDs. 401341825Sdim * @param hopcount Number of hops to the remote device. Use 0 for the local Octeon. 402341825Sdim * @param offset Offset in config space. This must be a multiple of 32 bits. 403341825Sdim * @param result Result of the read. This will be unmodified on failure. 404341825Sdim * 405326938Sdim * @return Zero on success, negative on failure. 406326938Sdim */ 407326938Sdimint cvmx_srio_config_read32(int srio_port, int srcid_index, int destid, 408341825Sdim int is16bit, uint8_t hopcount, uint32_t offset, 409326938Sdim uint32_t *result); 410326938Sdim 411326938Sdim/** 412341825Sdim * Write 32bits to a Device's config space 413326938Sdim * 414326938Sdim * @param srio_port SRIO port the device is on 415326938Sdim * @param srcid_index 416341825Sdim * Which SRIO source ID to use. 0 = Primary, 1 = Secondary 417326938Sdim * @param destid RapidIO device ID, or -1 for the local Octeon. 418326938Sdim * @param is16bit Non zero if the transactions should use 16bit device IDs. Zero 419326938Sdim * if transactions should use 8bit device IDs. 420341825Sdim * @param hopcount Number of hops to the remote device. Use 0 for the local Octeon. 421326938Sdim * @param offset Offset in config space. This must be a multiple of 32 bits. 422341825Sdim * @param data Data to write. 423341825Sdim * 424326938Sdim * @return Zero on success, negative on failure. 425326938Sdim */ 426326938Sdimint cvmx_srio_config_write32(int srio_port, int srcid_index, int destid, 427326938Sdim int is16bit, uint8_t hopcount, uint32_t offset, 428326938Sdim uint32_t data); 429326938Sdim 430326938Sdim/** 431326938Sdim * Send a RapidIO doorbell to a remote device 432326938Sdim * 433326938Sdim * @param srio_port SRIO port the device is on 434326938Sdim * @param srcid_index 435326938Sdim * Which SRIO source ID to use. 0 = Primary, 1 = Secondary 436326938Sdim * @param destid RapidIO device ID. 437326938Sdim * @param is16bit Non zero if the transactions should use 16bit device IDs. Zero 438326938Sdim * if transactions should use 8bit device IDs. 439326938Sdim * @param priority Doorbell priority (0-3) 440326938Sdim * @param data Data for doorbell. 441326938Sdim * 442326938Sdim * @return Zero on success, negative on failure. 443326938Sdim */ 444341825Sdimint cvmx_srio_send_doorbell(int srio_port, int srcid_index, int destid, 445341825Sdim int is16bit, int priority, uint16_t data); 446341825Sdim 447341825Sdim/** 448341825Sdim * Get the status of the last doorbell sent. If the dooorbell 449341825Sdim * hardware is done, then the status is cleared to get ready for 450341825Sdim * the next doorbell (or retry). 451341825Sdim * 452341825Sdim * @param srio_port SRIO port to check doorbell on 453341825Sdim * 454353358Sdim * @return Doorbell status 455341825Sdim */ 456353358Sdimcvmx_srio_doorbell_status_t cvmx_srio_send_doorbell_status(int srio_port); 457353358Sdim 458353358Sdim/** 459353358Sdim * Read a received doorbell and report data about it. 460353358Sdim * 461353358Sdim * @param srio_port SRIO port to check for the received doorbell 462353358Sdim * @param destid_index 463353358Sdim * Which Octeon destination ID was the doorbell for 464353358Sdim * @param sequence_num 465353358Sdim * Sequence number of doorbell (32bits) 466353358Sdim * @param srcid RapidIO source ID of the doorbell sender 467353358Sdim * @param priority Priority of the doorbell (0-3) 468353358Sdim * @param is16bit Non zero if the transactions should use 16bit device IDs. Zero 469353358Sdim * if transactions should use 8bit device IDs. 470353358Sdim * @param data Data in the doorbell (16 bits) 471353358Sdim * 472353358Sdim * @return Doorbell status. Either DONE, NONE, or ERROR. 473353358Sdim */ 474353358Sdimcvmx_srio_doorbell_status_t cvmx_srio_receive_doorbell(int srio_port, 475353358Sdim int *destid_index, uint32_t *sequence_num, int *srcid, int *priority, 476341825Sdim int *is16bit, uint16_t *data); 477341825Sdim 478353358Sdim/** 479341825Sdim * Receive a packet from the Soft Packet FIFO (SPF). 480341825Sdim * 481341825Sdim * @param srio_port SRIO port to read the packet from. 482353358Sdim * @param buffer Buffer to receive the packet. 483341825Sdim * @param buffer_length 484341825Sdim * Length of the buffer in bytes. 485341825Sdim * 486353358Sdim * @return Returns the length of the packet read. Negative on failure. 487341825Sdim * Zero if no packets are available. 488341825Sdim */ 489341825Sdimint cvmx_srio_receive_spf(int srio_port, void *buffer, int buffer_length); 490353358Sdim 491341825Sdim/** 492341825Sdim * Map a remote device's memory region into Octeon's physical 493341825Sdim * address area. The caller can then map this into a core using 494341825Sdim * the TLB or XKPHYS. 495341825Sdim * 496341825Sdim * @param srio_port SRIO port to map the device on 497341825Sdim * @param write_op Type of operation to perform on a write to the device. 498344779Sdim * Normally should be CVMX_SRIO_WRITE_MODE_AUTO. 499341825Sdim * @param write_priority 500344779Sdim * SRIO priority of writes (0-3) 501341825Sdim * @param read_op Type of operation to perform on reads to the device. 502344779Sdim * Normally should be CVMX_SRIO_READ_MODE_NORMAL. 503341825Sdim * @param read_priority 504344779Sdim * SRIO priority of reads (0-3) 505341825Sdim * @param srcid_index 506344779Sdim * Which SRIO source ID to use. 0 = Primary, 1 = Secondary 507341825Sdim * @param destid RapidIO device ID. 508341825Sdim * @param is16bit Non zero if the transactions should use 16bit device IDs. Zero 509341825Sdim * if transactions should use 8bit device IDs. 510341825Sdim * @param base Device base address to start the mapping 511341825Sdim * @param size Size of the mapping in bytes 512341825Sdim * 513341825Sdim * @return Octeon 64bit physical address that accesses the remote device, 514341825Sdim * or zero on failure. 515341825Sdim */ 516341825Sdimuint64_t cvmx_srio_physical_map(int srio_port, cvmx_srio_write_mode_t write_op, 517341825Sdim int write_priority, cvmx_srio_read_mode_t read_op, int read_priority, 518326938Sdim int srcid_index, int destid, int is16bit, uint64_t base, uint64_t size); 519326938Sdim 520326938Sdim/** 521326938Sdim * Unmap a physical address window created by cvmx_srio_phys_map(). 522326938Sdim * 523341825Sdim * @param physical_address 524326938Sdim * Physical address returned by cvmx_srio_phys_map(). 525326938Sdim * @param size Size used on original call. 526326938Sdim * 527326938Sdim * @return Zero on success, negative on failure. 528326938Sdim */ 529341825Sdimint cvmx_srio_physical_unmap(uint64_t physical_address, uint64_t size); 530341825Sdim 531341825Sdim#ifdef CVMX_ENABLE_PKO_FUNCTIONS 532341825Sdim/** 533341825Sdim * fill out outbound message descriptor 534341825Sdim * 535341825Sdim * @param buf_ptr pointer to a buffer pointer. the buffer pointer points 536341825Sdim * to a chain of buffers that hold an outbound srio packet. 537341825Sdim * the packet can take the format of (1) a pip/ipd inbound 538341825Sdim * message or (2) an application-generated outbound message 539341825Sdim * @param desc_ptr pointer to an outbound message descriptor. should be null 540341825Sdim * if *buf_ptr is in the format (1) 541341825Sdim * 542341825Sdim * @return 0 on success; negative of failure. 543341825Sdim */ 544341825Sdimint cvmx_srio_omsg_desc (uint64_t port, cvmx_buf_ptr_t *buf_ptr, 545341825Sdim cvmx_srio_tx_message_header_t *desc_ptr); 546341825Sdim#endif 547341825Sdim 548341825Sdim 549341825Sdim#ifdef __cplusplus 550341825Sdim} 551341825Sdim#endif 552341825Sdim 553341825Sdim#endif 554341825Sdim