1215976Sjmallett/***********************license start***************
2232812Sjmallett * Copyright (c) 2003-2012  Cavium Inc. (support@cavium.com). All rights
3215976Sjmallett * reserved.
4215976Sjmallett *
5215976Sjmallett *
6215976Sjmallett * Redistribution and use in source and binary forms, with or without
7215976Sjmallett * modification, are permitted provided that the following conditions are
8215976Sjmallett * met:
9215976Sjmallett *
10215976Sjmallett *   * Redistributions of source code must retain the above copyright
11215976Sjmallett *     notice, this list of conditions and the following disclaimer.
12215976Sjmallett *
13215976Sjmallett *   * Redistributions in binary form must reproduce the above
14215976Sjmallett *     copyright notice, this list of conditions and the following
15215976Sjmallett *     disclaimer in the documentation and/or other materials provided
16215976Sjmallett *     with the distribution.
17215976Sjmallett
18232812Sjmallett *   * Neither the name of Cavium Inc. nor the names of
19215976Sjmallett *     its contributors may be used to endorse or promote products
20215976Sjmallett *     derived from this software without specific prior written
21215976Sjmallett *     permission.
22215976Sjmallett
23215976Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215976Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215976Sjmallett * regulations, and may be subject to export or import  regulations in other
26215976Sjmallett * countries.
27215976Sjmallett
28215976Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30215976Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215976Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215976Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215976Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215976Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35215976Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36215976Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37215976Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38215976Sjmallett ***********************license end**************************************/
39215976Sjmallett
40215976Sjmallett
41215976Sjmallett/**
42215976Sjmallett * cvmx-smi-defs.h
43215976Sjmallett *
44215976Sjmallett * Configuration and status register (CSR) type definitions for
45215976Sjmallett * Octeon smi.
46215976Sjmallett *
47215976Sjmallett * This file is auto generated. Do not edit.
48215976Sjmallett *
49215976Sjmallett * <hr>$Revision$<hr>
50215976Sjmallett *
51215976Sjmallett */
52232812Sjmallett#ifndef __CVMX_SMI_DEFS_H__
53232812Sjmallett#define __CVMX_SMI_DEFS_H__
54215976Sjmallett
55215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
56215976Sjmallett#define CVMX_SMI_DRV_CTL CVMX_SMI_DRV_CTL_FUNC()
57215976Sjmallettstatic inline uint64_t CVMX_SMI_DRV_CTL_FUNC(void)
58215976Sjmallett{
59232812Sjmallett	if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
60215976Sjmallett		cvmx_warn("CVMX_SMI_DRV_CTL not supported on this chip\n");
61215976Sjmallett	return CVMX_ADD_IO_SEG(0x0001180000001828ull);
62215976Sjmallett}
63215976Sjmallett#else
64215976Sjmallett#define CVMX_SMI_DRV_CTL (CVMX_ADD_IO_SEG(0x0001180000001828ull))
65215976Sjmallett#endif
66215976Sjmallett
67215976Sjmallett/**
68215976Sjmallett * cvmx_smi_drv_ctl
69215976Sjmallett *
70215976Sjmallett * SMI_DRV_CTL = SMI Drive Strength Control
71215976Sjmallett *
72215976Sjmallett */
73232812Sjmallettunion cvmx_smi_drv_ctl {
74215976Sjmallett	uint64_t u64;
75232812Sjmallett	struct cvmx_smi_drv_ctl_s {
76232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD
77215976Sjmallett	uint64_t reserved_14_63               : 50;
78215976Sjmallett	uint64_t pctl                         : 6;  /**< PCTL Drive strength control bits
79215976Sjmallett                                                         Assuming a 50ohm termination
80215976Sjmallett                                                         3.3v supply = 19
81215976Sjmallett                                                         2.5v supply = TBD */
82215976Sjmallett	uint64_t reserved_6_7                 : 2;
83215976Sjmallett	uint64_t nctl                         : 6;  /**< NCTL Drive strength control bits
84215976Sjmallett                                                         Assuming a 50ohm termination
85215976Sjmallett                                                         3.3v supply = 15
86215976Sjmallett                                                         2.5v supply = TBD */
87215976Sjmallett#else
88215976Sjmallett	uint64_t nctl                         : 6;
89215976Sjmallett	uint64_t reserved_6_7                 : 2;
90215976Sjmallett	uint64_t pctl                         : 6;
91215976Sjmallett	uint64_t reserved_14_63               : 50;
92215976Sjmallett#endif
93215976Sjmallett	} s;
94232812Sjmallett	struct cvmx_smi_drv_ctl_s             cn61xx;
95215976Sjmallett	struct cvmx_smi_drv_ctl_s             cn63xx;
96215976Sjmallett	struct cvmx_smi_drv_ctl_s             cn63xxp1;
97232812Sjmallett	struct cvmx_smi_drv_ctl_s             cn66xx;
98232812Sjmallett	struct cvmx_smi_drv_ctl_s             cn68xx;
99232812Sjmallett	struct cvmx_smi_drv_ctl_s             cn68xxp1;
100232812Sjmallett	struct cvmx_smi_drv_ctl_s             cnf71xx;
101215976Sjmallett};
102215976Sjmalletttypedef union cvmx_smi_drv_ctl cvmx_smi_drv_ctl_t;
103215976Sjmallett
104215976Sjmallett#endif
105