1215976Sjmallett/***********************license start*************** 2232812Sjmallett * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights 3215976Sjmallett * reserved. 4215976Sjmallett * 5215976Sjmallett * 6215976Sjmallett * Redistribution and use in source and binary forms, with or without 7215976Sjmallett * modification, are permitted provided that the following conditions are 8215976Sjmallett * met: 9215976Sjmallett * 10215976Sjmallett * * Redistributions of source code must retain the above copyright 11215976Sjmallett * notice, this list of conditions and the following disclaimer. 12215976Sjmallett * 13215976Sjmallett * * Redistributions in binary form must reproduce the above 14215976Sjmallett * copyright notice, this list of conditions and the following 15215976Sjmallett * disclaimer in the documentation and/or other materials provided 16215976Sjmallett * with the distribution. 17215976Sjmallett 18232812Sjmallett * * Neither the name of Cavium Inc. nor the names of 19215976Sjmallett * its contributors may be used to endorse or promote products 20215976Sjmallett * derived from this software without specific prior written 21215976Sjmallett * permission. 22215976Sjmallett 23215976Sjmallett * This Software, including technical data, may be subject to U.S. export control 24215976Sjmallett * laws, including the U.S. Export Administration Act and its associated 25215976Sjmallett * regulations, and may be subject to export or import regulations in other 26215976Sjmallett * countries. 27215976Sjmallett 28215976Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30215976Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31215976Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32215976Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33215976Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34215976Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35215976Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36215976Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37215976Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38215976Sjmallett ***********************license end**************************************/ 39215976Sjmallett 40215976Sjmallett 41215976Sjmallett/** 42215976Sjmallett * cvmx-rnm-defs.h 43215976Sjmallett * 44215976Sjmallett * Configuration and status register (CSR) type definitions for 45215976Sjmallett * Octeon rnm. 46215976Sjmallett * 47215976Sjmallett * This file is auto generated. Do not edit. 48215976Sjmallett * 49215976Sjmallett * <hr>$Revision$<hr> 50215976Sjmallett * 51215976Sjmallett */ 52232812Sjmallett#ifndef __CVMX_RNM_DEFS_H__ 53232812Sjmallett#define __CVMX_RNM_DEFS_H__ 54215976Sjmallett 55215976Sjmallett#define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull)) 56215976Sjmallett#define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull)) 57215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 58215976Sjmallett#define CVMX_RNM_EER_DBG CVMX_RNM_EER_DBG_FUNC() 59215976Sjmallettstatic inline uint64_t CVMX_RNM_EER_DBG_FUNC(void) 60215976Sjmallett{ 61232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 62215976Sjmallett cvmx_warn("CVMX_RNM_EER_DBG not supported on this chip\n"); 63215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180040000018ull); 64215976Sjmallett} 65215976Sjmallett#else 66215976Sjmallett#define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull)) 67215976Sjmallett#endif 68215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 69215976Sjmallett#define CVMX_RNM_EER_KEY CVMX_RNM_EER_KEY_FUNC() 70215976Sjmallettstatic inline uint64_t CVMX_RNM_EER_KEY_FUNC(void) 71215976Sjmallett{ 72232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 73215976Sjmallett cvmx_warn("CVMX_RNM_EER_KEY not supported on this chip\n"); 74215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180040000010ull); 75215976Sjmallett} 76215976Sjmallett#else 77215976Sjmallett#define CVMX_RNM_EER_KEY (CVMX_ADD_IO_SEG(0x0001180040000010ull)) 78215976Sjmallett#endif 79215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 80215976Sjmallett#define CVMX_RNM_SERIAL_NUM CVMX_RNM_SERIAL_NUM_FUNC() 81215976Sjmallettstatic inline uint64_t CVMX_RNM_SERIAL_NUM_FUNC(void) 82215976Sjmallett{ 83232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 84215976Sjmallett cvmx_warn("CVMX_RNM_SERIAL_NUM not supported on this chip\n"); 85215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180040000020ull); 86215976Sjmallett} 87215976Sjmallett#else 88215976Sjmallett#define CVMX_RNM_SERIAL_NUM (CVMX_ADD_IO_SEG(0x0001180040000020ull)) 89215976Sjmallett#endif 90215976Sjmallett 91215976Sjmallett/** 92215976Sjmallett * cvmx_rnm_bist_status 93215976Sjmallett * 94215976Sjmallett * RNM_BIST_STATUS = RNM's BIST Status Register 95215976Sjmallett * 96215976Sjmallett * The RNM's Memory Bist Status register. 97215976Sjmallett */ 98232812Sjmallettunion cvmx_rnm_bist_status { 99215976Sjmallett uint64_t u64; 100232812Sjmallett struct cvmx_rnm_bist_status_s { 101232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 102215976Sjmallett uint64_t reserved_2_63 : 62; 103215976Sjmallett uint64_t rrc : 1; /**< Status of RRC block bist. */ 104215976Sjmallett uint64_t mem : 1; /**< Status of MEM block bist. */ 105215976Sjmallett#else 106215976Sjmallett uint64_t mem : 1; 107215976Sjmallett uint64_t rrc : 1; 108215976Sjmallett uint64_t reserved_2_63 : 62; 109215976Sjmallett#endif 110215976Sjmallett } s; 111215976Sjmallett struct cvmx_rnm_bist_status_s cn30xx; 112215976Sjmallett struct cvmx_rnm_bist_status_s cn31xx; 113215976Sjmallett struct cvmx_rnm_bist_status_s cn38xx; 114215976Sjmallett struct cvmx_rnm_bist_status_s cn38xxp2; 115215976Sjmallett struct cvmx_rnm_bist_status_s cn50xx; 116215976Sjmallett struct cvmx_rnm_bist_status_s cn52xx; 117215976Sjmallett struct cvmx_rnm_bist_status_s cn52xxp1; 118215976Sjmallett struct cvmx_rnm_bist_status_s cn56xx; 119215976Sjmallett struct cvmx_rnm_bist_status_s cn56xxp1; 120215976Sjmallett struct cvmx_rnm_bist_status_s cn58xx; 121215976Sjmallett struct cvmx_rnm_bist_status_s cn58xxp1; 122232812Sjmallett struct cvmx_rnm_bist_status_s cn61xx; 123215976Sjmallett struct cvmx_rnm_bist_status_s cn63xx; 124215976Sjmallett struct cvmx_rnm_bist_status_s cn63xxp1; 125232812Sjmallett struct cvmx_rnm_bist_status_s cn66xx; 126232812Sjmallett struct cvmx_rnm_bist_status_s cn68xx; 127232812Sjmallett struct cvmx_rnm_bist_status_s cn68xxp1; 128232812Sjmallett struct cvmx_rnm_bist_status_s cnf71xx; 129215976Sjmallett}; 130215976Sjmalletttypedef union cvmx_rnm_bist_status cvmx_rnm_bist_status_t; 131215976Sjmallett 132215976Sjmallett/** 133215976Sjmallett * cvmx_rnm_ctl_status 134215976Sjmallett * 135215976Sjmallett * RNM_CTL_STATUS = RNM's Control/Status Register 136215976Sjmallett * 137215976Sjmallett * The RNM's interrupt enable register. 138215976Sjmallett */ 139232812Sjmallettunion cvmx_rnm_ctl_status { 140215976Sjmallett uint64_t u64; 141232812Sjmallett struct cvmx_rnm_ctl_status_s { 142232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 143232812Sjmallett uint64_t reserved_12_63 : 52; 144232812Sjmallett uint64_t dis_mak : 1; /**< Disable use of Master AES KEY */ 145215976Sjmallett uint64_t eer_lck : 1; /**< Encryption enable register locked */ 146215976Sjmallett uint64_t eer_val : 1; /**< Dormant encryption key match */ 147215976Sjmallett uint64_t ent_sel : 4; /**< ? */ 148215976Sjmallett uint64_t exp_ent : 1; /**< Exported entropy enable for random number generator */ 149215976Sjmallett uint64_t rng_rst : 1; /**< Reset RNG as core reset. */ 150215976Sjmallett uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register 151215976Sjmallett logic. */ 152215976Sjmallett uint64_t rng_en : 1; /**< Enable the output of the RNG. */ 153215976Sjmallett uint64_t ent_en : 1; /**< Entropy enable for random number generator. */ 154215976Sjmallett#else 155215976Sjmallett uint64_t ent_en : 1; 156215976Sjmallett uint64_t rng_en : 1; 157215976Sjmallett uint64_t rnm_rst : 1; 158215976Sjmallett uint64_t rng_rst : 1; 159215976Sjmallett uint64_t exp_ent : 1; 160215976Sjmallett uint64_t ent_sel : 4; 161215976Sjmallett uint64_t eer_val : 1; 162215976Sjmallett uint64_t eer_lck : 1; 163232812Sjmallett uint64_t dis_mak : 1; 164232812Sjmallett uint64_t reserved_12_63 : 52; 165215976Sjmallett#endif 166215976Sjmallett } s; 167232812Sjmallett struct cvmx_rnm_ctl_status_cn30xx { 168232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 169215976Sjmallett uint64_t reserved_4_63 : 60; 170215976Sjmallett uint64_t rng_rst : 1; /**< Reset RNG as core reset. */ 171215976Sjmallett uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register 172215976Sjmallett logic. */ 173215976Sjmallett uint64_t rng_en : 1; /**< Enable the output of the RNG. */ 174215976Sjmallett uint64_t ent_en : 1; /**< Entropy enable for random number generator. */ 175215976Sjmallett#else 176215976Sjmallett uint64_t ent_en : 1; 177215976Sjmallett uint64_t rng_en : 1; 178215976Sjmallett uint64_t rnm_rst : 1; 179215976Sjmallett uint64_t rng_rst : 1; 180215976Sjmallett uint64_t reserved_4_63 : 60; 181215976Sjmallett#endif 182215976Sjmallett } cn30xx; 183215976Sjmallett struct cvmx_rnm_ctl_status_cn30xx cn31xx; 184215976Sjmallett struct cvmx_rnm_ctl_status_cn30xx cn38xx; 185215976Sjmallett struct cvmx_rnm_ctl_status_cn30xx cn38xxp2; 186232812Sjmallett struct cvmx_rnm_ctl_status_cn50xx { 187232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 188215976Sjmallett uint64_t reserved_9_63 : 55; 189215976Sjmallett uint64_t ent_sel : 4; /**< ? */ 190215976Sjmallett uint64_t exp_ent : 1; /**< Exported entropy enable for random number generator */ 191215976Sjmallett uint64_t rng_rst : 1; /**< Reset RNG as core reset. */ 192215976Sjmallett uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register 193215976Sjmallett logic. */ 194215976Sjmallett uint64_t rng_en : 1; /**< Enable the output of the RNG. */ 195215976Sjmallett uint64_t ent_en : 1; /**< Entropy enable for random number generator. */ 196215976Sjmallett#else 197215976Sjmallett uint64_t ent_en : 1; 198215976Sjmallett uint64_t rng_en : 1; 199215976Sjmallett uint64_t rnm_rst : 1; 200215976Sjmallett uint64_t rng_rst : 1; 201215976Sjmallett uint64_t exp_ent : 1; 202215976Sjmallett uint64_t ent_sel : 4; 203215976Sjmallett uint64_t reserved_9_63 : 55; 204215976Sjmallett#endif 205215976Sjmallett } cn50xx; 206215976Sjmallett struct cvmx_rnm_ctl_status_cn50xx cn52xx; 207215976Sjmallett struct cvmx_rnm_ctl_status_cn50xx cn52xxp1; 208215976Sjmallett struct cvmx_rnm_ctl_status_cn50xx cn56xx; 209215976Sjmallett struct cvmx_rnm_ctl_status_cn50xx cn56xxp1; 210215976Sjmallett struct cvmx_rnm_ctl_status_cn50xx cn58xx; 211215976Sjmallett struct cvmx_rnm_ctl_status_cn50xx cn58xxp1; 212232812Sjmallett struct cvmx_rnm_ctl_status_s cn61xx; 213232812Sjmallett struct cvmx_rnm_ctl_status_cn63xx { 214232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 215232812Sjmallett uint64_t reserved_11_63 : 53; 216232812Sjmallett uint64_t eer_lck : 1; /**< Encryption enable register locked */ 217232812Sjmallett uint64_t eer_val : 1; /**< Dormant encryption key match */ 218232812Sjmallett uint64_t ent_sel : 4; /**< ? */ 219232812Sjmallett uint64_t exp_ent : 1; /**< Exported entropy enable for random number generator */ 220232812Sjmallett uint64_t rng_rst : 1; /**< Reset RNG as core reset. */ 221232812Sjmallett uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register 222232812Sjmallett logic. */ 223232812Sjmallett uint64_t rng_en : 1; /**< Enable the output of the RNG. */ 224232812Sjmallett uint64_t ent_en : 1; /**< Entropy enable for random number generator. */ 225232812Sjmallett#else 226232812Sjmallett uint64_t ent_en : 1; 227232812Sjmallett uint64_t rng_en : 1; 228232812Sjmallett uint64_t rnm_rst : 1; 229232812Sjmallett uint64_t rng_rst : 1; 230232812Sjmallett uint64_t exp_ent : 1; 231232812Sjmallett uint64_t ent_sel : 4; 232232812Sjmallett uint64_t eer_val : 1; 233232812Sjmallett uint64_t eer_lck : 1; 234232812Sjmallett uint64_t reserved_11_63 : 53; 235232812Sjmallett#endif 236232812Sjmallett } cn63xx; 237232812Sjmallett struct cvmx_rnm_ctl_status_cn63xx cn63xxp1; 238232812Sjmallett struct cvmx_rnm_ctl_status_s cn66xx; 239232812Sjmallett struct cvmx_rnm_ctl_status_cn63xx cn68xx; 240232812Sjmallett struct cvmx_rnm_ctl_status_cn63xx cn68xxp1; 241232812Sjmallett struct cvmx_rnm_ctl_status_s cnf71xx; 242215976Sjmallett}; 243215976Sjmalletttypedef union cvmx_rnm_ctl_status cvmx_rnm_ctl_status_t; 244215976Sjmallett 245215976Sjmallett/** 246215976Sjmallett * cvmx_rnm_eer_dbg 247215976Sjmallett * 248215976Sjmallett * RNM_EER_DBG = RNM's Encryption enable debug register 249215976Sjmallett * 250215976Sjmallett * The RNM's Encryption enable debug register 251215976Sjmallett */ 252232812Sjmallettunion cvmx_rnm_eer_dbg { 253215976Sjmallett uint64_t u64; 254232812Sjmallett struct cvmx_rnm_eer_dbg_s { 255232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 256215976Sjmallett uint64_t dat : 64; /**< Dormant encryption debug info. */ 257215976Sjmallett#else 258215976Sjmallett uint64_t dat : 64; 259215976Sjmallett#endif 260215976Sjmallett } s; 261232812Sjmallett struct cvmx_rnm_eer_dbg_s cn61xx; 262215976Sjmallett struct cvmx_rnm_eer_dbg_s cn63xx; 263215976Sjmallett struct cvmx_rnm_eer_dbg_s cn63xxp1; 264232812Sjmallett struct cvmx_rnm_eer_dbg_s cn66xx; 265232812Sjmallett struct cvmx_rnm_eer_dbg_s cn68xx; 266232812Sjmallett struct cvmx_rnm_eer_dbg_s cn68xxp1; 267232812Sjmallett struct cvmx_rnm_eer_dbg_s cnf71xx; 268215976Sjmallett}; 269215976Sjmalletttypedef union cvmx_rnm_eer_dbg cvmx_rnm_eer_dbg_t; 270215976Sjmallett 271215976Sjmallett/** 272215976Sjmallett * cvmx_rnm_eer_key 273215976Sjmallett * 274215976Sjmallett * RNM_EER_KEY = RNM's Encryption enable register 275215976Sjmallett * 276215976Sjmallett * The RNM's Encryption enable register 277215976Sjmallett */ 278232812Sjmallettunion cvmx_rnm_eer_key { 279215976Sjmallett uint64_t u64; 280232812Sjmallett struct cvmx_rnm_eer_key_s { 281232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 282215976Sjmallett uint64_t key : 64; /**< Dormant encryption key. If dormant crypto is fuse 283215976Sjmallett enabled, crypto can be enable by writing this 284215976Sjmallett register with the correct key. */ 285215976Sjmallett#else 286215976Sjmallett uint64_t key : 64; 287215976Sjmallett#endif 288215976Sjmallett } s; 289232812Sjmallett struct cvmx_rnm_eer_key_s cn61xx; 290215976Sjmallett struct cvmx_rnm_eer_key_s cn63xx; 291215976Sjmallett struct cvmx_rnm_eer_key_s cn63xxp1; 292232812Sjmallett struct cvmx_rnm_eer_key_s cn66xx; 293232812Sjmallett struct cvmx_rnm_eer_key_s cn68xx; 294232812Sjmallett struct cvmx_rnm_eer_key_s cn68xxp1; 295232812Sjmallett struct cvmx_rnm_eer_key_s cnf71xx; 296215976Sjmallett}; 297215976Sjmalletttypedef union cvmx_rnm_eer_key cvmx_rnm_eer_key_t; 298215976Sjmallett 299215976Sjmallett/** 300215976Sjmallett * cvmx_rnm_serial_num 301215976Sjmallett * 302215976Sjmallett * RNM_SERIAL_NUM = RNM's fuse serial number register 303215976Sjmallett * 304215976Sjmallett * The RNM's fuse serial number register 305215976Sjmallett * 306215976Sjmallett * Notes: 307215976Sjmallett * Added RNM_SERIAL_NUM in pass 2.0 308215976Sjmallett * 309215976Sjmallett */ 310232812Sjmallettunion cvmx_rnm_serial_num { 311215976Sjmallett uint64_t u64; 312232812Sjmallett struct cvmx_rnm_serial_num_s { 313232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 314215976Sjmallett uint64_t dat : 64; /**< Dormant encryption serial number */ 315215976Sjmallett#else 316215976Sjmallett uint64_t dat : 64; 317215976Sjmallett#endif 318215976Sjmallett } s; 319232812Sjmallett struct cvmx_rnm_serial_num_s cn61xx; 320215976Sjmallett struct cvmx_rnm_serial_num_s cn63xx; 321232812Sjmallett struct cvmx_rnm_serial_num_s cn66xx; 322232812Sjmallett struct cvmx_rnm_serial_num_s cn68xx; 323232812Sjmallett struct cvmx_rnm_serial_num_s cn68xxp1; 324232812Sjmallett struct cvmx_rnm_serial_num_s cnf71xx; 325215976Sjmallett}; 326215976Sjmalletttypedef union cvmx_rnm_serial_num cvmx_rnm_serial_num_t; 327215976Sjmallett 328215976Sjmallett#endif 329