cvmx-rng.h revision 232812
1238384Sjkim/***********************license start***************
2238384Sjkim * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
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7238384Sjkim * modification, are permitted provided that the following conditions are
8238384Sjkim * met:
9238384Sjkim *
10238384Sjkim *   * Redistributions of source code must retain the above copyright
11238384Sjkim *     notice, this list of conditions and the following disclaimer.
12238384Sjkim *
13238384Sjkim *   * Redistributions in binary form must reproduce the above
14238384Sjkim *     copyright notice, this list of conditions and the following
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17238384Sjkim
18238384Sjkim *   * Neither the name of Cavium Inc. nor the names of
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20238384Sjkim *     derived from this software without specific prior written
21238384Sjkim *     permission.
22238384Sjkim
23238384Sjkim * This Software, including technical data, may be subject to U.S. export  control
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38238384Sjkim ***********************license end**************************************/
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45238384Sjkim
46238384Sjkim/**
47238384Sjkim * @file
48238384Sjkim *
49238384Sjkim * Function and structure definitions for random number generator hardware
50238384Sjkim *
51238384Sjkim * <hr>$Revision: 70030 $<hr>
52238384Sjkim */
53238384Sjkim
54238384Sjkim
55238384Sjkim#ifndef __CMVX_RNG_H__
56238384Sjkim#define __CMVX_RNG_H__
57238384Sjkim
58238384Sjkim#ifdef	__cplusplus
59238384Sjkimextern "C" {
60238384Sjkim#endif
61238384Sjkim
62238384Sjkim#define CVMX_RNG_LOAD_ADDRESS   CVMX_ADD_IO_SEG(cvmx_build_io_address(CVMX_OCT_DID_RNG, 0))
63238384Sjkim
64280304Sjkim/**
65280304Sjkim * Structure describing the data format used for IOBDMA stores to the RNG.
66280304Sjkim */
67238384Sjkimtypedef union
68280304Sjkim{
69280304Sjkim    uint64_t        u64;
70280304Sjkim    struct {
71238384Sjkim        uint64_t    scraddr : 8;    /**< the (64-bit word) location in scratchpad to write to (if len != 0) */
72280304Sjkim        uint64_t    len     : 8;    /**< the number of words in the response (0 => no response) */
73280304Sjkim        uint64_t    did     : 5;    /**< the ID of the device on the non-coherent bus */
74280304Sjkim        uint64_t    subdid  : 3;    /**< the sub ID of the device on the non-coherent bus */
75280304Sjkim        uint64_t    addr    :40;    /**< the address that will appear in the first tick on the NCB bus */
76280304Sjkim    } s;
77280304Sjkim} cvmx_rng_iobdma_data_t;
78280304Sjkim
79238384Sjkim/**
80280304Sjkim * Enables the random number generator. Must be called before RNG is used
81280304Sjkim */
82238384Sjkimstatic inline void cvmx_rng_enable(void)
83280304Sjkim{
84280304Sjkim    cvmx_rnm_ctl_status_t rnm_ctl_status;
85238384Sjkim    rnm_ctl_status.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS);
86280304Sjkim    rnm_ctl_status.s.ent_en = 1;
87280304Sjkim    rnm_ctl_status.s.rng_en = 1;
88280304Sjkim    cvmx_write_csr(CVMX_RNM_CTL_STATUS, rnm_ctl_status.u64);
89280304Sjkim}
90238384Sjkim/**
91280304Sjkim * Reads 8 bits of random data from Random number generator
92280304Sjkim *
93280304Sjkim * @return random data
94280304Sjkim */
95280304Sjkimstatic inline uint8_t cvmx_rng_get_random8(void)
96280304Sjkim{
97280304Sjkim    return cvmx_read64_uint8(CVMX_RNG_LOAD_ADDRESS);
98280304Sjkim}
99238384Sjkim
100238384Sjkim/**
101280304Sjkim * Reads 16 bits of random data from Random number generator
102280304Sjkim *
103280304Sjkim * @return random data
104238384Sjkim */
105238384Sjkimstatic inline uint16_t cvmx_rng_get_random16(void)
106238384Sjkim{
107238384Sjkim    return cvmx_read64_uint16(CVMX_RNG_LOAD_ADDRESS);
108238384Sjkim}
109280304Sjkim
110280304Sjkim/**
111280304Sjkim * Reads 32 bits of random data from Random number generator
112280304Sjkim *
113280304Sjkim * @return random data
114280304Sjkim */
115280304Sjkimstatic inline uint32_t cvmx_rng_get_random32(void)
116238384Sjkim{
117280304Sjkim    return cvmx_read64_uint32(CVMX_RNG_LOAD_ADDRESS);
118280304Sjkim}
119238384Sjkim
120238384Sjkim/**
121280304Sjkim * Reads 64 bits of random data from Random number generator
122280304Sjkim *
123280304Sjkim * @return random data
124280304Sjkim */
125280304Sjkimstatic inline uint64_t cvmx_rng_get_random64(void)
126280304Sjkim{
127280304Sjkim    return cvmx_read64_uint64(CVMX_RNG_LOAD_ADDRESS);
128280304Sjkim}
129280304Sjkim
130280304Sjkim/**
131238384Sjkim * Requests random data from the RNG block asynchronously using and IOBDMA operation.
132280304Sjkim * The random data will be written into the cores
133280304Sjkim * local memory at the specified address.  A SYNCIOBDMA
134280304Sjkim * operation should be issued to stall for completion of the write.
135238384Sjkim *
136280304Sjkim * @param scr_addr  Address in scratch memory to put the result
137280304Sjkim *                  MUST be a multiple of 8 bytes
138280304Sjkim * @param num_bytes Number of bytes of random data to write at
139280304Sjkim *                  scr_addr
140280304Sjkim *                  MUST be a multiple of 8 bytes
141280304Sjkim *
142280304Sjkim * @return 0 on success
143280304Sjkim *         1 on error
144280304Sjkim */
145238384Sjkimstatic inline int cvmx_rng_request_random_async(uint64_t scr_addr, uint64_t num_bytes)
146280304Sjkim{
147280304Sjkim    cvmx_rng_iobdma_data_t data;
148280304Sjkim
149238384Sjkim    if (num_bytes & 0x7 || scr_addr & 0x7)
150        return(1);
151
152    data.u64 = 0;
153    /* scr_addr must be 8 byte aligned */
154    data.s.scraddr = scr_addr >> 3;
155    data.s.len = num_bytes >> 3;
156    data.s.did = CVMX_OCT_DID_RNG;
157    cvmx_send_single(data.u64);
158    return(0);
159}
160
161#ifdef	__cplusplus
162}
163#endif
164
165#endif /*  __CMVX_RNG_H__  */
166