1210284Sjmallett/***********************license start***************
2232812Sjmallett * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
3215990Sjmallett * reserved.
4210284Sjmallett *
5210284Sjmallett *
6215990Sjmallett * Redistribution and use in source and binary forms, with or without
7215990Sjmallett * modification, are permitted provided that the following conditions are
8215990Sjmallett * met:
9210284Sjmallett *
10215990Sjmallett *   * Redistributions of source code must retain the above copyright
11215990Sjmallett *     notice, this list of conditions and the following disclaimer.
12210284Sjmallett *
13215990Sjmallett *   * Redistributions in binary form must reproduce the above
14215990Sjmallett *     copyright notice, this list of conditions and the following
15215990Sjmallett *     disclaimer in the documentation and/or other materials provided
16215990Sjmallett *     with the distribution.
17215990Sjmallett
18232812Sjmallett *   * Neither the name of Cavium Inc. nor the names of
19215990Sjmallett *     its contributors may be used to endorse or promote products
20215990Sjmallett *     derived from this software without specific prior written
21215990Sjmallett *     permission.
22215990Sjmallett
23215990Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215990Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215990Sjmallett * regulations, and may be subject to export or import  regulations in other
26215990Sjmallett * countries.
27215990Sjmallett
28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38210284Sjmallett ***********************license end**************************************/
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45215990Sjmallett
46210284Sjmallett/**
47210284Sjmallett * @file
48210284Sjmallett *
49210284Sjmallett * Function and structure definitions for random number generator hardware
50210284Sjmallett *
51232812Sjmallett * <hr>$Revision: 70030 $<hr>
52210284Sjmallett */
53210284Sjmallett
54210284Sjmallett
55210284Sjmallett#ifndef __CMVX_RNG_H__
56210284Sjmallett#define __CMVX_RNG_H__
57210284Sjmallett
58210284Sjmallett#ifdef	__cplusplus
59210284Sjmallettextern "C" {
60210284Sjmallett#endif
61210284Sjmallett
62210284Sjmallett#define CVMX_RNG_LOAD_ADDRESS   CVMX_ADD_IO_SEG(cvmx_build_io_address(CVMX_OCT_DID_RNG, 0))
63210284Sjmallett
64210284Sjmallett/**
65210284Sjmallett * Structure describing the data format used for IOBDMA stores to the RNG.
66210284Sjmallett */
67210284Sjmalletttypedef union
68210284Sjmallett{
69210284Sjmallett    uint64_t        u64;
70210284Sjmallett    struct {
71210284Sjmallett        uint64_t    scraddr : 8;    /**< the (64-bit word) location in scratchpad to write to (if len != 0) */
72210284Sjmallett        uint64_t    len     : 8;    /**< the number of words in the response (0 => no response) */
73210284Sjmallett        uint64_t    did     : 5;    /**< the ID of the device on the non-coherent bus */
74210284Sjmallett        uint64_t    subdid  : 3;    /**< the sub ID of the device on the non-coherent bus */
75210284Sjmallett        uint64_t    addr    :40;    /**< the address that will appear in the first tick on the NCB bus */
76210284Sjmallett    } s;
77210284Sjmallett} cvmx_rng_iobdma_data_t;
78210284Sjmallett
79210284Sjmallett/**
80210284Sjmallett * Enables the random number generator. Must be called before RNG is used
81210284Sjmallett */
82210284Sjmallettstatic inline void cvmx_rng_enable(void)
83210284Sjmallett{
84210284Sjmallett    cvmx_rnm_ctl_status_t rnm_ctl_status;
85215990Sjmallett    rnm_ctl_status.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS);
86210284Sjmallett    rnm_ctl_status.s.ent_en = 1;
87210284Sjmallett    rnm_ctl_status.s.rng_en = 1;
88210284Sjmallett    cvmx_write_csr(CVMX_RNM_CTL_STATUS, rnm_ctl_status.u64);
89210284Sjmallett}
90210284Sjmallett/**
91210284Sjmallett * Reads 8 bits of random data from Random number generator
92210284Sjmallett *
93210284Sjmallett * @return random data
94210284Sjmallett */
95210284Sjmallettstatic inline uint8_t cvmx_rng_get_random8(void)
96210284Sjmallett{
97210284Sjmallett    return cvmx_read64_uint8(CVMX_RNG_LOAD_ADDRESS);
98210284Sjmallett}
99210284Sjmallett
100210284Sjmallett/**
101210284Sjmallett * Reads 16 bits of random data from Random number generator
102210284Sjmallett *
103210284Sjmallett * @return random data
104210284Sjmallett */
105210284Sjmallettstatic inline uint16_t cvmx_rng_get_random16(void)
106210284Sjmallett{
107210284Sjmallett    return cvmx_read64_uint16(CVMX_RNG_LOAD_ADDRESS);
108210284Sjmallett}
109210284Sjmallett
110210284Sjmallett/**
111210284Sjmallett * Reads 32 bits of random data from Random number generator
112210284Sjmallett *
113210284Sjmallett * @return random data
114210284Sjmallett */
115210284Sjmallettstatic inline uint32_t cvmx_rng_get_random32(void)
116210284Sjmallett{
117210284Sjmallett    return cvmx_read64_uint32(CVMX_RNG_LOAD_ADDRESS);
118210284Sjmallett}
119210284Sjmallett
120210284Sjmallett/**
121210284Sjmallett * Reads 64 bits of random data from Random number generator
122210284Sjmallett *
123210284Sjmallett * @return random data
124210284Sjmallett */
125210284Sjmallettstatic inline uint64_t cvmx_rng_get_random64(void)
126210284Sjmallett{
127210284Sjmallett    return cvmx_read64_uint64(CVMX_RNG_LOAD_ADDRESS);
128210284Sjmallett}
129210284Sjmallett
130210284Sjmallett/**
131210284Sjmallett * Requests random data from the RNG block asynchronously using and IOBDMA operation.
132210284Sjmallett * The random data will be written into the cores
133210284Sjmallett * local memory at the specified address.  A SYNCIOBDMA
134210284Sjmallett * operation should be issued to stall for completion of the write.
135210284Sjmallett *
136210284Sjmallett * @param scr_addr  Address in scratch memory to put the result
137210284Sjmallett *                  MUST be a multiple of 8 bytes
138210284Sjmallett * @param num_bytes Number of bytes of random data to write at
139210284Sjmallett *                  scr_addr
140210284Sjmallett *                  MUST be a multiple of 8 bytes
141210284Sjmallett *
142210284Sjmallett * @return 0 on success
143210284Sjmallett *         1 on error
144210284Sjmallett */
145210284Sjmallettstatic inline int cvmx_rng_request_random_async(uint64_t scr_addr, uint64_t num_bytes)
146210284Sjmallett{
147210284Sjmallett    cvmx_rng_iobdma_data_t data;
148210284Sjmallett
149210284Sjmallett    if (num_bytes & 0x7 || scr_addr & 0x7)
150210284Sjmallett        return(1);
151210284Sjmallett
152232812Sjmallett    data.u64 = 0;
153210284Sjmallett    /* scr_addr must be 8 byte aligned */
154210284Sjmallett    data.s.scraddr = scr_addr >> 3;
155210284Sjmallett    data.s.len = num_bytes >> 3;
156210284Sjmallett    data.s.did = CVMX_OCT_DID_RNG;
157210284Sjmallett    cvmx_send_single(data.u64);
158210284Sjmallett    return(0);
159210284Sjmallett}
160210284Sjmallett
161210284Sjmallett#ifdef	__cplusplus
162210284Sjmallett}
163210284Sjmallett#endif
164210284Sjmallett
165210284Sjmallett#endif /*  __CMVX_RNG_H__  */
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