1232809Sjmallett/***********************license start***************
2232809Sjmallett * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights 
3232809Sjmallett * reserved.
4232809Sjmallett *
5232809Sjmallett *
6232809Sjmallett * Redistribution and use in source and binary forms, with or without
7232809Sjmallett * modification, are permitted provided that the following conditions are
8232809Sjmallett * met:
9232809Sjmallett *
10232809Sjmallett *   * Redistributions of source code must retain the above copyright
11232809Sjmallett *     notice, this list of conditions and the following disclaimer.
12232809Sjmallett *
13232809Sjmallett *   * Redistributions in binary form must reproduce the above
14232809Sjmallett *     copyright notice, this list of conditions and the following
15232809Sjmallett *     disclaimer in the documentation and/or other materials provided
16232809Sjmallett *     with the distribution.
17232809Sjmallett
18232809Sjmallett *   * Neither the name of Cavium Inc. nor the names of
19232809Sjmallett *     its contributors may be used to endorse or promote products
20232809Sjmallett *     derived from this software without specific prior written
21232809Sjmallett *     permission.  
22232809Sjmallett
23232809Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24232809Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25232809Sjmallett * regulations, and may be subject to export or import  regulations in other
26232809Sjmallett * countries. 
27232809Sjmallett
28232809Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 
29232809Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30232809Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31232809Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32232809Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33232809Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34232809Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35232809Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36232809Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37232809Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38232809Sjmallett ***********************license end**************************************/
39232809Sjmallett
40232809Sjmallett
41232809Sjmallett
42232809Sjmallett
43232809Sjmallett
44232809Sjmallett
45232809Sjmallett/*
46232809Sjmallett * File version info: $Id: cvmx-resources.config 70030 2012-02-16 04:23:43Z cchavva $
47232809Sjmallett *
48232809Sjmallett */
49232809Sjmallett#ifndef __CVMX_RESOURCES_CONFIG__
50232809Sjmallett#define __CVMX_RESOURCES_CONFIG__
51232809Sjmallett
52232809Sjmallett
53232809Sjmallett#if (CVMX_HELPER_FIRST_MBUFF_SKIP > 256)
54232809Sjmallett#error CVMX_HELPER_FIRST_MBUFF_SKIP is greater than the maximum of 256
55232809Sjmallett#endif
56232809Sjmallett
57232809Sjmallett#if (CVMX_HELPER_NOT_FIRST_MBUFF_SKIP > 256)
58232809Sjmallett#error CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is greater than the maximum of 256
59232809Sjmallett#endif
60232809Sjmallett
61232809Sjmallett
62232809Sjmallett/* Content below this point is only used by the cvmx-config tool, and is
63232809Sjmallett** not used by any C files as CAVIUM_COMPONENT_REQUIREMENT is never
64232809Sjmallettdefined.
65232809Sjmallett*/
66232809Sjmallett #ifdef CAVIUM_COMPONENT_REQUIREMENT
67232809Sjmallett    /* Define the number of LLM ports (interfaces), can be 1 or 2 */
68232809Sjmallett    cvmxconfig
69232809Sjmallett    {
70232809Sjmallett    	#if CVMX_LLM_CONFIG_NUM_PORTS == 2
71232809Sjmallett            define CVMX_LLM_NUM_PORTS value = 2;
72232809Sjmallett	#else
73232809Sjmallett            define CVMX_LLM_NUM_PORTS value = 1;
74232809Sjmallett	#endif
75232809Sjmallett    }
76232809Sjmallett    /* Control the setting of Null pointer detection, default to enabled */
77232809Sjmallett    cvmxconfig {
78232809Sjmallett    	#ifdef CVMX_CONFIG_NULL_POINTER_PROTECT
79232809Sjmallett            define CVMX_NULL_POINTER_PROTECT value = CVMX_CONFIG_NULL_POINTER_PROTECT;
80232809Sjmallett	#else
81232809Sjmallett            define CVMX_NULL_POINTER_PROTECT value = 1;
82232809Sjmallett	#endif
83232809Sjmallett    }
84232809Sjmallett    /* Control Debug prints, default to enabled */
85232809Sjmallett    cvmxconfig {
86232809Sjmallett    	#ifdef CVMX_CONFIG_ENABLE_DEBUG_PRINTS
87232809Sjmallett            define CVMX_ENABLE_DEBUG_PRINTS value = CVMX_CONFIG_ENABLE_DEBUG_PRINTS;
88232809Sjmallett	#else
89232809Sjmallett            define CVMX_ENABLE_DEBUG_PRINTS value = 1;
90232809Sjmallett	#endif
91232809Sjmallett    }
92232809Sjmallett
93232809Sjmallett    /* Define CVMX_ENABLE_DFA_FUNCTIONS to allocate resources for the DFA functions */
94232809Sjmallett    #ifdef CVMX_ENABLE_DFA_FUNCTIONS
95232809Sjmallett        cvmxconfig
96232809Sjmallett        {
97232809Sjmallett        	fpa CVMX_FPA_DFA_POOL
98232809Sjmallett                    size        = 2
99232809Sjmallett                    protected   = 1
100232809Sjmallett                    description = "DFA command buffers";
101232809Sjmallett        	fau CVMX_FAU_DFA_STATE
102232809Sjmallett                    size        = 8
103232809Sjmallett                    count       = 1
104232809Sjmallett                    description = "FAU registers for the state of the DFA command queue";
105232809Sjmallett        }
106232809Sjmallett    #endif
107232809Sjmallett
108232809Sjmallett    /* Define CVMX_ENABLE_PKO_FUNCTIONS to allocate resources for the PKO functions */
109232809Sjmallett    #ifdef CVMX_ENABLE_PKO_FUNCTIONS
110232809Sjmallett        cvmxconfig
111232809Sjmallett        {
112232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0
113232809Sjmallett		    value       = CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE0
114232809Sjmallett		    description = "PKO queues per port for interface 0 (ports 0-15)";
115232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1
116232809Sjmallett		    value       = CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE1
117232809Sjmallett		    description = "PKO queues per port for interface 1 (ports 16-31)";
118232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_INTERFACE2
119232809Sjmallett		    value       = CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE2
120232809Sjmallett		    description = "PKO queues per port for interface 2";
121232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_INTERFACE3
122232809Sjmallett		    value       = CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE3
123232809Sjmallett		    description = "PKO queues per port for interface 3";
124232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_INTERFACE4
125232809Sjmallett		    value       = CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE4
126232809Sjmallett		    description = "PKO queues per port for interface 4";
127232809Sjmallett                define CVMX_PKO_MAX_PORTS_INTERFACE0
128232809Sjmallett                    value       = CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0
129232809Sjmallett                    description = "Limit on the number of PKO ports enabled for interface 0";
130232809Sjmallett                define CVMX_PKO_MAX_PORTS_INTERFACE1
131232809Sjmallett                    value       = CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1
132232809Sjmallett                    description = "Limit on the number of PKO ports enabled for interface 1";
133232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_PCI
134232809Sjmallett		    value       = 1
135232809Sjmallett		    description = "PKO queues per port for PCI (ports 32-35)";
136232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_LOOP
137232809Sjmallett		    value       = 1
138232809Sjmallett		    description = "PKO queues per port for Loop devices (ports 36-39)";
139232809Sjmallett		/* We use two queues per port for SRIO0. Having two queues per
140232809Sjmallett		    port with two ports gives us four queues, one for each mailbox */
141232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_SRIO0
142232809Sjmallett		    value       = 2
143232809Sjmallett		    description = "PKO queues per port for SRIO0 devices (ports 40-41)";
144232809Sjmallett		/* We use two queues per port for SRIO1. Having two queues per
145232809Sjmallett		    port with two ports gives us four queues, one for each mailbox */
146232809Sjmallett		define CVMX_PKO_QUEUES_PER_PORT_SRIO1
147232809Sjmallett		    value       = 2
148232809Sjmallett		    description = "PKO queues per port for SRIO1 devices (ports 42-43)";
149232809Sjmallett                /* Set the IPD cache mode, select from cvmx_ipd_mode_t. */
150232809Sjmallett                define CVMX_IPD_DRAM_MODE
151232809Sjmallett                    value       = CVMX_HELPER_IPD_DRAM_MODE
152232809Sjmallett                    description	= "set the IPD cache mode to CVMX_IPD_OPC_MODE_STT";
153232809Sjmallett        	fpa CVMX_FPA_PACKET_POOL
154232809Sjmallett                    pool        = 0
155232809Sjmallett                    size        = 16
156232809Sjmallett                    priority    = 1
157232809Sjmallett                    protected   = 1
158232809Sjmallett                    description = "Packet buffers";
159232809Sjmallett        	fpa CVMX_FPA_OUTPUT_BUFFER_POOL
160232809Sjmallett                    size        = 8
161232809Sjmallett                    protected   = 1
162232809Sjmallett                    description = "PKO queue command buffers";
163232809Sjmallett        	scratch CVMX_SCR_SCRATCH
164232809Sjmallett                    size        = 8
165232809Sjmallett                    iobdma      = true
166232809Sjmallett                    permanent   = false
167232809Sjmallett                    description = "Generic scratch iobdma area";
168232809Sjmallett        }
169232809Sjmallett    #endif
170232809Sjmallett
171232809Sjmallett    /* Define CVMX_ENABLE_HELPER_FUNCTIONS to allocate resources for the helper functions */
172232809Sjmallett    #ifdef CVMX_ENABLE_HELPER_FUNCTIONS
173232809Sjmallett        cvmxconfig
174232809Sjmallett        {
175232809Sjmallett        	fpa CVMX_FPA_WQE_POOL
176232809Sjmallett                    size        = 1
177232809Sjmallett                    priority    = 1
178232809Sjmallett                    protected   = 1
179232809Sjmallett                    description = "Work queue entrys";
180232809Sjmallett        }
181232809Sjmallett    #endif
182232809Sjmallett
183232809Sjmallett    /* Define CVMX_ENABLE_TIMER_FUNCTIONS to allocate resources for the timer functions */
184232809Sjmallett    #ifdef CVMX_ENABLE_TIMER_FUNCTIONS
185232809Sjmallett        cvmxconfig
186232809Sjmallett        {
187232809Sjmallett        	fpa CVMX_FPA_TIMER_POOL
188232809Sjmallett                    size        = 8
189232809Sjmallett                    protected   = 1
190232809Sjmallett                    description = "TIM command buffers";
191232809Sjmallett        }
192232809Sjmallett    #endif
193232809Sjmallett
194232809Sjmallett#endif
195232809Sjmallett
196232809Sjmallett
197232809Sjmallett#endif  /* __CVMX_RESOURCES_CONFIG__ */
198