cvmx-pcm-defs.h revision 232812
1236769Sobrien/***********************license start*************** 2236769Sobrien * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights 3236769Sobrien * reserved. 4236769Sobrien * 5236769Sobrien * 6236769Sobrien * Redistribution and use in source and binary forms, with or without 7236769Sobrien * modification, are permitted provided that the following conditions are 8236769Sobrien * met: 9236769Sobrien * 10236769Sobrien * * Redistributions of source code must retain the above copyright 11236769Sobrien * notice, this list of conditions and the following disclaimer. 12236769Sobrien * 13236769Sobrien * * Redistributions in binary form must reproduce the above 14236769Sobrien * copyright notice, this list of conditions and the following 15236769Sobrien * disclaimer in the documentation and/or other materials provided 16236769Sobrien * with the distribution. 17236769Sobrien 18236769Sobrien * * Neither the name of Cavium Inc. nor the names of 19236769Sobrien * its contributors may be used to endorse or promote products 20236769Sobrien * derived from this software without specific prior written 21236769Sobrien * permission. 22236769Sobrien 23236769Sobrien * This Software, including technical data, may be subject to U.S. export control 24236769Sobrien * laws, including the U.S. Export Administration Act and its associated 25236769Sobrien * regulations, and may be subject to export or import regulations in other 26236769Sobrien * countries. 27236769Sobrien 28236769Sobrien * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29236769Sobrien * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30236769Sobrien * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31236769Sobrien * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32236769Sobrien * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33236769Sobrien * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34236769Sobrien * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35236769Sobrien * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36236769Sobrien * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37236769Sobrien * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38236769Sobrien ***********************license end**************************************/ 39236769Sobrien 40236769Sobrien 41236769Sobrien/** 42236769Sobrien * cvmx-pcm-defs.h 43236769Sobrien * 44236769Sobrien * Configuration and status register (CSR) type definitions for 45236769Sobrien * Octeon pcm. 46236769Sobrien * 47236769Sobrien * This file is auto generated. Do not edit. 48236769Sobrien * 49236769Sobrien * <hr>$Revision$<hr> 50236769Sobrien * 51236769Sobrien */ 52236769Sobrien#ifndef __CVMX_PCM_DEFS_H__ 53236769Sobrien#define __CVMX_PCM_DEFS_H__ 54236769Sobrien 55236769Sobrien#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 56236769Sobrienstatic inline uint64_t CVMX_PCM_CLKX_CFG(unsigned long offset) 57236769Sobrien{ 58236769Sobrien if (!( 59236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) || 60236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) || 61236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) || 62236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) || 63236769Sobrien (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1))))) 64236769Sobrien cvmx_warn("CVMX_PCM_CLKX_CFG(%lu) is invalid on this chip\n", offset); 65236769Sobrien return CVMX_ADD_IO_SEG(0x0001070000010000ull) + ((offset) & 1) * 16384; 66236769Sobrien} 67236769Sobrien#else 68236769Sobrien#define CVMX_PCM_CLKX_CFG(offset) (CVMX_ADD_IO_SEG(0x0001070000010000ull) + ((offset) & 1) * 16384) 69236769Sobrien#endif 70236769Sobrien#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 71236769Sobrienstatic inline uint64_t CVMX_PCM_CLKX_DBG(unsigned long offset) 72236769Sobrien{ 73236769Sobrien if (!( 74236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) || 75236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) || 76236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) || 77236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) || 78236769Sobrien (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1))))) 79236769Sobrien cvmx_warn("CVMX_PCM_CLKX_DBG(%lu) is invalid on this chip\n", offset); 80236769Sobrien return CVMX_ADD_IO_SEG(0x0001070000010038ull) + ((offset) & 1) * 16384; 81236769Sobrien} 82236769Sobrien#else 83236769Sobrien#define CVMX_PCM_CLKX_DBG(offset) (CVMX_ADD_IO_SEG(0x0001070000010038ull) + ((offset) & 1) * 16384) 84236769Sobrien#endif 85236769Sobrien#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 86236769Sobrienstatic inline uint64_t CVMX_PCM_CLKX_GEN(unsigned long offset) 87236769Sobrien{ 88236769Sobrien if (!( 89236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) || 90236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) || 91236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) || 92236769Sobrien (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) || 93236769Sobrien (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1))))) 94236769Sobrien cvmx_warn("CVMX_PCM_CLKX_GEN(%lu) is invalid on this chip\n", offset); 95236769Sobrien return CVMX_ADD_IO_SEG(0x0001070000010008ull) + ((offset) & 1) * 16384; 96236769Sobrien} 97236769Sobrien#else 98236769Sobrien#define CVMX_PCM_CLKX_GEN(offset) (CVMX_ADD_IO_SEG(0x0001070000010008ull) + ((offset) & 1) * 16384) 99236769Sobrien#endif 100236769Sobrien 101236769Sobrien/** 102236769Sobrien * cvmx_pcm_clk#_cfg 103236769Sobrien */ 104236769Sobrienunion cvmx_pcm_clkx_cfg { 105236769Sobrien uint64_t u64; 106236769Sobrien struct cvmx_pcm_clkx_cfg_s { 107236769Sobrien#ifdef __BIG_ENDIAN_BITFIELD 108236769Sobrien uint64_t fsyncgood : 1; /**< FSYNC status | NS 109236769Sobrien If 1, the last frame had a correctly positioned 110236769Sobrien fsync pulse 111236769Sobrien If 0, none/extra fsync pulse seen on most recent 112236769Sobrien frame 113236769Sobrien NOTE: this is intended for startup. the FSYNCEXTRA 114236769Sobrien and FSYNCMISSING interrupts are intended for 115236769Sobrien detecting loss of sync during normal operation. */ 116236769Sobrien uint64_t reserved_48_62 : 15; 117236769Sobrien uint64_t fsyncsamp : 16; /**< Number of ECLKs from internal BCLK edge to | NS 118236769Sobrien sample FSYNC 119236769Sobrien NOTE: used to sync to the start of a frame and to 120236769Sobrien check for FSYNC errors. */ 121236769Sobrien uint64_t reserved_26_31 : 6; 122236769Sobrien uint64_t fsynclen : 5; /**< Number of 1/2 BCLKs FSYNC is asserted for | NS 123236769Sobrien NOTE: only used when GEN==1 */ 124236769Sobrien uint64_t fsyncloc : 5; /**< FSYNC location, in 1/2 BCLKS before timeslot 0, | NS 125236769Sobrien bit 0. 126236769Sobrien NOTE: also used to detect framing errors and 127236769Sobrien therefore must have a correct value even if GEN==0 */ 128236769Sobrien uint64_t numslots : 10; /**< Number of 8-bit slots in a frame | NS 129236769Sobrien NOTE: this, along with EXTRABIT and Fbclk 130236769Sobrien determines FSYNC frequency when GEN == 1 131236769Sobrien NOTE: also used to detect framing errors and 132236769Sobrien therefore must have a correct value even if GEN==0 */ 133236769Sobrien uint64_t extrabit : 1; /**< If 0, no frame bit | NS 134236769Sobrien If 1, add one extra bit time for frame bit 135236769Sobrien NOTE: if GEN == 1, then FSYNC will be delayed one 136236769Sobrien extra bit time. 137236769Sobrien NOTE: also used to detect framing errors and 138236769Sobrien therefore must have a correct value even if GEN==0 139236769Sobrien NOTE: the extra bit comes from the LSB/MSB of the 140236769Sobrien first byte of the frame in the transmit memory 141236769Sobrien region. LSB vs MSB is determined from the setting 142236769Sobrien of PCMn_TDM_CFG[LSBFIRST]. */ 143236769Sobrien uint64_t bitlen : 2; /**< Number of BCLKs in a bit time. | NS 144236769Sobrien 0 : 1 BCLK 145236769Sobrien 1 : 2 BCLKs 146236769Sobrien 2 : 4 BCLKs 147236769Sobrien 3 : operation undefined */ 148236769Sobrien uint64_t bclkpol : 1; /**< If 0, BCLK rise edge is start of bit time | NS 149236769Sobrien If 1, BCLK fall edge is start of bit time 150236769Sobrien NOTE: also used to detect framing errors and 151236769Sobrien therefore must have a correct value even if GEN==0 */ 152236769Sobrien uint64_t fsyncpol : 1; /**< If 0, FSYNC idles low, asserts high | NS 153236769Sobrien If 1, FSYNC idles high, asserts low 154236769Sobrien NOTE: also used to detect framing errors and 155236769Sobrien therefore must have a correct value even if GEN==0 */ 156236769Sobrien uint64_t ena : 1; /**< If 0, Clock receiving logic is doing nothing | NS 157236769Sobrien 1, Clock receiving logic is looking for sync */ 158236769Sobrien#else 159236769Sobrien uint64_t ena : 1; 160236769Sobrien uint64_t fsyncpol : 1; 161236769Sobrien uint64_t bclkpol : 1; 162236769Sobrien uint64_t bitlen : 2; 163236769Sobrien uint64_t extrabit : 1; 164236769Sobrien uint64_t numslots : 10; 165236769Sobrien uint64_t fsyncloc : 5; 166236769Sobrien uint64_t fsynclen : 5; 167236769Sobrien uint64_t reserved_26_31 : 6; 168236769Sobrien uint64_t fsyncsamp : 16; 169236769Sobrien uint64_t reserved_48_62 : 15; 170236769Sobrien uint64_t fsyncgood : 1; 171236769Sobrien#endif 172236769Sobrien } s; 173236769Sobrien struct cvmx_pcm_clkx_cfg_s cn30xx; 174236769Sobrien struct cvmx_pcm_clkx_cfg_s cn31xx; 175236769Sobrien struct cvmx_pcm_clkx_cfg_s cn50xx; 176236769Sobrien struct cvmx_pcm_clkx_cfg_s cn61xx; 177236769Sobrien struct cvmx_pcm_clkx_cfg_s cnf71xx; 178236769Sobrien}; 179236769Sobrientypedef union cvmx_pcm_clkx_cfg cvmx_pcm_clkx_cfg_t; 180236769Sobrien 181236769Sobrien/** 182236769Sobrien * cvmx_pcm_clk#_dbg 183236769Sobrien */ 184236769Sobrienunion cvmx_pcm_clkx_dbg { 185236769Sobrien uint64_t u64; 186236769Sobrien struct cvmx_pcm_clkx_dbg_s { 187236769Sobrien#ifdef __BIG_ENDIAN_BITFIELD 188236769Sobrien uint64_t debuginfo : 64; /**< Miscellaneous debug information | NS */ 189236769Sobrien#else 190236769Sobrien uint64_t debuginfo : 64; 191236769Sobrien#endif 192236769Sobrien } s; 193236769Sobrien struct cvmx_pcm_clkx_dbg_s cn30xx; 194236769Sobrien struct cvmx_pcm_clkx_dbg_s cn31xx; 195236769Sobrien struct cvmx_pcm_clkx_dbg_s cn50xx; 196236769Sobrien struct cvmx_pcm_clkx_dbg_s cn61xx; 197236769Sobrien struct cvmx_pcm_clkx_dbg_s cnf71xx; 198236769Sobrien}; 199236769Sobrientypedef union cvmx_pcm_clkx_dbg cvmx_pcm_clkx_dbg_t; 200236769Sobrien 201236769Sobrien/** 202236769Sobrien * cvmx_pcm_clk#_gen 203236769Sobrien */ 204236769Sobrienunion cvmx_pcm_clkx_gen { 205236769Sobrien uint64_t u64; 206236769Sobrien struct cvmx_pcm_clkx_gen_s { 207236769Sobrien#ifdef __BIG_ENDIAN_BITFIELD 208236769Sobrien uint64_t deltasamp : 16; /**< Signed number of ECLKs to move sampled BCLK edge | NS 209236769Sobrien NOTE: the complete number of ECLKs to move is: 210236769Sobrien NUMSAMP + 2 + 1 + DELTASAMP 211236769Sobrien NUMSAMP to compensate for sampling delay 212236769Sobrien + 2 to compensate for dual-rank synchronizer 213236769Sobrien + 1 for uncertainity 214236769Sobrien + DELTASAMP to CMA/debugging */ 215236769Sobrien uint64_t numsamp : 16; /**< Number of ECLK samples to detect BCLK change when | NS 216236769Sobrien receiving clock. */ 217236769Sobrien uint64_t n : 32; /**< Determines BCLK frequency when generating clock | NS 218236769Sobrien NOTE: Fbclk = Feclk * N / 2^32 219236769Sobrien N = (Fbclk / Feclk) * 2^32 220236769Sobrien NOTE: writing N == 0 stops the clock generator, and 221236769Sobrien causes bclk and fsync to be RECEIVED */ 222236769Sobrien#else 223236769Sobrien uint64_t n : 32; 224236769Sobrien uint64_t numsamp : 16; 225236769Sobrien uint64_t deltasamp : 16; 226236769Sobrien#endif 227236769Sobrien } s; 228236769Sobrien struct cvmx_pcm_clkx_gen_s cn30xx; 229236769Sobrien struct cvmx_pcm_clkx_gen_s cn31xx; 230236769Sobrien struct cvmx_pcm_clkx_gen_s cn50xx; 231236769Sobrien struct cvmx_pcm_clkx_gen_s cn61xx; 232236769Sobrien struct cvmx_pcm_clkx_gen_s cnf71xx; 233236769Sobrien}; 234236769Sobrientypedef union cvmx_pcm_clkx_gen cvmx_pcm_clkx_gen_t; 235236769Sobrien 236236769Sobrien#endif 237236769Sobrien