cvmx-npi.h revision 210286
1/***********************license start*************** 2 * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 * 18 * * Neither the name of Cavium Networks nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 * 23 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 24 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS 25 * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 26 * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 27 * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 28 * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES 29 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR 30 * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET 31 * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT 32 * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 33 * 34 * 35 * For any questions regarding licensing please contact marketing@caviumnetworks.com 36 * 37 ***********************license end**************************************/ 38 39 40 41 42 43 44/** 45 * @file 46 * 47 * PCI / PCIe packet engine related structures. 48 * 49 * <hr>$Revision: 41586 $<hr> 50 */ 51 52#ifndef __CVMX_NPI_H__ 53#define __CVMX_NPI_H__ 54 55#ifdef __cplusplus 56extern "C" { 57#endif 58 59/** 60 * PCI / PCIe packet instruction header format 61 */ 62typedef union 63{ 64 uint64_t u64; 65 struct 66 { 67#if __BYTE_ORDER == __BIG_ENDIAN 68 uint64_t r : 1; /**< Packet is RAW */ 69 uint64_t g : 1; /**< Gather list is used */ 70 uint64_t dlengsz : 14; /**< Data length / Gather list size */ 71 uint64_t fsz : 6; /**< Front data size */ 72 uint64_t qos : 3; /**< POW QoS queue */ 73 uint64_t grp : 4; /**< POW Group */ 74 uint64_t rs : 1; /**< Real short */ 75 cvmx_pow_tag_type_t tt : 2; /**< POW Tag type */ 76 uint64_t tag : 32; /**< POW 32 bit tag */ 77#else 78 uint64_t tag : 32; 79 cvmx_pow_tag_type_t tt : 2; 80 uint64_t rs : 1; 81 uint64_t grp : 4; 82 uint64_t qos : 3; 83 uint64_t fsz : 6; 84 uint64_t dlengsz : 14; 85 uint64_t g : 1; 86 uint64_t r : 1; 87#endif 88 } s; 89} cvmx_npi_inst_hdr_t; 90 91/** 92 * PCI / PCIe packet data pointer formats 0-3 93 */ 94typedef union 95{ 96 uint64_t dptr0; 97 struct 98 { 99#if __BYTE_ORDER == __BIG_ENDIAN 100 uint64_t es : 2; /**< Endian swap mode */ 101 uint64_t ns : 1; /**< No snoop */ 102 uint64_t ro : 1; /**< Relaxed ordering */ 103 uint64_t addr : 60; /**< PCI/PCIe address */ 104#else 105 uint64_t addr : 60; 106 uint64_t ro : 1; 107 uint64_t ns : 1; 108 uint64_t es : 2; 109#endif 110 } dptr1; 111 struct 112 { 113#if __BYTE_ORDER == __BIG_ENDIAN 114 uint64_t pm : 2; /**< Parse mode */ 115 uint64_t sl : 7; /**< Skip length */ 116 uint64_t addr : 55; /**< PCI/PCIe address */ 117#else 118 uint64_t addr : 55; 119 uint64_t sl : 7; 120 uint64_t pm : 2; 121#endif 122 } dptr2; 123 struct 124 { 125#if __BYTE_ORDER == __BIG_ENDIAN 126 uint64_t es : 2; /**< Endian swap mode */ 127 uint64_t ns : 1; /**< No snoop */ 128 uint64_t ro : 1; /**< Relaxed ordering */ 129 uint64_t pm : 2; /**< Parse mode */ 130 uint64_t sl : 7; /**< Skip length */ 131 uint64_t addr : 51; /**< PCI/PCIe address */ 132#else 133 uint64_t addr : 51; 134 uint64_t sl : 7; 135 uint64_t pm : 2; 136 uint64_t ro : 1; 137 uint64_t ns : 1; 138 uint64_t es : 2; 139#endif 140 } dptr3; 141} cvmx_npi_dptr_t; 142 143#ifdef __cplusplus 144} 145#endif 146 147#endif /* __CVMX_NPI_H__ */ 148