cvmx-ixf18201.h revision 215976
1210284Sjmallett/***********************license start*************** 2210284Sjmallett * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights 3210284Sjmallett * reserved. 4210284Sjmallett * 5210284Sjmallett * 6210284Sjmallett * Redistribution and use in source and binary forms, with or without 7210284Sjmallett * modification, are permitted provided that the following conditions are 8210284Sjmallett * met: 9210284Sjmallett * 10210284Sjmallett * * Redistributions of source code must retain the above copyright 11210284Sjmallett * notice, this list of conditions and the following disclaimer. 12210284Sjmallett * 13210284Sjmallett * * Redistributions in binary form must reproduce the above 14210284Sjmallett * copyright notice, this list of conditions and the following 15210284Sjmallett * disclaimer in the documentation and/or other materials provided 16210284Sjmallett * with the distribution. 17210284Sjmallett 18210284Sjmallett * * Neither the name of Cavium Networks nor the names of 19210284Sjmallett * its contributors may be used to endorse or promote products 20210284Sjmallett * derived from this software without specific prior written 21210284Sjmallett * permission. 22210284Sjmallett 23210284Sjmallett * This Software, including technical data, may be subject to U.S. export control 24210284Sjmallett * laws, including the U.S. Export Administration Act and its associated 25210284Sjmallett * regulations, and may be subject to export or import regulations in other 26210284Sjmallett * countries. 27210284Sjmallett 28210284Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29210284Sjmallett * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR 30210284Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31210284Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32210284Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33210284Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34210284Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35210284Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36210284Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37210284Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38210284Sjmallett ***********************license end**************************************/ 39210284Sjmallett 40210284Sjmallett 41210284Sjmallett 42210284Sjmallett#ifndef __CVMX_IXF18201_H__ 43210284Sjmallett#define __CVMX_IXF18201_H__ 44210284Sjmallett 45210284Sjmallett#ifdef __cplusplus 46210284Sjmallettextern "C" { 47210284Sjmallett#endif 48210284Sjmallett 49210284Sjmallett/** 50210284Sjmallett * Initialize the IXF18201 SPI<->XAUI MAC. 51210284Sjmallett * @return 1 on success 52210284Sjmallett * 0 on failure 53210284Sjmallett */ 54210284Sjmallettint cvmx_ixf18201_init(void); 55210284Sjmallett 56210284Sjmallett/** 57210284Sjmallett * Read a 16 bit register from the IXF18201 58210284Sjmallett * 59210284Sjmallett * @param reg_addr Register address 60210284Sjmallett * 61210284Sjmallett * @return 16 bit register value 62210284Sjmallett */ 63210284Sjmallettuint16_t cvmx_ixf18201_read16(uint16_t reg_addr); 64210284Sjmallett/** 65210284Sjmallett * Write a 16 bit IXF18201 register 66210284Sjmallett * 67210284Sjmallett * @param reg_addr Register address 68210284Sjmallett * @param data Value to write 69210284Sjmallett * 70210284Sjmallett */ 71210284Sjmallettvoid cvmx_ixf18201_write16(uint16_t reg_addr, uint16_t data); 72210284Sjmallett/** 73210284Sjmallett * Write a 16 bit IXF18201 register 74210284Sjmallett * 75210284Sjmallett * @param reg_addr Register address (must be 4 byte aligned) 76210284Sjmallett * 77210284Sjmallett * @return 32 bit register value 78210284Sjmallett */ 79210284Sjmallettuint32_t cvmx_ixf18201_read32(uint16_t reg_addr); 80210284Sjmallett/** 81210284Sjmallett * Write a 32 bit IXF18201 register 82210284Sjmallett * 83210284Sjmallett * @param reg_addr Register address (must be 4 byte aligned) 84210284Sjmallett * @param data Value to write 85210284Sjmallett * 86210284Sjmallett */ 87210284Sjmallettvoid cvmx_ixf18201_write32(uint16_t reg_addr, uint32_t data); 88210284Sjmallett 89210284Sjmallett/** 90210284Sjmallett * Performs an MII clause 45 write using the MII block in IXF18201. 91210284Sjmallett * 92210284Sjmallett * @param mii_addr Device MII address 93210284Sjmallett * @param mmd MMD address (block within device) 94210284Sjmallett * @param reg Register address 95210284Sjmallett * @param val Value to write 96210284Sjmallett */ 97210284Sjmallettvoid cvmx_ixf18201_mii_write(int mii_addr, int mmd, uint16_t reg, uint16_t val); 98210284Sjmallett/** 99210284Sjmallett * Performs an MII clause 45 read using the MII block in IXF18201. 100210284Sjmallett * 101210284Sjmallett * @param mii_addr Device MII address 102210284Sjmallett * @param mmd MMD address (block within device) 103210284Sjmallett * @param reg Register address 104210284Sjmallett * @return register value read from device 105210284Sjmallett */ 106210284Sjmallettint cvmx_ixf18201_mii_read(int mii_addr, int mmd, uint16_t reg); 107210284Sjmallett 108210284Sjmallett#ifdef __cplusplus 109210284Sjmallett} 110210284Sjmallett#endif 111210284Sjmallett 112210284Sjmallett#endif /* __CVMX_IXF18201_H__ */ 113210284Sjmallett