1215976Sjmallett/***********************license start***************
2232812Sjmallett * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
3215976Sjmallett * reserved.
4215976Sjmallett *
5215976Sjmallett *
6215976Sjmallett * Redistribution and use in source and binary forms, with or without
7215976Sjmallett * modification, are permitted provided that the following conditions are
8215976Sjmallett * met:
9215976Sjmallett *
10215976Sjmallett *   * Redistributions of source code must retain the above copyright
11215976Sjmallett *     notice, this list of conditions and the following disclaimer.
12215976Sjmallett *
13215976Sjmallett *   * Redistributions in binary form must reproduce the above
14215976Sjmallett *     copyright notice, this list of conditions and the following
15215976Sjmallett *     disclaimer in the documentation and/or other materials provided
16215976Sjmallett *     with the distribution.
17215976Sjmallett
18232812Sjmallett *   * Neither the name of Cavium Inc. nor the names of
19215976Sjmallett *     its contributors may be used to endorse or promote products
20215976Sjmallett *     derived from this software without specific prior written
21215976Sjmallett *     permission.
22215976Sjmallett
23215976Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215976Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215976Sjmallett * regulations, and may be subject to export or import  regulations in other
26215976Sjmallett * countries.
27215976Sjmallett
28215976Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30215976Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215976Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215976Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215976Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215976Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35215976Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36215976Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37215976Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38215976Sjmallett ***********************license end**************************************/
39215976Sjmallett
40215976Sjmallett
41215976Sjmallett
42215976Sjmallett#ifndef __CVMX_IXF18201_H__
43215976Sjmallett#define __CVMX_IXF18201_H__
44215976Sjmallett
45215976Sjmallett#ifdef	__cplusplus
46215976Sjmallettextern "C" {
47215976Sjmallett#endif
48215976Sjmallett
49215976Sjmallett/**
50215976Sjmallett * Initialize the IXF18201 SPI<->XAUI MAC.
51215976Sjmallett * @return 1 on success
52215976Sjmallett *         0 on failure
53215976Sjmallett */
54215976Sjmallettint cvmx_ixf18201_init(void);
55215976Sjmallett
56215976Sjmallett/**
57215976Sjmallett * Read a 16 bit register from the IXF18201
58215976Sjmallett *
59215976Sjmallett * @param reg_addr Register address
60215976Sjmallett *
61215976Sjmallett * @return 16 bit register value
62215976Sjmallett */
63215976Sjmallettuint16_t cvmx_ixf18201_read16(uint16_t reg_addr);
64215976Sjmallett/**
65215976Sjmallett * Write a 16 bit IXF18201 register
66215976Sjmallett *
67215976Sjmallett * @param reg_addr Register address
68215976Sjmallett * @param data Value to write
69215976Sjmallett *
70215976Sjmallett */
71215976Sjmallettvoid cvmx_ixf18201_write16(uint16_t reg_addr, uint16_t data);
72215976Sjmallett/**
73215976Sjmallett * Write a 16 bit IXF18201 register
74215976Sjmallett *
75215976Sjmallett * @param reg_addr Register address (must be 4 byte aligned)
76215976Sjmallett *
77215976Sjmallett * @return 32 bit register value
78215976Sjmallett */
79215976Sjmallettuint32_t cvmx_ixf18201_read32(uint16_t reg_addr);
80215976Sjmallett/**
81215976Sjmallett * Write a 32 bit IXF18201 register
82215976Sjmallett *
83215976Sjmallett * @param reg_addr Register address (must be 4 byte aligned)
84215976Sjmallett * @param data Value to write
85215976Sjmallett *
86215976Sjmallett */
87215976Sjmallettvoid cvmx_ixf18201_write32(uint16_t reg_addr, uint32_t data);
88215976Sjmallett
89215976Sjmallett/**
90215976Sjmallett * Performs an MII clause 45 write using the MII block in IXF18201.
91215976Sjmallett *
92215976Sjmallett * @param mii_addr Device MII address
93215976Sjmallett * @param mmd      MMD address (block within device)
94215976Sjmallett * @param reg      Register address
95215976Sjmallett * @param val      Value to write
96215976Sjmallett */
97215976Sjmallettvoid cvmx_ixf18201_mii_write(int mii_addr, int mmd, uint16_t reg, uint16_t val);
98215976Sjmallett/**
99215976Sjmallett * Performs an MII clause 45 read using the MII block in IXF18201.
100215976Sjmallett *
101215976Sjmallett * @param mii_addr Device MII address
102215976Sjmallett * @param mmd      MMD address (block within device)
103215976Sjmallett * @param reg      Register address
104215976Sjmallett * @return  register value read from device
105215976Sjmallett */
106215976Sjmallettint cvmx_ixf18201_mii_read(int mii_addr, int mmd, uint16_t reg);
107215976Sjmallett
108215976Sjmallett#ifdef	__cplusplus
109215976Sjmallett}
110215976Sjmallett#endif
111215976Sjmallett
112215976Sjmallett#endif  /*  __CVMX_IXF18201_H__ */
113