opensolaris_atomic.S revision 170437 
1/*-
2 * Copyright (c) 2007 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/cddl/contrib/opensolaris/common/atomic/ia64/atomic.S 170437 2007-06-08 16:20:03Z marcel $
27 */
28
29#include <machine/asm.h>
30
31	.text
32
33/*
34 * uint64_t atomic_cas_64(volatile uint64_t *p, uint64_t cmp, uint64_t v)
35 */
36ENTRY(atomic_cas_64, 3)
37	mov             ar.ccv = r33
38	;;
39	cmpxchg8.acq    r8 = [r32], r34, ar.ccv
40	;;
41	br.ret.sptk     rp
42END(atomic_cas_64)
43
44/*
45 * uint64_t atomic_add_64_nv(volatile uint64_t *p, uint64_t v)
46 */
47ENTRY(atomic_add_64_nv, 2)
481:
49	ld8		r16 = [r32]
50	;;
51	mov		ar.ccv = r16
52	add		r8 = r16, r33
53	;;
54	cmpxchg8.acq	r17 = [r32], r8, ar.ccv
55	;;
56	cmp.eq		p6, p7 = r16, r17
57(p6)	br.ret.sptk	rp
58(p7)	br.cond.spnt	1b
59END(atomic_add_64_nv)
60
61/*
62 * uint8_t atomic_or_8_nv(volatile uint8_t *p, uint8_t v)
63 */
64ENTRY(atomic_or_8_nv, 2)
651:
66	ld8		r16 = [r32]
67	;;
68	mov		ar.ccv = r16
69	or		r8 = r16, r33
70	;;
71	cmpxchg1.acq	r17 = [r32], r8, ar.ccv
72	;;
73	cmp.eq		p6, p7 = r16, r17
74(p6)	br.ret.sptk	rp
75(p7)	br.cond.spnt	1b
76END(atomic_or_8_nv)
77
78ENTRY(membar_producer, 0)
79	mf.a
80	;;
81	br.ret.sptk	rp
82END(membar_producer)
83