1/*
2 * Copyright (c) 2010
3 *	Ben Gray <ben.r.gray@gmail.com>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by Ben Gray.
17 * 4. The name of the company nor the name of the author may be used to
18 *    endorse or promote products derived from this software without specific
19 *    prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
30 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35
36/*
37 * Texas Instruments - OMAP3xxx series processors
38 *
39 * Reference:
40 *  OMAP35x Applications Processor
41 *   Technical Reference Manual
42 *  (omap35xx_techref.pdf)
43 */
44#ifndef _TI_PRCM_H_
45#define _TI_PRCM_H_
46
47typedef enum {
48
49	/* System clocks, typically you can only call ti_prcm_clk_get_source_freq()
50	 * on these clocks as they are enabled by default.
51	 */
52	SYS_CLK = 1,
53
54	/* The MPU (ARM) core clock */
55	MPU_CLK = 20,
56
57	/* MMC modules */
58	MMC0_CLK = 100,
59	MMC1_CLK,
60	MMC2_CLK,
61	MMC3_CLK,
62	MMC4_CLK,
63	MMC5_CLK,
64
65	/* I2C modules */
66	I2C0_CLK = 200,
67	I2C1_CLK,
68	I2C2_CLK,
69	I2C3_CLK,
70	I2C4_CLK,
71
72	/* USB module(s) */
73	USBTLL_CLK = 300,
74	USBHSHOST_CLK,
75	USBFSHOST_CLK,
76	USBP1_PHY_CLK,
77	USBP2_PHY_CLK,
78	USBP1_UTMI_CLK,
79	USBP2_UTMI_CLK,
80	USBP1_HSIC_CLK,
81	USBP2_HSIC_CLK,
82
83	/* UART modules */
84	UART0_CLK = 400,
85	UART1_CLK,
86	UART2_CLK,
87	UART3_CLK,
88	UART4_CLK,
89	UART5_CLK,
90	UART6_CLK,
91	UART7_CLK,
92	UART8_CLK,
93
94	/* General purpose timer modules */
95	GPTIMER1_CLK = 500,
96	GPTIMER2_CLK,
97	GPTIMER3_CLK,
98	GPTIMER4_CLK,
99	GPTIMER5_CLK,
100	GPTIMER6_CLK,
101	GPTIMER7_CLK,
102	GPTIMER8_CLK,
103	GPTIMER9_CLK,
104	GPTIMER10_CLK,
105	GPTIMER11_CLK,
106	GPTIMER12_CLK,
107
108	/* McBSP module(s) */
109	MCBSP1_CLK = 600,
110	MCBSP2_CLK,
111	MCBSP3_CLK,
112	MCBSP4_CLK,
113	MCBSP5_CLK,
114
115	/* General purpose I/O modules */
116	GPIO0_CLK = 700,
117	GPIO1_CLK,
118	GPIO2_CLK,
119	GPIO3_CLK,
120	GPIO4_CLK,
121	GPIO5_CLK,
122	GPIO6_CLK,
123
124	/* sDMA module */
125	SDMA_CLK = 800,
126
127	/* DMTimer modules */
128	DMTIMER0_CLK = 900,
129	DMTIMER1_CLK,
130	DMTIMER2_CLK,
131	DMTIMER3_CLK,
132	DMTIMER4_CLK,
133	DMTIMER5_CLK,
134	DMTIMER6_CLK,
135	DMTIMER7_CLK,
136
137	/* CPSW modules */
138	CPSW_CLK = 1000,
139
140	/* Mentor USB modules */
141	MUSB0_CLK = 1100,
142
143	/* EDMA module */
144	EDMA_TPCC_CLK = 1200,
145	EDMA_TPTC0_CLK,
146	EDMA_TPTC1_CLK,
147	EDMA_TPTC2_CLK,
148
149	/* LCD controller module */
150	LCDC_CLK = 1300,
151
152	/* PWM modules */
153	PWMSS0_CLK = 1400,
154	PWMSS1_CLK,
155	PWMSS2_CLK,
156
157	/* Mailbox modules */
158	MAILBOX0_CLK = 1500,
159
160	/* Spinlock modules */
161	SPINLOCK0_CLK = 1600,
162
163	PRUSS_CLK = 1700,
164
165	INVALID_CLK_IDENT
166
167} clk_ident_t;
168
169/*
170 *
171 */
172typedef enum {
173	SYSCLK_CLK,   /* System clock */
174	EXT_CLK,
175
176	F32KHZ_CLK,   /* 32KHz clock */
177	F48MHZ_CLK,   /* 48MHz clock */
178	F64MHZ_CLK,   /* 64MHz clock */
179	F96MHZ_CLK,   /* 96MHz clock */
180
181} clk_src_t;
182
183struct ti_clock_dev {
184	/* The profile of the timer */
185	clk_ident_t  id;
186
187	/* A bunch of callbacks associated with the clock device */
188	int (*clk_activate)(struct ti_clock_dev *clkdev);
189	int (*clk_deactivate)(struct ti_clock_dev *clkdev);
190	int (*clk_set_source)(struct ti_clock_dev *clkdev,
191	    clk_src_t clksrc);
192	int (*clk_accessible)(struct ti_clock_dev *clkdev);
193	int (*clk_get_source_freq)(struct ti_clock_dev *clkdev,
194	    unsigned int *freq);
195};
196
197int ti_prcm_clk_valid(clk_ident_t clk);
198int ti_prcm_clk_enable(clk_ident_t clk);
199int ti_prcm_clk_disable(clk_ident_t clk);
200int ti_prcm_clk_accessible(clk_ident_t clk);
201int ti_prcm_clk_disable_autoidle(clk_ident_t clk);
202int ti_prcm_clk_set_source(clk_ident_t clk, clk_src_t clksrc);
203int ti_prcm_clk_get_source_freq(clk_ident_t clk, unsigned int *freq);
204void ti_prcm_reset(void);
205
206#endif   /* _TI_PRCM_H_ */
207