uart_dev_sa1110.h revision 259065
1133359Sobrien/*- 2133359Sobrien * Copyright (c) 2003 Marcel Moolenaar 3330569Sgordon * All rights reserved. 4133359Sobrien * 5133359Sobrien * Redistribution and use in source and binary forms, with or without 6133359Sobrien * modification, are permitted provided that the following conditions 7133359Sobrien * are met: 8133359Sobrien * 9133359Sobrien * 1. Redistributions of source code must retain the above copyright 10133359Sobrien * notice, this list of conditions and the following disclaimer. 11133359Sobrien * 2. Redistributions in binary form must reproduce the above copyright 12133359Sobrien * notice, this list of conditions and the following disclaimer in the 13133359Sobrien * documentation and/or other materials provided with the distribution. 14133359Sobrien * 15133359Sobrien * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16330569Sgordon * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17330569Sgordon * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18330569Sgordon * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19330569Sgordon * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20330569Sgordon * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21330569Sgordon * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22330569Sgordon * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23133359Sobrien * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24133359Sobrien * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25133359Sobrien * 26133359Sobrien * $FreeBSD: releng/10.0/sys/arm/sa11x0/uart_dev_sa1110.h 139735 2005-01-05 21:58:49Z imp $ 27139368Sobrien */ 28139368Sobrien 29139368Sobrien#ifndef _DEV_UART_DEV_SA1110_H_ 30133359Sobrien#define _DEV_UART_DEV_SA1110_H_ 31139368Sobrien 32139368Sobrien#define SACOM_FREQ (3686400 / 16) 33139368Sobrien#define SACOMSPEED(b) (SACOM_FREQ / (b) - 1) 34133359Sobrien 35139368Sobrien/* UART control register 0 */ 36133359Sobrien#define SACOM_CR0 0x00 37139368Sobrien#define CR0_PE 0x01 /* Parity enable */ 38139368Sobrien#define CR0_OES 0x02 /* Odd/even parity select */ 39#define CR0_SBS 0x04 /* Stop bit select */ 40#define CR0_DSS 0x08 /* Data size select */ 41#define CR0_SCE 0x10 /* Sample clock enable */ 42#define CR0_RCE 0x20 /* Receive clock edge enable */ 43#define CR0_TCE 0x40 /* Transmit clock edge enable */ 44 45/* UART control register 1 and 2 - baud rate divisor */ 46#define SACOM_CR1 0x04 47#define SACOM_CR2 0x08 48 49/* UART control register 3 */ 50#define SACOM_CR3 0x0C 51#define CR3_RXE 0x01 /* Receiver enable */ 52#define CR3_TXE 0x02 /* Transmitter enable */ 53#define CR3_BRK 0x04 /* Break */ 54#define CR3_RIE 0x08 /* Receive FIFO interrupt enable */ 55#define CR3_TIE 0x10 /* Transmit FIFO interrupt enable */ 56#define CR3_LBM 0x20 /* Loopback mode */ 57 58/* UART data register */ 59#define SACOM_DR 0x14 60#define DR_PRE 0x100 /* Parity error */ 61#define DR_FRE 0x200 /* Framing error */ 62#define DR_ROR 0x400 /* Receiver overrun */ 63 64/* UART status register 0 */ 65#define SACOM_SR0 0x1C 66#define SR0_TFS 0x01 /* Transmit FIFO service request */ 67#define SR0_RFS 0x02 /* Receive FIFO service request */ 68#define SR0_RID 0x04 /* Receiver idle */ 69#define SR0_RBB 0x08 /* Receiver begin of break */ 70#define SR0_REB 0x10 /* Receiver end of break */ 71#define SR0_EIF 0x20 /* Error in FIFO */ 72 73/* UART status register 1 */ 74#define SACOM_SR1 0x20 75#define SR1_TBY 0x01 /* Transmitter busy */ 76#define SR1_RNE 0x02 /* Receive FIFO not empty */ 77#define SR1_TNF 0x04 /* Transmit FIFO not full */ 78#define SR1_PRE 0x08 /* Parity error */ 79#define SR1_FRE 0x10 /* Framing error */ 80#define SR1_ROR 0x20 /* Receive FIFO overrun */ 81 82#define ISSET(a, b) ((a) & (b)) 83#endif 84