s3c24x0_machdep.c revision 247046
1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * machdep.c 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include "opt_ddb.h" 47 48#include <sys/cdefs.h> 49__FBSDID("$FreeBSD: head/sys/arm/s3c2xx0/s3c24x0_machdep.c 247046 2013-02-20 16:48:52Z alc $"); 50 51#define _ARM32_BUS_DMA_PRIVATE 52#include <sys/param.h> 53#include <sys/systm.h> 54#include <sys/sysproto.h> 55#include <sys/signalvar.h> 56#include <sys/imgact.h> 57#include <sys/kernel.h> 58#include <sys/ktr.h> 59#include <sys/linker.h> 60#include <sys/lock.h> 61#include <sys/malloc.h> 62#include <sys/mutex.h> 63#include <sys/pcpu.h> 64#include <sys/proc.h> 65#include <sys/ptrace.h> 66#include <sys/cons.h> 67#include <sys/bio.h> 68#include <sys/bus.h> 69#include <sys/buf.h> 70#include <sys/exec.h> 71#include <sys/kdb.h> 72#include <sys/msgbuf.h> 73#include <machine/reg.h> 74#include <machine/cpu.h> 75 76#include <vm/vm.h> 77#include <vm/pmap.h> 78#include <vm/vm_object.h> 79#include <vm/vm_page.h> 80#include <vm/vm_pager.h> 81#include <vm/vm_map.h> 82#include <vm/vnode_pager.h> 83#include <machine/pmap.h> 84#include <machine/vmparam.h> 85#include <machine/pcb.h> 86#include <machine/undefined.h> 87#include <machine/machdep.h> 88#include <machine/metadata.h> 89#include <machine/armreg.h> 90#include <machine/bus.h> 91#include <sys/reboot.h> 92 93#include <arm/s3c2xx0/s3c24x0var.h> 94#include <arm/s3c2xx0/s3c2410reg.h> 95#include <arm/s3c2xx0/s3c2xx0board.h> 96 97/* Page table for mapping proc0 zero page */ 98#define KERNEL_PT_SYS 0 99#define KERNEL_PT_KERN 1 100#define KERNEL_PT_KERN_NUM 44 101/* L2 table for mapping after kernel */ 102#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM 103#define KERNEL_PT_AFKERNEL_NUM 5 104 105/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 106#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 107 108extern int s3c2410_pclk; 109 110extern u_int data_abort_handler_address; 111extern u_int prefetch_abort_handler_address; 112extern u_int undefined_handler_address; 113 114struct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 115 116/* Physical and virtual addresses for some global pages */ 117 118vm_paddr_t phys_avail[10]; 119vm_paddr_t dump_avail[4]; 120 121struct pv_addr systempage; 122struct pv_addr msgbufpv; 123struct pv_addr irqstack; 124struct pv_addr undstack; 125struct pv_addr abtstack; 126struct pv_addr kernelstack; 127 128#define _A(a) ((a) & ~L1_S_OFFSET) 129#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 130 131/* Static device mappings. */ 132static const struct pmap_devmap s3c24x0_devmap[] = { 133 /* 134 * Map the devices we need early on. 135 */ 136 { 137 _A(S3C24X0_CLKMAN_BASE), 138 _A(S3C24X0_CLKMAN_PA_BASE), 139 _S(S3C24X0_CLKMAN_SIZE), 140 VM_PROT_READ|VM_PROT_WRITE, 141 PTE_NOCACHE, 142 }, 143 { 144 _A(S3C24X0_GPIO_BASE), 145 _A(S3C24X0_GPIO_PA_BASE), 146 _S(S3C2410_GPIO_SIZE), 147 VM_PROT_READ|VM_PROT_WRITE, 148 PTE_NOCACHE, 149 }, 150 { 151 _A(S3C24X0_INTCTL_BASE), 152 _A(S3C24X0_INTCTL_PA_BASE), 153 _S(S3C24X0_INTCTL_SIZE), 154 VM_PROT_READ|VM_PROT_WRITE, 155 PTE_NOCACHE, 156 }, 157 { 158 _A(S3C24X0_TIMER_BASE), 159 _A(S3C24X0_TIMER_PA_BASE), 160 _S(S3C24X0_TIMER_SIZE), 161 VM_PROT_READ|VM_PROT_WRITE, 162 PTE_NOCACHE, 163 }, 164 { 165 _A(S3C24X0_UART0_BASE), 166 _A(S3C24X0_UART0_PA_BASE), 167 _S(S3C24X0_UART_PA_BASE(3) - S3C24X0_UART0_PA_BASE), 168 VM_PROT_READ|VM_PROT_WRITE, 169 PTE_NOCACHE, 170 }, 171 { 172 _A(S3C24X0_WDT_BASE), 173 _A(S3C24X0_WDT_PA_BASE), 174 _S(S3C24X0_WDT_SIZE), 175 VM_PROT_READ|VM_PROT_WRITE, 176 PTE_NOCACHE, 177 }, 178 { 179 0, 180 0, 181 0, 182 0, 183 0, 184 } 185}; 186 187#undef _A 188#undef _S 189 190#define ioreg_read32(a) (*(volatile uint32_t *)(a)) 191#define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v)) 192 193struct arm32_dma_range s3c24x0_range = { 194 .dr_sysbase = 0, 195 .dr_busbase = 0, 196 .dr_len = 0, 197}; 198 199struct arm32_dma_range * 200bus_dma_get_range(void) 201{ 202 203 if (s3c24x0_range.dr_len == 0) { 204 s3c24x0_range.dr_sysbase = dump_avail[0]; 205 s3c24x0_range.dr_busbase = dump_avail[0]; 206 s3c24x0_range.dr_len = dump_avail[1] - dump_avail[0]; 207 } 208 return (&s3c24x0_range); 209} 210 211int 212bus_dma_get_range_nb(void) 213{ 214 return (1); 215} 216 217void * 218initarm(struct arm_boot_params *abp) 219{ 220 struct pv_addr kernel_l1pt; 221 int loop; 222 u_int l1pagetable; 223 vm_offset_t freemempos; 224 vm_offset_t afterkern; 225 vm_offset_t lastaddr; 226 227 int i; 228 uint32_t memsize; 229 230 boothowto = 0; /* Likely not needed */ 231 lastaddr = parse_boot_param(abp); 232 i = 0; 233 set_cpufuncs(); 234 cpufuncs.cf_sleep = s3c24x0_sleep; 235 236 pcpu0_init(); 237 238 /* Do basic tuning, hz etc */ 239 init_param1(); 240 241#define KERNEL_TEXT_BASE (KERNBASE) 242 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 243 /* Define a macro to simplify memory allocation */ 244#define valloc_pages(var, np) \ 245 alloc_pages((var).pv_va, (np)); \ 246 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 247 248#define alloc_pages(var, np) \ 249 (var) = freemempos; \ 250 freemempos += (np * PAGE_SIZE); \ 251 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 252 253 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 254 freemempos += PAGE_SIZE; 255 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 256 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 257 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 258 valloc_pages(kernel_pt_table[loop], 259 L2_TABLE_SIZE / PAGE_SIZE); 260 } else { 261 kernel_pt_table[loop].pv_va = freemempos - 262 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 263 L2_TABLE_SIZE_REAL; 264 kernel_pt_table[loop].pv_pa = 265 kernel_pt_table[loop].pv_va - KERNVIRTADDR + 266 KERNPHYSADDR; 267 } 268 } 269 /* 270 * Allocate a page for the system page mapped to V0x00000000 271 * This page will just contain the system vectors and can be 272 * shared by all processes. 273 */ 274 valloc_pages(systempage, 1); 275 276 /* Allocate stacks for all modes */ 277 valloc_pages(irqstack, IRQ_STACK_SIZE); 278 valloc_pages(abtstack, ABT_STACK_SIZE); 279 valloc_pages(undstack, UND_STACK_SIZE); 280 valloc_pages(kernelstack, KSTACK_PAGES); 281 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 282 /* 283 * Now we start construction of the L1 page table 284 * We start by mapping the L2 page tables into the L1. 285 * This means that we can replace L1 mappings later on if necessary 286 */ 287 l1pagetable = kernel_l1pt.pv_va; 288 289 /* Map the L2 pages tables in the L1 page table */ 290 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 291 &kernel_pt_table[KERNEL_PT_SYS]); 292 for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 293 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE, 294 &kernel_pt_table[KERNEL_PT_KERN + i]); 295 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 296 (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 297 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 298 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 299 - 1)); 300 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 301 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE, 302 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 303 } 304 305 /* Map the vector page. */ 306 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 307 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 308 /* Map the stack pages */ 309 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 310 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 311 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 312 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 313 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 314 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 315 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 316 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 317 318 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 319 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 320 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 321 msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 322 323 324 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 325 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 326 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 327 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 328 } 329 330 pmap_devmap_bootstrap(l1pagetable, s3c24x0_devmap); 331 332 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 333 setttb(kernel_l1pt.pv_pa); 334 cpu_tlb_flushID(); 335 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 336 337 /* 338 * Pages were allocated during the secondary bootstrap for the 339 * stacks for different CPU modes. 340 * We must now set the r13 registers in the different CPU modes to 341 * point to these stacks. 342 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 343 * of the stack memory. 344 */ 345 346 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 347 set_stackptrs(0); 348 349 /* 350 * We must now clean the cache again.... 351 * Cleaning may be done by reading new data to displace any 352 * dirty data in the cache. This will have happened in setttb() 353 * but since we are boot strapping the addresses used for the read 354 * may have just been remapped and thus the cache could be out 355 * of sync. A re-clean after the switch will cure this. 356 * After booting there are no gross reloations of the kernel thus 357 * this problem will not occur after initarm(). 358 */ 359 cpu_idcache_wbinv_all(); 360 361 /* Disable all peripheral interrupts */ 362 ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0); 363 memsize = board_init(); 364 /* Find pclk for uart */ 365 switch(ioreg_read32(S3C24X0_GPIO_BASE + GPIO_GSTATUS1) >> 16) { 366 case 0x3241: 367 s3c2410_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL, 368 &s3c2410_pclk); 369 break; 370 case 0x3244: 371 s3c2440_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL, 372 &s3c2410_pclk); 373 break; 374 } 375 cninit(); 376 377 /* Set stack for exception handlers */ 378 data_abort_handler_address = (u_int)data_abort_handler; 379 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 380 undefined_handler_address = (u_int)undefinedinstruction_bounce; 381 undefined_init(); 382 383 init_proc0(kernelstack.pv_va); 384 385 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 386 387 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1); 388 arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0])); 389 vm_max_kernel_address = KERNVIRTADDR + 3 * memsize; 390 pmap_bootstrap(freemempos, &kernel_l1pt); 391 msgbufp = (void*)msgbufpv.pv_va; 392 msgbufinit(msgbufp, msgbufsize); 393 mutex_init(); 394 395 physmem = memsize / PAGE_SIZE; 396 397 phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR; 398 phys_avail[1] = PHYSADDR + memsize; 399 phys_avail[2] = 0; 400 phys_avail[3] = 0; 401 402 init_param2(physmem); 403 kdb_init(); 404 405 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 406 sizeof(struct pcb))); 407} 408