s3c24x0_machdep.c revision 236828
1205354Simp/*- 2205354Simp * Copyright (c) 1994-1998 Mark Brinicombe. 3205354Simp * Copyright (c) 1994 Brini. 4205354Simp * All rights reserved. 5205354Simp * 6205354Simp * This code is derived from software written for Brini by Mark Brinicombe 7205354Simp * 8205354Simp * Redistribution and use in source and binary forms, with or without 9205354Simp * modification, are permitted provided that the following conditions 10205354Simp * are met: 11205354Simp * 1. Redistributions of source code must retain the above copyright 12205354Simp * notice, this list of conditions and the following disclaimer. 13205354Simp * 2. Redistributions in binary form must reproduce the above copyright 14205354Simp * notice, this list of conditions and the following disclaimer in the 15205354Simp * documentation and/or other materials provided with the distribution. 16205354Simp * 3. All advertising materials mentioning features or use of this software 17205354Simp * must display the following acknowledgement: 18205354Simp * This product includes software developed by Brini. 19205354Simp * 4. The name of the company nor the name of the author may be used to 20205354Simp * endorse or promote products derived from this software without specific 21205354Simp * prior written permission. 22205354Simp * 23205354Simp * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24205354Simp * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25205354Simp * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26205354Simp * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27205354Simp * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28205354Simp * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29205354Simp * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30205354Simp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31205354Simp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32205354Simp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33205354Simp * SUCH DAMAGE. 34205354Simp * 35205354Simp * RiscBSD kernel project 36205354Simp * 37205354Simp * machdep.c 38205354Simp * 39205354Simp * Machine dependant functions for kernel setup 40205354Simp * 41205354Simp * This file needs a lot of work. 42205354Simp * 43205354Simp * Created : 17/09/94 44205354Simp */ 45205354Simp 46205354Simp#include "opt_ddb.h" 47205354Simp 48205354Simp#include <sys/cdefs.h> 49205354Simp__FBSDID("$FreeBSD: head/sys/arm/s3c2xx0/s3c24x0_machdep.c 236828 2012-06-10 01:13:04Z andrew $"); 50205354Simp 51205354Simp#define _ARM32_BUS_DMA_PRIVATE 52205354Simp#include <sys/param.h> 53205354Simp#include <sys/systm.h> 54205354Simp#include <sys/sysproto.h> 55205354Simp#include <sys/signalvar.h> 56205354Simp#include <sys/imgact.h> 57205354Simp#include <sys/kernel.h> 58205354Simp#include <sys/ktr.h> 59205354Simp#include <sys/linker.h> 60205354Simp#include <sys/lock.h> 61205354Simp#include <sys/malloc.h> 62205354Simp#include <sys/mutex.h> 63205354Simp#include <sys/pcpu.h> 64205354Simp#include <sys/proc.h> 65205354Simp#include <sys/ptrace.h> 66205354Simp#include <sys/cons.h> 67205354Simp#include <sys/bio.h> 68205354Simp#include <sys/bus.h> 69205354Simp#include <sys/buf.h> 70205354Simp#include <sys/exec.h> 71205354Simp#include <sys/kdb.h> 72205354Simp#include <sys/msgbuf.h> 73205354Simp#include <machine/reg.h> 74205354Simp#include <machine/cpu.h> 75205354Simp 76205354Simp#include <vm/vm.h> 77205354Simp#include <vm/pmap.h> 78205354Simp#include <vm/vm_object.h> 79205354Simp#include <vm/vm_page.h> 80205354Simp#include <vm/vm_pager.h> 81205354Simp#include <vm/vm_map.h> 82205354Simp#include <vm/vnode_pager.h> 83205354Simp#include <machine/pmap.h> 84205354Simp#include <machine/vmparam.h> 85205354Simp#include <machine/pcb.h> 86205354Simp#include <machine/undefined.h> 87205354Simp#include <machine/machdep.h> 88205354Simp#include <machine/metadata.h> 89205354Simp#include <machine/armreg.h> 90205354Simp#include <machine/bus.h> 91205354Simp#include <sys/reboot.h> 92205354Simp 93205354Simp#include <arm/s3c2xx0/s3c24x0var.h> 94205354Simp#include <arm/s3c2xx0/s3c2410reg.h> 95205354Simp#include <arm/s3c2xx0/s3c2xx0board.h> 96205354Simp 97205354Simp/* Page table for mapping proc0 zero page */ 98205354Simp#define KERNEL_PT_SYS 0 99205354Simp#define KERNEL_PT_KERN 1 100205354Simp#define KERNEL_PT_KERN_NUM 44 101205354Simp/* L2 table for mapping after kernel */ 102205354Simp#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM 103205354Simp#define KERNEL_PT_AFKERNEL_NUM 5 104205354Simp 105205354Simp/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 106205354Simp#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 107205354Simp 108205354Simp/* Define various stack sizes in pages */ 109205354Simp#define IRQ_STACK_SIZE 1 110205354Simp#define ABT_STACK_SIZE 1 111205354Simp#define UND_STACK_SIZE 1 112205354Simp 113205354Simpextern int s3c2410_pclk; 114205354Simp 115205354Simpextern u_int data_abort_handler_address; 116205354Simpextern u_int prefetch_abort_handler_address; 117205354Simpextern u_int undefined_handler_address; 118205354Simp 119205354Simpstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 120205354Simp 121205354Simpextern void *_end; 122205354Simp 123205354Simpextern int *end; 124205354Simp 125205354Simpstruct pcpu __pcpu; 126205354Simpstruct pcpu *pcpup = &__pcpu; 127205354Simp 128205354Simp/* Physical and virtual addresses for some global pages */ 129205354Simp 130205354Simpvm_paddr_t phys_avail[10]; 131205354Simpvm_paddr_t dump_avail[4]; 132205354Simpvm_offset_t physical_pages; 133205354Simp 134205354Simpstruct pv_addr systempage; 135205354Simpstruct pv_addr msgbufpv; 136205354Simpstruct pv_addr irqstack; 137205354Simpstruct pv_addr undstack; 138205354Simpstruct pv_addr abtstack; 139205354Simpstruct pv_addr kernelstack; 140205354Simp 141205354Simp#define _A(a) ((a) & ~L1_S_OFFSET) 142205354Simp#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 143205354Simp 144205354Simp/* Static device mappings. */ 145205354Simpstatic const struct pmap_devmap s3c24x0_devmap[] = { 146210396Sandrew /* 147210396Sandrew * Map the devices we need early on. 148210396Sandrew */ 149205354Simp { 150205354Simp _A(S3C24X0_CLKMAN_BASE), 151205354Simp _A(S3C24X0_CLKMAN_PA_BASE), 152205354Simp _S(S3C24X0_CLKMAN_SIZE), 153205354Simp VM_PROT_READ|VM_PROT_WRITE, 154205354Simp PTE_NOCACHE, 155205354Simp }, 156205354Simp { 157205354Simp _A(S3C24X0_GPIO_BASE), 158205354Simp _A(S3C24X0_GPIO_PA_BASE), 159205354Simp _S(S3C2410_GPIO_SIZE), 160205354Simp VM_PROT_READ|VM_PROT_WRITE, 161205354Simp PTE_NOCACHE, 162205354Simp }, 163205354Simp { 164205354Simp _A(S3C24X0_INTCTL_BASE), 165205354Simp _A(S3C24X0_INTCTL_PA_BASE), 166205354Simp _S(S3C24X0_INTCTL_SIZE), 167205354Simp VM_PROT_READ|VM_PROT_WRITE, 168205354Simp PTE_NOCACHE, 169205354Simp }, 170205354Simp { 171210396Sandrew _A(S3C24X0_TIMER_BASE), 172210396Sandrew _A(S3C24X0_TIMER_PA_BASE), 173210396Sandrew _S(S3C24X0_TIMER_SIZE), 174205354Simp VM_PROT_READ|VM_PROT_WRITE, 175205354Simp PTE_NOCACHE, 176205354Simp }, 177205354Simp { 178205354Simp _A(S3C24X0_UART0_BASE), 179205354Simp _A(S3C24X0_UART0_PA_BASE), 180205354Simp _S(S3C24X0_UART_PA_BASE(3) - S3C24X0_UART0_PA_BASE), 181205354Simp VM_PROT_READ|VM_PROT_WRITE, 182205354Simp PTE_NOCACHE, 183205354Simp }, 184205354Simp { 185205354Simp _A(S3C24X0_WDT_BASE), 186205354Simp _A(S3C24X0_WDT_PA_BASE), 187205354Simp _S(S3C24X0_WDT_SIZE), 188205354Simp VM_PROT_READ|VM_PROT_WRITE, 189205354Simp PTE_NOCACHE, 190205354Simp }, 191205354Simp { 192205354Simp 0, 193205354Simp 0, 194205354Simp 0, 195205354Simp 0, 196205354Simp 0, 197205354Simp } 198205354Simp}; 199205354Simp 200205354Simp#undef _A 201205354Simp#undef _S 202205354Simp 203205354Simp#define ioreg_read32(a) (*(volatile uint32_t *)(a)) 204205354Simp#define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v)) 205205354Simp 206205354Simp#ifdef DDB 207205354Simpextern vm_offset_t ksym_start, ksym_end; 208205354Simp#endif 209205354Simp 210205354Simpstruct arm32_dma_range s3c24x0_range = { 211205354Simp .dr_sysbase = 0, 212205354Simp .dr_busbase = 0, 213205354Simp .dr_len = 0, 214205354Simp}; 215205354Simp 216205354Simpstruct arm32_dma_range * 217205354Simpbus_dma_get_range(void) 218205354Simp{ 219205354Simp 220205354Simp if (s3c24x0_range.dr_len == 0) { 221205354Simp s3c24x0_range.dr_sysbase = dump_avail[0]; 222205354Simp s3c24x0_range.dr_busbase = dump_avail[0]; 223205354Simp s3c24x0_range.dr_len = dump_avail[1] - dump_avail[0]; 224205354Simp } 225205354Simp return (&s3c24x0_range); 226205354Simp} 227205354Simp 228205354Simpint 229205354Simpbus_dma_get_range_nb(void) 230205354Simp{ 231205354Simp return (1); 232205354Simp} 233205354Simp 234205354Simpvoid * 235236524Simpinitarm(struct arm_boot_params *abp) 236205354Simp{ 237205354Simp struct pv_addr kernel_l1pt; 238205354Simp int loop; 239205354Simp u_int l1pagetable; 240205354Simp vm_offset_t freemempos; 241205354Simp vm_offset_t afterkern; 242205354Simp vm_offset_t lastaddr; 243205354Simp 244205354Simp int i; 245205354Simp uint32_t memsize; 246205354Simp 247205354Simp i = 0; 248205354Simp 249205354Simp boothowto = 0; 250205354Simp 251205354Simp set_cpufuncs(); 252205354Simp cpufuncs.cf_sleep = s3c24x0_sleep; 253205354Simp lastaddr = fake_preload_metadata(); 254205354Simp 255205354Simp pcpu_init(pcpup, 0, sizeof(struct pcpu)); 256205354Simp PCPU_SET(curthread, &thread0); 257205354Simp 258218913Scognet /* Do basic tuning, hz etc */ 259218913Scognet init_param1(); 260218913Scognet 261205354Simp#define KERNEL_TEXT_BASE (KERNBASE) 262205354Simp freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 263205354Simp /* Define a macro to simplify memory allocation */ 264205354Simp#define valloc_pages(var, np) \ 265205354Simp alloc_pages((var).pv_va, (np)); \ 266205354Simp (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 267205354Simp 268205354Simp#define alloc_pages(var, np) \ 269205354Simp (var) = freemempos; \ 270205354Simp freemempos += (np * PAGE_SIZE); \ 271205354Simp memset((char *)(var), 0, ((np) * PAGE_SIZE)); 272205354Simp 273205354Simp while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 274205354Simp freemempos += PAGE_SIZE; 275205354Simp valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 276205354Simp for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 277205354Simp if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 278205354Simp valloc_pages(kernel_pt_table[loop], 279205354Simp L2_TABLE_SIZE / PAGE_SIZE); 280205354Simp } else { 281205354Simp kernel_pt_table[loop].pv_va = freemempos - 282205354Simp (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 283205354Simp L2_TABLE_SIZE_REAL; 284205354Simp kernel_pt_table[loop].pv_pa = 285205354Simp kernel_pt_table[loop].pv_va - KERNVIRTADDR + 286205354Simp KERNPHYSADDR; 287205354Simp } 288205354Simp } 289205354Simp /* 290205354Simp * Allocate a page for the system page mapped to V0x00000000 291205354Simp * This page will just contain the system vectors and can be 292205354Simp * shared by all processes. 293205354Simp */ 294205354Simp valloc_pages(systempage, 1); 295205354Simp 296205354Simp /* Allocate stacks for all modes */ 297205354Simp valloc_pages(irqstack, IRQ_STACK_SIZE); 298205354Simp valloc_pages(abtstack, ABT_STACK_SIZE); 299205354Simp valloc_pages(undstack, UND_STACK_SIZE); 300205354Simp valloc_pages(kernelstack, KSTACK_PAGES); 301217688Spluknet valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 302205354Simp /* 303205354Simp * Now we start construction of the L1 page table 304205354Simp * We start by mapping the L2 page tables into the L1. 305205354Simp * This means that we can replace L1 mappings later on if necessary 306205354Simp */ 307205354Simp l1pagetable = kernel_l1pt.pv_va; 308205354Simp 309205354Simp /* Map the L2 pages tables in the L1 page table */ 310205354Simp pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 311205354Simp &kernel_pt_table[KERNEL_PT_SYS]); 312205354Simp for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 313205354Simp pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE, 314205354Simp &kernel_pt_table[KERNEL_PT_KERN + i]); 315205354Simp pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 316205354Simp (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 317205354Simp VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 318205354Simp afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 319205354Simp - 1)); 320205354Simp for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 321205354Simp pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE, 322205354Simp &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 323205354Simp } 324205354Simp 325205354Simp /* Map the vector page. */ 326205354Simp pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 327205354Simp VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 328205354Simp /* Map the stack pages */ 329205354Simp pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 330205354Simp IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 331205354Simp pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 332205354Simp ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 333205354Simp pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 334205354Simp UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 335205354Simp pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 336205354Simp KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 337205354Simp 338205354Simp pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 339205354Simp L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 340205354Simp pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 341217688Spluknet msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 342205354Simp 343205354Simp 344205354Simp for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 345205354Simp pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 346205354Simp kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 347205354Simp VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 348205354Simp } 349205354Simp 350205354Simp pmap_devmap_bootstrap(l1pagetable, s3c24x0_devmap); 351205354Simp 352205354Simp cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 353205354Simp setttb(kernel_l1pt.pv_pa); 354205354Simp cpu_tlb_flushID(); 355205354Simp cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 356205354Simp 357205354Simp /* 358205354Simp * Pages were allocated during the secondary bootstrap for the 359205354Simp * stacks for different CPU modes. 360205354Simp * We must now set the r13 registers in the different CPU modes to 361205354Simp * point to these stacks. 362205354Simp * Since the ARM stacks use STMFD etc. we must set r13 to the top end 363205354Simp * of the stack memory. 364205354Simp */ 365205354Simp 366205354Simp cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 367205354Simp set_stackptr(PSR_IRQ32_MODE, 368205354Simp irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 369205354Simp set_stackptr(PSR_ABT32_MODE, 370205354Simp abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 371205354Simp set_stackptr(PSR_UND32_MODE, 372205354Simp undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 373205354Simp 374205354Simp /* 375205354Simp * We must now clean the cache again.... 376205354Simp * Cleaning may be done by reading new data to displace any 377205354Simp * dirty data in the cache. This will have happened in setttb() 378205354Simp * but since we are boot strapping the addresses used for the read 379205354Simp * may have just been remapped and thus the cache could be out 380205354Simp * of sync. A re-clean after the switch will cure this. 381205354Simp * After booting there are no gross reloations of the kernel thus 382205354Simp * this problem will not occur after initarm(). 383205354Simp */ 384205354Simp cpu_idcache_wbinv_all(); 385205354Simp 386205354Simp /* Disable all peripheral interrupts */ 387205354Simp ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0); 388205354Simp memsize = board_init(); 389205354Simp /* Find pclk for uart */ 390205354Simp switch(ioreg_read32(S3C24X0_GPIO_BASE + GPIO_GSTATUS1) >> 16) { 391205354Simp case 0x3241: 392205354Simp s3c2410_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL, 393205354Simp &s3c2410_pclk); 394205354Simp break; 395205354Simp case 0x3244: 396205354Simp s3c2440_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL, 397205354Simp &s3c2410_pclk); 398205354Simp break; 399205354Simp } 400205354Simp cninit(); 401205354Simp 402205354Simp /* Set stack for exception handlers */ 403205354Simp data_abort_handler_address = (u_int)data_abort_handler; 404205354Simp prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 405205354Simp undefined_handler_address = (u_int)undefinedinstruction_bounce; 406205354Simp undefined_init(); 407205354Simp 408236828Sandrew init_proc0(kernelstack.pv_va); 409236828Sandrew 410205354Simp arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 411205354Simp 412205354Simp pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1); 413205354Simp /* 414205354Simp * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 415205354Simp * calling pmap_bootstrap. 416205354Simp */ 417205354Simp dump_avail[0] = PHYSADDR; 418205354Simp dump_avail[1] = PHYSADDR + memsize; 419205354Simp dump_avail[2] = 0; 420205354Simp dump_avail[3] = 0; 421205354Simp 422205354Simp pmap_bootstrap(freemempos, 423205354Simp KERNVIRTADDR + 3 * memsize, 424205354Simp &kernel_l1pt); 425205354Simp msgbufp = (void*)msgbufpv.pv_va; 426217688Spluknet msgbufinit(msgbufp, msgbufsize); 427205354Simp mutex_init(); 428205354Simp 429205354Simp physmem = memsize / PAGE_SIZE; 430205354Simp 431205354Simp phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR; 432205354Simp phys_avail[1] = PHYSADDR + memsize; 433205354Simp phys_avail[2] = 0; 434205354Simp phys_avail[3] = 0; 435205354Simp 436205354Simp init_param2(physmem); 437205354Simp kdb_init(); 438205354Simp 439205354Simp return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 440205354Simp sizeof(struct pcb))); 441205354Simp} 442