s3c24x0_machdep.c revision 205354 
1214152Sed/*-
2214152Sed * Copyright (c) 1994-1998 Mark Brinicombe.
3214152Sed * Copyright (c) 1994 Brini.
4214152Sed * All rights reserved.
5222656Sed *
6222656Sed * This code is derived from software written for Brini by Mark Brinicombe
7214152Sed *
8214152Sed * Redistribution and use in source and binary forms, with or without
9214152Sed * modification, are permitted provided that the following conditions
10214152Sed * are met:
11214152Sed * 1. Redistributions of source code must retain the above copyright
12214152Sed *    notice, this list of conditions and the following disclaimer.
13214152Sed * 2. Redistributions in binary form must reproduce the above copyright
14214152Sed *    notice, this list of conditions and the following disclaimer in the
15214152Sed *    documentation and/or other materials provided with the distribution.
16214152Sed * 3. All advertising materials mentioning features or use of this software
17214152Sed *    must display the following acknowledgement:
18214152Sed *      This product includes software developed by Brini.
19214152Sed * 4. The name of the company nor the name of the author may be used to
20214152Sed *    endorse or promote products derived from this software without specific
21222656Sed *    prior written permission.
22214152Sed *
23214152Sed * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24214152Sed * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25214152Sed * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26214152Sed * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27214152Sed * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28214152Sed * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29214152Sed * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30214152Sed * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31214152Sed * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32214152Sed * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33214152Sed * SUCH DAMAGE.
34214152Sed *
35214152Sed * RiscBSD kernel project
36214152Sed *
37 * machdep.c
38 *
39 * Machine dependant functions for kernel setup
40 *
41 * This file needs a lot of work.
42 *
43 * Created      : 17/09/94
44 */
45
46#include "opt_msgbuf.h"
47#include "opt_ddb.h"
48
49#include <sys/cdefs.h>
50__FBSDID("$FreeBSD: head/sys/arm/s3c2xx0/s3c24x0_machdep.c 205354 2010-03-20 03:39:35Z imp $");
51
52#define _ARM32_BUS_DMA_PRIVATE
53#include <sys/param.h>
54#include <sys/systm.h>
55#include <sys/sysproto.h>
56#include <sys/signalvar.h>
57#include <sys/imgact.h>
58#include <sys/kernel.h>
59#include <sys/ktr.h>
60#include <sys/linker.h>
61#include <sys/lock.h>
62#include <sys/malloc.h>
63#include <sys/mutex.h>
64#include <sys/pcpu.h>
65#include <sys/proc.h>
66#include <sys/ptrace.h>
67#include <sys/cons.h>
68#include <sys/bio.h>
69#include <sys/bus.h>
70#include <sys/buf.h>
71#include <sys/exec.h>
72#include <sys/kdb.h>
73#include <sys/msgbuf.h>
74#include <machine/reg.h>
75#include <machine/cpu.h>
76
77#include <vm/vm.h>
78#include <vm/pmap.h>
79#include <vm/vm_object.h>
80#include <vm/vm_page.h>
81#include <vm/vm_pager.h>
82#include <vm/vm_map.h>
83#include <vm/vnode_pager.h>
84#include <machine/pmap.h>
85#include <machine/vmparam.h>
86#include <machine/pcb.h>
87#include <machine/undefined.h>
88#include <machine/machdep.h>
89#include <machine/metadata.h>
90#include <machine/armreg.h>
91#include <machine/bus.h>
92#include <sys/reboot.h>
93
94#include <arm/s3c2xx0/s3c24x0var.h>
95#include <arm/s3c2xx0/s3c2410reg.h>
96#include <arm/s3c2xx0/s3c2xx0board.h>
97
98/* Page table for mapping proc0 zero page */
99#define KERNEL_PT_SYS		0
100#define KERNEL_PT_KERN		1
101#define KERNEL_PT_KERN_NUM	44
102/* L2 table for mapping after kernel */
103#define KERNEL_PT_AFKERNEL	KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
104#define	KERNEL_PT_AFKERNEL_NUM	5
105
106/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
107#define NUM_KERNEL_PTS		(KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
108
109/* Define various stack sizes in pages */
110#define IRQ_STACK_SIZE	1
111#define ABT_STACK_SIZE	1
112#define UND_STACK_SIZE	1
113
114extern int s3c2410_pclk;
115
116extern u_int data_abort_handler_address;
117extern u_int prefetch_abort_handler_address;
118extern u_int undefined_handler_address;
119
120struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
121
122extern void *_end;
123
124extern int *end;
125
126struct pcpu __pcpu;
127struct pcpu *pcpup = &__pcpu;
128
129/* Physical and virtual addresses for some global pages */
130
131vm_paddr_t phys_avail[10];
132vm_paddr_t dump_avail[4];
133vm_offset_t physical_pages;
134
135struct pv_addr systempage;
136struct pv_addr msgbufpv;
137struct pv_addr irqstack;
138struct pv_addr undstack;
139struct pv_addr abtstack;
140struct pv_addr kernelstack;
141
142static struct trapframe proc0_tf;
143
144#define	_A(a)	((a) & ~L1_S_OFFSET)
145#define	_S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
146
147/* Static device mappings. */
148static const struct pmap_devmap s3c24x0_devmap[] = {
149	{
150		_A(S3C24X0_CLKMAN_BASE),
151		_A(S3C24X0_CLKMAN_PA_BASE),
152		_S(S3C24X0_CLKMAN_SIZE),
153		VM_PROT_READ|VM_PROT_WRITE,
154		PTE_NOCACHE,
155	},
156	{
157		_A(S3C24X0_GPIO_BASE),
158		_A(S3C24X0_GPIO_PA_BASE),
159		_S(S3C2410_GPIO_SIZE),
160		VM_PROT_READ|VM_PROT_WRITE,
161		PTE_NOCACHE,
162	},
163	{
164		_A(S3C24X0_IIC_BASE),
165		_A(S3C24X0_IIC_PA_BASE),
166		_S(S3C24X0_IIC_SIZE),
167		VM_PROT_READ|VM_PROT_WRITE,
168		PTE_NOCACHE,
169	},
170	{
171		_A(S3C24X0_INTCTL_BASE),
172		_A(S3C24X0_INTCTL_PA_BASE),
173		_S(S3C24X0_INTCTL_SIZE),
174		VM_PROT_READ|VM_PROT_WRITE,
175		PTE_NOCACHE,
176	},
177	{
178		_A(S3C24X0_LCDC_BASE),
179		_A(S3C24X0_LCDC_PA_BASE),
180		_S(S3C24X0_LCDC_SIZE),
181		VM_PROT_READ|VM_PROT_WRITE,
182		PTE_NOCACHE,
183	},
184	{
185		_A(S3C24X0_SDI_BASE),
186		_A(S3C24X0_SDI_PA_BASE),
187		_S(S3C2410_SDI_SIZE),
188		VM_PROT_READ|VM_PROT_WRITE,
189		PTE_NOCACHE,
190	},
191	{
192		_A(S3C24X0_UART0_BASE),
193		_A(S3C24X0_UART0_PA_BASE),
194		_S(S3C24X0_UART_PA_BASE(3) - S3C24X0_UART0_PA_BASE),
195		VM_PROT_READ|VM_PROT_WRITE,
196		PTE_NOCACHE,
197	},
198	{
199		_A(S3C24X0_USBHC_BASE),
200		_A(S3C24X0_USBHC_PA_BASE),
201		_S(S3C24X0_USBHC_SIZE),
202		VM_PROT_READ|VM_PROT_WRITE,
203		PTE_NOCACHE,
204	},
205	{
206		_A(S3C24X0_WDT_BASE),
207		_A(S3C24X0_WDT_PA_BASE),
208		_S(S3C24X0_WDT_SIZE),
209		VM_PROT_READ|VM_PROT_WRITE,
210		PTE_NOCACHE,
211	},
212	{
213		0,
214		0,
215		0,
216		0,
217		0,
218	}
219};
220
221#undef	_A
222#undef	_S
223
224#define	ioreg_read32(a)  	(*(volatile uint32_t *)(a))
225#define	ioreg_write32(a,v)	(*(volatile uint32_t *)(a)=(v))
226
227#ifdef DDB
228extern vm_offset_t ksym_start, ksym_end;
229#endif
230
231struct arm32_dma_range s3c24x0_range = {
232	.dr_sysbase = 0,
233	.dr_busbase = 0,
234	.dr_len = 0,
235};
236
237struct arm32_dma_range *
238bus_dma_get_range(void)
239{
240
241	if (s3c24x0_range.dr_len == 0) {
242		s3c24x0_range.dr_sysbase = dump_avail[0];
243		s3c24x0_range.dr_busbase = dump_avail[0];
244		s3c24x0_range.dr_len = dump_avail[1] - dump_avail[0];
245	}
246	return (&s3c24x0_range);
247}
248
249int
250bus_dma_get_range_nb(void)
251{
252	return (1);
253}
254
255void *
256initarm(void *arg, void *arg2)
257{
258	struct pv_addr	kernel_l1pt;
259	int loop;
260	u_int l1pagetable;
261	vm_offset_t freemempos;
262	vm_offset_t afterkern;
263	vm_offset_t lastaddr;
264
265	int i;
266	uint32_t memsize;
267
268	i = 0;
269
270	boothowto = 0;
271
272	set_cpufuncs();
273	cpufuncs.cf_sleep = s3c24x0_sleep;
274	lastaddr = fake_preload_metadata();
275
276	pcpu_init(pcpup, 0, sizeof(struct pcpu));
277	PCPU_SET(curthread, &thread0);
278
279#define KERNEL_TEXT_BASE (KERNBASE)
280	freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
281	/* Define a macro to simplify memory allocation */
282#define valloc_pages(var, np)			\
283	alloc_pages((var).pv_va, (np));		\
284	(var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
285
286#define alloc_pages(var, np)			\
287	(var) = freemempos;			\
288	freemempos += (np * PAGE_SIZE);		\
289	memset((char *)(var), 0, ((np) * PAGE_SIZE));
290
291	while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
292		freemempos += PAGE_SIZE;
293	valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
294	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
295		if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
296			valloc_pages(kernel_pt_table[loop],
297			    L2_TABLE_SIZE / PAGE_SIZE);
298		} else {
299			kernel_pt_table[loop].pv_va = freemempos -
300			    (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
301			    L2_TABLE_SIZE_REAL;
302			kernel_pt_table[loop].pv_pa =
303			    kernel_pt_table[loop].pv_va - KERNVIRTADDR +
304			    KERNPHYSADDR;
305		}
306	}
307	/*
308	 * Allocate a page for the system page mapped to V0x00000000
309	 * This page will just contain the system vectors and can be
310	 * shared by all processes.
311	 */
312	valloc_pages(systempage, 1);
313
314	/* Allocate stacks for all modes */
315	valloc_pages(irqstack, IRQ_STACK_SIZE);
316	valloc_pages(abtstack, ABT_STACK_SIZE);
317	valloc_pages(undstack, UND_STACK_SIZE);
318	valloc_pages(kernelstack, KSTACK_PAGES);
319	valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
320	/*
321	 * Now we start construction of the L1 page table
322	 * We start by mapping the L2 page tables into the L1.
323	 * This means that we can replace L1 mappings later on if necessary
324	 */
325	l1pagetable = kernel_l1pt.pv_va;
326
327	/* Map the L2 pages tables in the L1 page table */
328	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
329	    &kernel_pt_table[KERNEL_PT_SYS]);
330	for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
331		pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
332		    &kernel_pt_table[KERNEL_PT_KERN + i]);
333	pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
334	   (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
335	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
336	afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
337	    - 1));
338	for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
339		pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
340		    &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
341	}
342
343	/* Map the vector page. */
344	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
345	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
346	/* Map the stack pages */
347	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
348	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
349	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
350	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
351	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
352	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
353	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
354	    KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
355
356	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
357	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
358	pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
359	    MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
360
361
362	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
363		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
364		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
365		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
366	}
367
368	pmap_devmap_bootstrap(l1pagetable, s3c24x0_devmap);
369
370	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
371	setttb(kernel_l1pt.pv_pa);
372	cpu_tlb_flushID();
373	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
374
375	/*
376	 * Pages were allocated during the secondary bootstrap for the
377	 * stacks for different CPU modes.
378	 * We must now set the r13 registers in the different CPU modes to
379	 * point to these stacks.
380	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
381	 * of the stack memory.
382	 */
383
384	cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
385	set_stackptr(PSR_IRQ32_MODE,
386	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
387	set_stackptr(PSR_ABT32_MODE,
388	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
389	set_stackptr(PSR_UND32_MODE,
390	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
391
392	/*
393	 * We must now clean the cache again....
394	 * Cleaning may be done by reading new data to displace any
395	 * dirty data in the cache. This will have happened in setttb()
396	 * but since we are boot strapping the addresses used for the read
397	 * may have just been remapped and thus the cache could be out
398	 * of sync. A re-clean after the switch will cure this.
399	 * After booting there are no gross reloations of the kernel thus
400	 * this problem will not occur after initarm().
401	 */
402	cpu_idcache_wbinv_all();
403
404	/* Disable all peripheral interrupts */
405	ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0);
406	memsize = board_init();
407	/* Find pclk for uart */
408	switch(ioreg_read32(S3C24X0_GPIO_BASE + GPIO_GSTATUS1) >> 16) {
409	case 0x3241:
410		s3c2410_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
411		    &s3c2410_pclk);
412		break;
413	case 0x3244:
414		s3c2440_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
415		    &s3c2410_pclk);
416		break;
417	}
418	cninit();
419
420	/* Set stack for exception handlers */
421	data_abort_handler_address = (u_int)data_abort_handler;
422	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
423	undefined_handler_address = (u_int)undefinedinstruction_bounce;
424	undefined_init();
425
426	proc_linkup(&proc0, &thread0);
427	thread0.td_kstack = kernelstack.pv_va;
428	thread0.td_pcb = (struct pcb *)
429		(thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
430	thread0.td_pcb->pcb_flags = 0;
431	thread0.td_frame = &proc0_tf;
432	pcpup->pc_curpcb = thread0.td_pcb;
433
434	arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
435
436	pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1);
437	/*
438	 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
439	 * calling pmap_bootstrap.
440	 */
441	dump_avail[0] = PHYSADDR;
442	dump_avail[1] = PHYSADDR + memsize;
443	dump_avail[2] = 0;
444	dump_avail[3] = 0;
445
446	pmap_bootstrap(freemempos,
447	    KERNVIRTADDR + 3 * memsize,
448	    &kernel_l1pt);
449	msgbufp = (void*)msgbufpv.pv_va;
450	msgbufinit(msgbufp, MSGBUF_SIZE);
451	mutex_init();
452
453	physmem = memsize / PAGE_SIZE;
454
455	phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR;
456	phys_avail[1] = PHYSADDR + memsize;
457	phys_avail[2] = 0;
458	phys_avail[3] = 0;
459
460	/* Do basic tuning, hz etc */
461	init_param1();
462	init_param2(physmem);
463	kdb_init();
464
465	return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
466	    sizeof(struct pcb)));
467}
468