1248557Sray/*-
2250357Sray * Copyright (c) 2012, 2013 The FreeBSD Foundation
3248557Sray * All rights reserved.
4248557Sray *
5248557Sray * This software was developed by Oleksandr Rybalko under sponsorship
6248557Sray * from the FreeBSD Foundation.
7248557Sray *
8248557Sray * Redistribution and use in source and binary forms, with or without
9248557Sray * modification, are permitted provided that the following conditions
10248557Sray * are met:
11248557Sray * 1.	Redistributions of source code must retain the above copyright
12248557Sray *	notice, this list of conditions and the following disclaimer.
13248557Sray * 2.	Redistributions in binary form must reproduce the above copyright
14248557Sray *	notice, this list of conditions and the following disclaimer in the
15248557Sray *	documentation and/or other materials provided with the distribution.
16248557Sray *
17248557Sray * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18248557Sray * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19248557Sray * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20248557Sray * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21248557Sray * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22248557Sray * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23248557Sray * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24248557Sray * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25248557Sray * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26248557Sray * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27248557Sray * SUCH DAMAGE.
28248557Sray *
29248557Sray * $FreeBSD$
30248557Sray */
31248557Sray
32248557Sray#define	WDOG_CLK_FREQ	32768
33248557Sray
34248557Sray#define	WDOG_CR_REG	0x00	/* Control Register */
35248557Sray#define		WDOG_CR_WT_MASK		0xff00	/* Count of 0.5 sec */
36248557Sray#define		WDOG_CR_WT_SHIFT	8
37248557Sray#define		WDOG_CR_WDW		(1 << 7) /* Suspend WDog */
38248557Sray#define		WDOG_CR_WDA		(1 << 5) /* Don't touch ipp_wdog */
39248557Sray#define		WDOG_CR_SRS		(1 << 4) /* Don't touch sys_reset */
40248557Sray#define		WDOG_CR_WDT		(1 << 3) /* Assert ipp_wdog on tout */
41248557Sray#define		WDOG_CR_WDE		(1 << 2) /* WDog Enable */
42248557Sray#define		WDOG_CR_WDBG		(1 << 1) /* Suspend when DBG mode */
43248557Sray#define		WDOG_CR_WDZST		(1 << 0) /* Suspend when LP mode */
44248557Sray
45248557Sray#define	WDOG_SR_REG	0x02	/* Service Register */
46248557Sray#define		WDOG_SR_STEP1		0x5555
47248557Sray#define		WDOG_SR_STEP2		0xaaaa
48248557Sray
49248557Sray#define	WDOG_RSR_REG	0x04	/* Reset Status Register */
50248557Sray#define		WDOG_RSR_TOUT		(1 << 1) /* Due WDog timeout reset */
51248557Sray#define		WDOG_RSR_SFTW		(1 << 0) /* Due Soft reset */
52248557Sray
53248557Sray#define	WDOG_ICR_REG	0x06	/* Interrupt Control Register */
54248557Sray#define		WDOG_ICR_WIE		(1 << 15) /* Enable Interrupt */
55248557Sray#define		WDOG_ICR_WTIS		(1 << 14) /* Interrupt has occurred */
56248557Sray#define		WDOG_ICR_WTCT_MASK	0x00ff
57248557Sray#define		WDOG_ICR_WTCT_SHIFT	0	/* Interrupt hold time */
58248557Sray
59248557Sray#define	WDOG_MCR_REG	0x08	/* Miscellaneous Control Register */
60248557Sray#define		WDOG_MCR_PDE		(1 << 0)
61248557Sray
62248557Sray#define	READ(_sc, _r)							\
63248557Sray		bus_space_read_2((_sc)->sc_bst, (_sc)->sc_bsh, (_r))
64248557Sray#define	WRITE(_sc, _r, _v)						\
65248557Sray		bus_space_write_2((_sc)->sc_bst, (_sc)->sc_bsh, (_r), (_v))
66