1/*-
2 * Copyright (c) 2009, Yohanes Nugroho <yohanes@gmail.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30#ifndef	_IF_ECEREG_H
31#define	_IF_ECEREG_H
32
33#define	ETH_CFG		0x08
34#define	ETH_CFG_RMII		(1 << 15)
35#define	PHY_CONTROL		0x00
36#define	PHY_RW_OK		(1<<15)
37
38#define	PHY_ADDRESS(x)		((x) & 0x1)
39#define	PHY_REGISTER(r)	(((r) & 0x1F) << 8)
40#define	PHY_WRITE_COMMAND	(1<<13)
41#define	PHY_READ_COMMAND	(1<<14)
42#define	PHY_GET_DATA(d)	(((d) >> 16) & 0xFFFF)
43#define	PHY_DATA(d)		(((d) & 0xFFFF) << 16)
44
45#define	PORT_0_CONFIG		0x08
46
47#define	ARL_TABLE_ACCESS_CONTROL_0	0x050
48#define	ARL_TABLE_ACCESS_CONTROL_1	0x054
49#define	ARL_TABLE_ACCESS_CONTROL_2	0x058
50
51#define	ARL_WRITE_COMMAND	(1<<3)
52#define	ARL_LOOKUP_COMMAND	(1<<2)
53#define	ARL_COMMAND_COMPLETE	(1)
54
55
56#define	PORT0			(1 << 0)
57#define	PORT1			(1 << 1)
58#define	CPU_PORT		(1 << 2)
59
60
61#define	VLAN0_GROUP_ID		(0)
62#define	VLAN1_GROUP_ID		(1)
63#define	VLAN2_GROUP_ID		(2)
64#define	VLAN3_GROUP_ID		(3)
65#define	VLAN4_GROUP_ID		(4)
66#define	VLAN5_GROUP_ID		(5)
67#define	VLAN6_GROUP_ID		(6)
68#define	VLAN7_GROUP_ID		(7)
69
70#define	PORT0_PVID		(VLAN1_GROUP_ID)
71#define	PORT1_PVID		(VLAN2_GROUP_ID)
72#define	CPU_PORT_PVID		(VLAN0_GROUP_ID)
73
74#define	VLAN0_VID		(0x111)
75#define	VLAN1_VID		(0x222)
76#define	VLAN2_VID		(0x333)
77#define	VLAN3_VID		(0x444)
78#define	VLAN4_VID		(0x555)
79#define	VLAN5_VID		(0x666)
80#define	VLAN6_VID		(0x777)
81#define	VLAN7_VID		(0x888)
82
83#define	VLAN0_GROUP		(PORT0 | PORT1 | CPU_PORT)
84#define	VLAN1_GROUP		(PORT0 | CPU_PORT)
85#define	VLAN2_GROUP		(PORT1 | CPU_PORT)
86#define	VLAN3_GROUP		(0)
87#define	VLAN4_GROUP		(0)
88#define	VLAN5_GROUP		(0)
89#define	VLAN6_GROUP		(0)
90#define	VLAN7_GROUP		(0)
91
92#define	SWITCH_CONFIG		0x004
93#define	MAC_PORT_0_CONFIG	0x008
94#define	MAC_PORT_1_CONFIG	0x00C
95#define	CPU_PORT_CONFIG	0x010
96#define	BIST_RESULT_TEST_0	0x094
97
98#define	FS_DMA_CONTROL		0x104
99#define	TS_DMA_CONTROL		0x100
100
101#define	INTERRUPT_MASK		0x08C
102#define	INTERRUPT_STATUS	0x088
103
104#define	TS_DESCRIPTOR_POINTER		0x108
105#define	TS_DESCRIPTOR_BASE_ADDR	0x110
106#define	FS_DESCRIPTOR_POINTER		0x10C
107#define	FS_DESCRIPTOR_BASE_ADDR	0x114
108
109
110#define	VLAN_VID_0_1		0x060
111#define	VLAN_VID_2_3		0x064
112#define	VLAN_VID_4_5		0x068
113#define	VLAN_VID_6_7		0x06C
114
115#define	VLAN_PORT_PVID		0x05C
116#define	VLAN_MEMBER_PORT_MAP		0x070
117#define	VLAN_TAG_PORT_MAP		0x074
118
119
120#define	ASIX_GIGA_PHY		1
121#define	TWO_SINGLE_PHY		2
122#define	AGERE_GIGA_PHY		3
123#define	VSC8601_GIGA_PHY	4
124#define	IC_PLUS_PHY		5
125#define	NOT_FOUND_PHY		(-1)
126
127#define	MAX_PACKET_LEN		(1536)
128
129#define	INVALID_ENTRY		0
130#define	NEW_ENTRY		0x1
131#define	STATIC_ENTRY		0x7
132
133/*mask status except for link change*/
134#define	ERROR_MASK		0xFFFFFF7F
135
136/*hardware interface flags*/
137
138#define	FAST_AGING		(0xf)
139#define	IVL_LEARNING		(0x1 << 22)
140/*hardware NAT accelerator*/
141#define	HARDWARE_NAT		(0x1 << 23)
142/*aging		time		setting*/
143
144/*skip lookup*/
145#define	SKIP_L2_LOOKUP_PORT_1	(1 << 29)
146#define	SKIP_L2_LOOKUP_PORT_0	(1 << 28)
147
148#define	NIC_MODE		(1 << 30)
149#define	PORT_DISABLE		(1 << 18)
150#define	SA_LEARNING_DISABLE		(1 << 19)
151#define	DISABLE_BROADCAST_PACKET	(1 << 27)
152#define	DISABLE_MULTICAST_PACKET	( 1 << 26)
153
154#endif
155