TableGen.cpp revision 239462
1226633Sdim//===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10226633Sdim// This file contains the main function for LLVM's TableGen. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14239462Sdim#include "TableGenBackends.h" // Declares all backends. 15239462Sdim 16223017Sdim#include "SetTheory.h" 17198090Srdivacky#include "llvm/Support/CommandLine.h" 18198090Srdivacky#include "llvm/Support/PrettyStackTrace.h" 19218893Sdim#include "llvm/Support/Signals.h" 20226633Sdim#include "llvm/TableGen/Error.h" 21226633Sdim#include "llvm/TableGen/Main.h" 22226633Sdim#include "llvm/TableGen/Record.h" 23226633Sdim#include "llvm/TableGen/TableGenAction.h" 24226633Sdim 25193323Sedusing namespace llvm; 26193323Sed 27193323Sedenum ActionType { 28193323Sed PrintRecords, 29193323Sed GenEmitter, 30224145Sdim GenRegisterInfo, 31224145Sdim GenInstrInfo, 32224145Sdim GenAsmWriter, 33224145Sdim GenAsmMatcher, 34199989Srdivacky GenDisassembler, 35224145Sdim GenPseudoLowering, 36193323Sed GenCallingConv, 37193323Sed GenDAGISel, 38234353Sdim GenDFAPacketizer, 39193323Sed GenFastISel, 40193323Sed GenSubtarget, 41193323Sed GenIntrinsic, 42193323Sed GenTgtIntrinsic, 43212904Sdim GenEDInfo, 44223017Sdim PrintEnums, 45223017Sdim PrintSets 46193323Sed}; 47193323Sed 48193323Sednamespace { 49193323Sed cl::opt<ActionType> 50193323Sed Action(cl::desc("Action to perform:"), 51193323Sed cl::values(clEnumValN(PrintRecords, "print-records", 52193323Sed "Print all records to stdout (default)"), 53193323Sed clEnumValN(GenEmitter, "gen-emitter", 54193323Sed "Generate machine code emitter"), 55224145Sdim clEnumValN(GenRegisterInfo, "gen-register-info", 56224145Sdim "Generate registers and register classes info"), 57224145Sdim clEnumValN(GenInstrInfo, "gen-instr-info", 58193323Sed "Generate instruction descriptions"), 59193323Sed clEnumValN(GenCallingConv, "gen-callingconv", 60193323Sed "Generate calling convention descriptions"), 61193323Sed clEnumValN(GenAsmWriter, "gen-asm-writer", 62193323Sed "Generate assembly writer"), 63199989Srdivacky clEnumValN(GenDisassembler, "gen-disassembler", 64199989Srdivacky "Generate disassembler"), 65224145Sdim clEnumValN(GenPseudoLowering, "gen-pseudo-lowering", 66224145Sdim "Generate pseudo instruction lowering"), 67198090Srdivacky clEnumValN(GenAsmMatcher, "gen-asm-matcher", 68198090Srdivacky "Generate assembly instruction matcher"), 69193323Sed clEnumValN(GenDAGISel, "gen-dag-isel", 70193323Sed "Generate a DAG instruction selector"), 71234353Sdim clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer", 72234353Sdim "Generate DFA Packetizer for VLIW targets"), 73193323Sed clEnumValN(GenFastISel, "gen-fast-isel", 74193323Sed "Generate a \"fast\" instruction selector"), 75193323Sed clEnumValN(GenSubtarget, "gen-subtarget", 76193323Sed "Generate subtarget enumerations"), 77193323Sed clEnumValN(GenIntrinsic, "gen-intrinsic", 78193323Sed "Generate intrinsic information"), 79193323Sed clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", 80193323Sed "Generate target intrinsic information"), 81203954Srdivacky clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info", 82203954Srdivacky "Generate enhanced disassembly info"), 83193323Sed clEnumValN(PrintEnums, "print-enums", 84193323Sed "Print enum values for a class"), 85223017Sdim clEnumValN(PrintSets, "print-sets", 86223017Sdim "Print expanded sets for testing DAG exprs"), 87193323Sed clEnumValEnd)); 88193323Sed 89193323Sed cl::opt<std::string> 90193323Sed Class("class", cl::desc("Print Enum list for this class"), 91234353Sdim cl::value_desc("class name")); 92239462Sdim 93234353Sdim class LLVMTableGenAction : public TableGenAction { 94234353Sdim public: 95234353Sdim bool operator()(raw_ostream &OS, RecordKeeper &Records) { 96234353Sdim switch (Action) { 97234353Sdim case PrintRecords: 98234353Sdim OS << Records; // No argument, dump all contents 99234353Sdim break; 100234353Sdim case GenEmitter: 101239462Sdim EmitCodeEmitter(Records, OS); 102234353Sdim break; 103234353Sdim case GenRegisterInfo: 104239462Sdim EmitRegisterInfo(Records, OS); 105234353Sdim break; 106234353Sdim case GenInstrInfo: 107239462Sdim EmitInstrInfo(Records, OS); 108234353Sdim break; 109234353Sdim case GenCallingConv: 110239462Sdim EmitCallingConv(Records, OS); 111234353Sdim break; 112234353Sdim case GenAsmWriter: 113239462Sdim EmitAsmWriter(Records, OS); 114234353Sdim break; 115234353Sdim case GenAsmMatcher: 116239462Sdim EmitAsmMatcher(Records, OS); 117234353Sdim break; 118234353Sdim case GenDisassembler: 119239462Sdim EmitDisassembler(Records, OS); 120234353Sdim break; 121234353Sdim case GenPseudoLowering: 122239462Sdim EmitPseudoLowering(Records, OS); 123234353Sdim break; 124234353Sdim case GenDAGISel: 125239462Sdim EmitDAGISel(Records, OS); 126234353Sdim break; 127234353Sdim case GenDFAPacketizer: 128239462Sdim EmitDFAPacketizer(Records, OS); 129234353Sdim break; 130234353Sdim case GenFastISel: 131239462Sdim EmitFastISel(Records, OS); 132234353Sdim break; 133234353Sdim case GenSubtarget: 134239462Sdim EmitSubtarget(Records, OS); 135234353Sdim break; 136234353Sdim case GenIntrinsic: 137239462Sdim EmitIntrinsics(Records, OS); 138234353Sdim break; 139234353Sdim case GenTgtIntrinsic: 140239462Sdim EmitIntrinsics(Records, OS, true); 141234353Sdim break; 142234353Sdim case GenEDInfo: 143239462Sdim EmitEnhancedDisassemblerInfo(Records, OS); 144234353Sdim break; 145234353Sdim case PrintEnums: 146234353Sdim { 147234353Sdim std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class); 148234353Sdim for (unsigned i = 0, e = Recs.size(); i != e; ++i) 149234353Sdim OS << Recs[i]->getName() << ", "; 150234353Sdim OS << "\n"; 151234353Sdim break; 152223017Sdim } 153234353Sdim case PrintSets: 154234353Sdim { 155234353Sdim SetTheory Sets; 156234353Sdim Sets.addFieldExpander("Set", "Elements"); 157234353Sdim std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set"); 158234353Sdim for (unsigned i = 0, e = Recs.size(); i != e; ++i) { 159234353Sdim OS << Recs[i]->getName() << " = ["; 160234353Sdim const std::vector<Record*> *Elts = Sets.expand(Recs[i]); 161234353Sdim assert(Elts && "Couldn't expand Set instance"); 162234353Sdim for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei) 163234353Sdim OS << ' ' << (*Elts)[ei]->getName(); 164234353Sdim OS << " ]\n"; 165234353Sdim } 166234353Sdim break; 167234353Sdim } 168234353Sdim } 169239462Sdim 170234353Sdim return false; 171223017Sdim } 172234353Sdim }; 173234353Sdim} 174208599Srdivacky 175226633Sdimint main(int argc, char **argv) { 176226633Sdim sys::PrintStackTraceOnErrorSignal(); 177226633Sdim PrettyStackTraceProgram X(argc, argv); 178226633Sdim cl::ParseCommandLineOptions(argc, argv); 179226633Sdim 180226633Sdim LLVMTableGenAction Action; 181226633Sdim return TableGenMain(argv[0], Action); 182193323Sed} 183