1254721Semaste//===-- RegisterContext_x86_64.h ---------------------------*- C++ -*-===// 2254721Semaste// 3254721Semaste// The LLVM Compiler Infrastructure 4254721Semaste// 5254721Semaste// This file is distributed under the University of Illinois Open Source 6254721Semaste// License. See LICENSE.TXT for details. 7254721Semaste// 8254721Semaste//===----------------------------------------------------------------------===// 9254721Semaste 10254721Semaste#ifndef liblldb_RegisterContext_x86_64_H_ 11254721Semaste#define liblldb_RegisterContext_x86_64_H_ 12254721Semaste 13254721Semaste#include "lldb/Core/Log.h" 14254721Semaste#include "RegisterContextPOSIX.h" 15254721Semaste 16254721Semasteclass ProcessMonitor; 17254721Semaste 18254721Semaste// Internal codes for all x86_64 registers. 19254721Semasteenum 20254721Semaste{ 21254721Semaste k_first_gpr, 22254721Semaste gpr_rax = k_first_gpr, 23254721Semaste gpr_rbx, 24254721Semaste gpr_rcx, 25254721Semaste gpr_rdx, 26254721Semaste gpr_rdi, 27254721Semaste gpr_rsi, 28254721Semaste gpr_rbp, 29254721Semaste gpr_rsp, 30254721Semaste gpr_r8, 31254721Semaste gpr_r9, 32254721Semaste gpr_r10, 33254721Semaste gpr_r11, 34254721Semaste gpr_r12, 35254721Semaste gpr_r13, 36254721Semaste gpr_r14, 37254721Semaste gpr_r15, 38254721Semaste gpr_rip, 39254721Semaste gpr_rflags, 40254721Semaste gpr_cs, 41254721Semaste gpr_fs, 42254721Semaste gpr_gs, 43254721Semaste gpr_ss, 44254721Semaste gpr_ds, 45254721Semaste gpr_es, 46254721Semaste k_first_i386, 47254721Semaste gpr_eax = k_first_i386, 48254721Semaste gpr_ebx, 49254721Semaste gpr_ecx, 50254721Semaste gpr_edx, 51254721Semaste gpr_edi, 52254721Semaste gpr_esi, 53254721Semaste gpr_ebp, 54254721Semaste gpr_esp, 55254721Semaste gpr_eip, 56254721Semaste gpr_eflags, // eRegisterKindLLDB == 33 57254721Semaste k_last_i386 = gpr_eflags, 58254721Semaste k_last_gpr = gpr_eflags, 59254721Semaste 60254721Semaste k_first_fpr, 61254721Semaste fpu_fcw = k_first_fpr, 62254721Semaste fpu_fsw, 63254721Semaste fpu_ftw, 64254721Semaste fpu_fop, 65254721Semaste fpu_ip, 66254721Semaste fpu_cs, 67254721Semaste fpu_dp, 68254721Semaste fpu_ds, 69254721Semaste fpu_mxcsr, 70254721Semaste fpu_mxcsrmask, 71254721Semaste fpu_stmm0, 72254721Semaste fpu_stmm1, 73254721Semaste fpu_stmm2, 74254721Semaste fpu_stmm3, 75254721Semaste fpu_stmm4, 76254721Semaste fpu_stmm5, 77254721Semaste fpu_stmm6, 78254721Semaste fpu_stmm7, 79254721Semaste fpu_xmm0, 80254721Semaste fpu_xmm1, 81254721Semaste fpu_xmm2, 82254721Semaste fpu_xmm3, 83254721Semaste fpu_xmm4, 84254721Semaste fpu_xmm5, 85254721Semaste fpu_xmm6, 86254721Semaste fpu_xmm7, 87254721Semaste fpu_xmm8, 88254721Semaste fpu_xmm9, 89254721Semaste fpu_xmm10, 90254721Semaste fpu_xmm11, 91254721Semaste fpu_xmm12, 92254721Semaste fpu_xmm13, 93254721Semaste fpu_xmm14, 94254721Semaste fpu_xmm15, 95254721Semaste k_last_fpr = fpu_xmm15, 96254721Semaste k_first_avx, 97254721Semaste fpu_ymm0 = k_first_avx, 98254721Semaste fpu_ymm1, 99254721Semaste fpu_ymm2, 100254721Semaste fpu_ymm3, 101254721Semaste fpu_ymm4, 102254721Semaste fpu_ymm5, 103254721Semaste fpu_ymm6, 104254721Semaste fpu_ymm7, 105254721Semaste fpu_ymm8, 106254721Semaste fpu_ymm9, 107254721Semaste fpu_ymm10, 108254721Semaste fpu_ymm11, 109254721Semaste fpu_ymm12, 110254721Semaste fpu_ymm13, 111254721Semaste fpu_ymm14, 112254721Semaste fpu_ymm15, 113254721Semaste k_last_avx = fpu_ymm15, 114254721Semaste 115254721Semaste dr0, 116254721Semaste dr1, 117254721Semaste dr2, 118254721Semaste dr3, 119254721Semaste dr4, 120254721Semaste dr5, 121254721Semaste dr6, 122254721Semaste dr7, 123254721Semaste 124254721Semaste k_num_registers, 125254721Semaste k_num_gpr_registers = k_last_gpr - k_first_gpr + 1, 126254721Semaste k_num_fpr_registers = k_last_fpr - k_first_fpr + 1, 127254721Semaste k_num_avx_registers = k_last_avx - k_first_avx + 1 128254721Semaste}; 129254721Semaste 130254721Semasteclass RegisterContext_x86_64 131254721Semaste : public RegisterContextPOSIX 132254721Semaste{ 133254721Semastepublic: 134254721Semaste RegisterContext_x86_64 (lldb_private::Thread &thread, 135254721Semaste uint32_t concrete_frame_idx); 136254721Semaste 137254721Semaste ~RegisterContext_x86_64(); 138254721Semaste 139254721Semaste void 140254721Semaste Invalidate(); 141254721Semaste 142254721Semaste void 143254721Semaste InvalidateAllRegisters(); 144254721Semaste 145254721Semaste size_t 146254721Semaste GetRegisterCount(); 147254721Semaste 148254721Semaste virtual size_t 149254721Semaste GetGPRSize() = 0; 150254721Semaste 151254721Semaste virtual unsigned 152254721Semaste GetRegisterSize(unsigned reg); 153254721Semaste 154254721Semaste virtual unsigned 155254721Semaste GetRegisterOffset(unsigned reg); 156254721Semaste 157254721Semaste const lldb_private::RegisterInfo * 158254721Semaste GetRegisterInfoAtIndex(size_t reg); 159254721Semaste 160254721Semaste size_t 161254721Semaste GetRegisterSetCount(); 162254721Semaste 163254721Semaste const lldb_private::RegisterSet * 164254721Semaste GetRegisterSet(size_t set); 165254721Semaste 166254721Semaste unsigned 167254721Semaste GetRegisterIndexFromOffset(unsigned offset); 168254721Semaste 169254721Semaste const char * 170254721Semaste GetRegisterName(unsigned reg); 171254721Semaste 172254721Semaste virtual bool 173254721Semaste ReadRegister(const lldb_private::RegisterInfo *reg_info, 174254721Semaste lldb_private::RegisterValue &value); 175254721Semaste 176254721Semaste bool 177254721Semaste ReadAllRegisterValues(lldb::DataBufferSP &data_sp); 178254721Semaste 179254721Semaste virtual bool 180254721Semaste WriteRegister(const lldb_private::RegisterInfo *reg_info, 181254721Semaste const lldb_private::RegisterValue &value); 182254721Semaste 183254721Semaste bool 184254721Semaste WriteAllRegisterValues(const lldb::DataBufferSP &data_sp); 185254721Semaste 186254721Semaste uint32_t 187254721Semaste ConvertRegisterKindToRegisterNumber(uint32_t kind, uint32_t num); 188254721Semaste 189254721Semaste uint32_t 190254721Semaste NumSupportedHardwareWatchpoints(); 191254721Semaste 192254721Semaste uint32_t 193254721Semaste SetHardwareWatchpoint(lldb::addr_t, size_t size, bool read, bool write); 194254721Semaste 195254721Semaste bool 196254721Semaste SetHardwareWatchpointWithIndex(lldb::addr_t, size_t size, bool read, 197254721Semaste bool write, uint32_t hw_index); 198254721Semaste 199254721Semaste bool 200254721Semaste ClearHardwareWatchpoint(uint32_t hw_index); 201254721Semaste 202254721Semaste bool 203254721Semaste HardwareSingleStep(bool enable); 204254721Semaste 205254721Semaste bool 206254721Semaste UpdateAfterBreakpoint(); 207254721Semaste 208254721Semaste bool 209254721Semaste IsWatchpointVacant(uint32_t hw_index); 210254721Semaste 211254721Semaste bool 212254721Semaste IsWatchpointHit (uint32_t hw_index); 213254721Semaste 214254721Semaste lldb::addr_t 215254721Semaste GetWatchpointAddress (uint32_t hw_index); 216254721Semaste 217254721Semaste bool 218254721Semaste ClearWatchpointHits(); 219254721Semaste 220254721Semaste //--------------------------------------------------------------------------- 221254721Semaste // Generic floating-point registers 222254721Semaste //--------------------------------------------------------------------------- 223254721Semaste 224254721Semaste struct MMSReg 225254721Semaste { 226254721Semaste uint8_t bytes[10]; 227254721Semaste uint8_t pad[6]; 228254721Semaste }; 229254721Semaste 230254721Semaste struct XMMReg 231254721Semaste { 232254721Semaste uint8_t bytes[16]; // 128-bits for each XMM register 233254721Semaste }; 234254721Semaste 235254721Semaste struct FXSAVE 236254721Semaste { 237254721Semaste uint16_t fcw; 238254721Semaste uint16_t fsw; 239254721Semaste uint16_t ftw; 240254721Semaste uint16_t fop; 241254721Semaste uint64_t ip; 242254721Semaste uint64_t dp; 243254721Semaste uint32_t mxcsr; 244254721Semaste uint32_t mxcsrmask; 245254721Semaste MMSReg stmm[8]; 246254721Semaste XMMReg xmm[16]; 247254721Semaste uint32_t padding[24]; 248254721Semaste }; 249254721Semaste 250254721Semaste //--------------------------------------------------------------------------- 251254721Semaste // Extended floating-point registers 252254721Semaste //--------------------------------------------------------------------------- 253254721Semaste struct YMMHReg 254254721Semaste { 255254721Semaste uint8_t bytes[16]; // 16 * 8 bits for the high bytes of each YMM register 256254721Semaste }; 257254721Semaste 258254721Semaste struct YMMReg 259254721Semaste { 260254721Semaste uint8_t bytes[32]; // 16 * 16 bits for each YMM register 261254721Semaste }; 262254721Semaste 263254721Semaste struct YMM 264254721Semaste { 265254721Semaste YMMReg ymm[16]; // assembled from ymmh and xmm registers 266254721Semaste }; 267254721Semaste 268254721Semaste struct XSAVE_HDR 269254721Semaste { 270254721Semaste uint64_t xstate_bv; // OS enabled xstate mask to determine the extended states supported by the processor 271254721Semaste uint64_t reserved1[2]; 272254721Semaste uint64_t reserved2[5]; 273254721Semaste } __attribute__((packed)); 274254721Semaste 275254721Semaste // x86 extensions to FXSAVE (i.e. for AVX processors) 276254721Semaste struct XSAVE 277254721Semaste { 278254721Semaste FXSAVE i387; // floating point registers typical in i387_fxsave_struct 279254721Semaste XSAVE_HDR header; // The xsave_hdr_struct can be used to determine if the following extensions are usable 280254721Semaste YMMHReg ymmh[16]; // High 16 bytes of each of 16 YMM registers (the low bytes are in FXSAVE.xmm for compatibility with SSE) 281254721Semaste // Slot any extensions to the register file here 282254721Semaste } __attribute__((packed, aligned (64))); 283254721Semaste 284254721Semaste struct IOVEC 285254721Semaste { 286254721Semaste void *iov_base; // pointer to XSAVE 287254721Semaste size_t iov_len; // sizeof(XSAVE) 288254721Semaste }; 289254721Semaste 290254721Semaste //--------------------------------------------------------------------------- 291254721Semaste // Note: prefer kernel definitions over user-land 292254721Semaste //--------------------------------------------------------------------------- 293254721Semaste enum FPRType 294254721Semaste { 295254721Semaste eNotValid = 0, 296254721Semaste eFSAVE, // TODO 297254721Semaste eFXSAVE, 298254721Semaste eSOFT, // TODO 299254721Semaste eXSAVE 300254721Semaste }; 301254721Semaste 302254721Semaste // Floating-point registers 303254721Semaste struct FPR 304254721Semaste { 305254721Semaste // Thread state for the floating-point unit of the processor read by ptrace. 306254721Semaste union XSTATE { 307254721Semaste FXSAVE fxsave; // Generic floating-point registers. 308254721Semaste XSAVE xsave; // x86 extended processor state. 309254721Semaste } xstate; 310254721Semaste }; 311254721Semaste 312254721Semasteprotected: 313254721Semaste // Determines if an extended register set is supported on the processor running the inferior process. 314254721Semaste virtual bool 315254721Semaste IsRegisterSetAvailable(size_t set_index); 316254721Semaste 317254721Semaste virtual const lldb_private::RegisterInfo * 318254721Semaste GetRegisterInfo(); 319254721Semaste 320254721Semaste virtual bool 321254721Semaste ReadRegister(const unsigned reg, lldb_private::RegisterValue &value); 322254721Semaste 323254721Semaste virtual bool 324254721Semaste WriteRegister(const unsigned reg, const lldb_private::RegisterValue &value); 325254721Semaste 326254721Semasteprivate: 327254721Semaste uint64_t m_gpr[k_num_gpr_registers]; // general purpose registers. 328254721Semaste FPRType m_fpr_type; // determines the type of data stored by union FPR, if any. 329254721Semaste FPR m_fpr; // floating-point registers including extended register sets. 330254721Semaste IOVEC m_iovec; // wrapper for xsave. 331254721Semaste YMM m_ymm_set; // copy of ymmh and xmm register halves. 332254721Semaste 333254721Semaste ProcessMonitor &GetMonitor(); 334254721Semaste lldb::ByteOrder GetByteOrder(); 335254721Semaste 336254721Semaste bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order); 337254721Semaste bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order); 338254721Semaste bool IsFPR(unsigned reg, FPRType fpr_type); 339254721Semaste 340254721Semaste bool ReadGPR(); 341254721Semaste bool ReadFPR(); 342254721Semaste 343254721Semaste bool WriteGPR(); 344254721Semaste bool WriteFPR(); 345254721Semaste}; 346254721Semaste 347254721Semaste#endif // #ifndef liblldb_RegisterContext_x86_64_H_ 348