1193323Sed//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
2193323Sed//
3193323Sed//                     The LLVM Compiler Infrastructure
4193323Sed//
5193323Sed// This file is distributed under the University of Illinois Open Source
6193323Sed// License. See LICENSE.TXT for details.
7193323Sed//
8193323Sed//===----------------------------------------------------------------------===//
9193323Sed//
10193323Sed//
11193323Sed//===----------------------------------------------------------------------===//
12193323Sed
13193323Sed#include "XCoreTargetMachine.h"
14193323Sed#include "XCore.h"
15249423Sdim#include "llvm/CodeGen/Passes.h"
16249423Sdim#include "llvm/IR/Module.h"
17193323Sed#include "llvm/PassManager.h"
18226633Sdim#include "llvm/Support/TargetRegistry.h"
19193323Sedusing namespace llvm;
20193323Sed
21193323Sed/// XCoreTargetMachine ctor - Create an ILP32 architecture model
22193323Sed///
23226633SdimXCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
24226633Sdim                                       StringRef CPU, StringRef FS,
25234353Sdim                                       const TargetOptions &Options,
26234353Sdim                                       Reloc::Model RM, CodeModel::Model CM,
27234353Sdim                                       CodeGenOpt::Level OL)
28234353Sdim  : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29224145Sdim    Subtarget(TT, CPU, FS),
30243830Sdim    DL("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
31199481Srdivacky               "i16:16:32-i32:32:32-i64:32:32-n32"),
32193323Sed    InstrInfo(),
33218893Sdim    FrameLowering(Subtarget),
34208599Srdivacky    TLInfo(*this),
35249423Sdim    TSInfo(*this) {
36193323Sed}
37193323Sed
38234353Sdimnamespace {
39234353Sdim/// XCore Code Generator Pass Configuration Options.
40234353Sdimclass XCorePassConfig : public TargetPassConfig {
41234353Sdimpublic:
42234353Sdim  XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM)
43234353Sdim    : TargetPassConfig(TM, PM) {}
44234353Sdim
45234353Sdim  XCoreTargetMachine &getXCoreTargetMachine() const {
46234353Sdim    return getTM<XCoreTargetMachine>();
47234353Sdim  }
48234353Sdim
49251662Sdim  virtual bool addPreISel();
50234353Sdim  virtual bool addInstSelector();
51234353Sdim};
52234353Sdim} // namespace
53234353Sdim
54234353SdimTargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
55234353Sdim  return new XCorePassConfig(this, PM);
56234353Sdim}
57234353Sdim
58251662Sdimbool XCorePassConfig::addPreISel() {
59251662Sdim  addPass(createXCoreLowerThreadLocalPass());
60251662Sdim  return false;
61251662Sdim}
62251662Sdim
63234353Sdimbool XCorePassConfig::addInstSelector() {
64239462Sdim  addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
65193323Sed  return false;
66193323Sed}
67193323Sed
68198090Srdivacky// Force static initialization.
69198090Srdivackyextern "C" void LLVMInitializeXCoreTarget() {
70198090Srdivacky  RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
71193323Sed}
72