XCoreISelLowering.h revision 199481 
1//===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that XCore uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef XCOREISELLOWERING_H
16#define XCOREISELLOWERING_H
17
18#include "llvm/CodeGen/SelectionDAG.h"
19#include "llvm/Target/TargetLowering.h"
20#include "XCore.h"
21
22namespace llvm {
23
24  // Forward delcarations
25  class XCoreSubtarget;
26  class XCoreTargetMachine;
27
28  namespace XCoreISD {
29    enum NodeType {
30      // Start the numbering where the builtin ops and target ops leave off.
31      FIRST_NUMBER = ISD::BUILTIN_OP_END+XCore::INSTRUCTION_LIST_END,
32
33      // Branch and link (call)
34      BL,
35
36      // pc relative address
37      PCRelativeWrapper,
38
39      // dp relative address
40      DPRelativeWrapper,
41
42      // cp relative address
43      CPRelativeWrapper,
44
45      // Store word to stack
46      STWSP,
47
48      // Corresponds to retsp instruction
49      RETSP,
50
51      // Corresponds to LADD instruction
52      LADD,
53
54      // Corresponds to LSUB instruction
55      LSUB
56    };
57  }
58
59  //===--------------------------------------------------------------------===//
60  // TargetLowering Implementation
61  //===--------------------------------------------------------------------===//
62  class XCoreTargetLowering : public TargetLowering
63  {
64  public:
65
66    explicit XCoreTargetLowering(XCoreTargetMachine &TM);
67
68    /// LowerOperation - Provide custom lowering hooks for some operations.
69    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
70
71    /// ReplaceNodeResults - Replace the results of node with an illegal result
72    /// type with new values built out of custom code.
73    ///
74    virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
75                                    SelectionDAG &DAG);
76
77    /// getTargetNodeName - This method returns the name of a target specific
78    //  DAG node.
79    virtual const char *getTargetNodeName(unsigned Opcode) const;
80
81    virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
82                                                         MachineBasicBlock *MBB,
83                    DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
84
85    virtual bool isLegalAddressingMode(const AddrMode &AM,
86                                       const Type *Ty) const;
87
88    /// getFunctionAlignment - Return the Log2 alignment of this function.
89    virtual unsigned getFunctionAlignment(const Function *F) const;
90
91  private:
92    const XCoreTargetMachine &TM;
93    const XCoreSubtarget &Subtarget;
94
95    // Lower Operand helpers
96    SDValue LowerCCCArguments(SDValue Chain,
97                              CallingConv::ID CallConv,
98                              bool isVarArg,
99                              const SmallVectorImpl<ISD::InputArg> &Ins,
100                              DebugLoc dl, SelectionDAG &DAG,
101                              SmallVectorImpl<SDValue> &InVals);
102    SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
103                           CallingConv::ID CallConv, bool isVarArg,
104                           bool isTailCall,
105                           const SmallVectorImpl<ISD::OutputArg> &Outs,
106                           const SmallVectorImpl<ISD::InputArg> &Ins,
107                           DebugLoc dl, SelectionDAG &DAG,
108                           SmallVectorImpl<SDValue> &InVals);
109    SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
110                            CallingConv::ID CallConv, bool isVarArg,
111                            const SmallVectorImpl<ISD::InputArg> &Ins,
112                            DebugLoc dl, SelectionDAG &DAG,
113                            SmallVectorImpl<SDValue> &InVals);
114    SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
115    SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV,
116                                    SelectionDAG &DAG);
117
118    // Lower Operand specifics
119    SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG);
120    SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG);
121    SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
122    SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
123    SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
124    SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
125    SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
126    SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG);
127    SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
128    SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
129
130    // Inline asm support
131    std::vector<unsigned>
132    getRegClassForInlineAsmConstraint(const std::string &Constraint,
133              EVT VT) const;
134
135    // Expand specifics
136    SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG);
137
138    virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
139
140    virtual SDValue
141      LowerFormalArguments(SDValue Chain,
142                           CallingConv::ID CallConv,
143                           bool isVarArg,
144                           const SmallVectorImpl<ISD::InputArg> &Ins,
145                           DebugLoc dl, SelectionDAG &DAG,
146                           SmallVectorImpl<SDValue> &InVals);
147
148    virtual SDValue
149      LowerCall(SDValue Chain, SDValue Callee,
150                CallingConv::ID CallConv, bool isVarArg,
151                bool isTailCall,
152                const SmallVectorImpl<ISD::OutputArg> &Outs,
153                const SmallVectorImpl<ISD::InputArg> &Ins,
154                DebugLoc dl, SelectionDAG &DAG,
155                SmallVectorImpl<SDValue> &InVals);
156
157    virtual SDValue
158      LowerReturn(SDValue Chain,
159                  CallingConv::ID CallConv, bool isVarArg,
160                  const SmallVectorImpl<ISD::OutputArg> &Outs,
161                  DebugLoc dl, SelectionDAG &DAG);
162
163    virtual bool
164      CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
165                     const SmallVectorImpl<EVT> &OutTys,
166                     const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
167                     SelectionDAG &DAG);
168  };
169}
170
171#endif // XCOREISELLOWERING_H
172