XCoreISelLowering.h revision 195340 
1//===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that XCore uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef XCOREISELLOWERING_H
16#define XCOREISELLOWERING_H
17
18#include "llvm/CodeGen/SelectionDAG.h"
19#include "llvm/Target/TargetLowering.h"
20#include "XCore.h"
21
22namespace llvm {
23
24  // Forward delcarations
25  class XCoreSubtarget;
26  class XCoreTargetMachine;
27
28  namespace XCoreISD {
29    enum NodeType {
30      // Start the numbering where the builtin ops and target ops leave off.
31      FIRST_NUMBER = ISD::BUILTIN_OP_END+XCore::INSTRUCTION_LIST_END,
32
33      // Branch and link (call)
34      BL,
35
36      // pc relative address
37      PCRelativeWrapper,
38
39      // dp relative address
40      DPRelativeWrapper,
41
42      // cp relative address
43      CPRelativeWrapper,
44
45      // Store word to stack
46      STWSP,
47
48      // Corresponds to retsp instruction
49      RETSP,
50
51      // Corresponds to LADD instruction
52      LADD,
53
54      // Corresponds to LSUB instruction
55      LSUB
56    };
57  }
58
59  //===--------------------------------------------------------------------===//
60  // TargetLowering Implementation
61  //===--------------------------------------------------------------------===//
62  class XCoreTargetLowering : public TargetLowering
63  {
64  public:
65
66    explicit XCoreTargetLowering(XCoreTargetMachine &TM);
67
68    /// LowerOperation - Provide custom lowering hooks for some operations.
69    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
70
71    /// ReplaceNodeResults - Replace the results of node with an illegal result
72    /// type with new values built out of custom code.
73    ///
74    virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
75                                    SelectionDAG &DAG);
76
77    /// getTargetNodeName - This method returns the name of a target specific
78    //  DAG node.
79    virtual const char *getTargetNodeName(unsigned Opcode) const;
80
81    virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
82                                                  MachineBasicBlock *MBB) const;
83
84    virtual bool isLegalAddressingMode(const AddrMode &AM,
85                                       const Type *Ty) const;
86
87    /// getFunctionAlignment - Return the Log2 alignment of this function.
88    virtual unsigned getFunctionAlignment(const Function *F) const;
89
90  private:
91    const XCoreTargetMachine &TM;
92    const XCoreSubtarget &Subtarget;
93
94    // Lower Operand helpers
95    SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG);
96    SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC);
97    SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode*TheCall,
98                            unsigned CallingConv, SelectionDAG &DAG);
99    SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
100    SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV,
101                                    SelectionDAG &DAG);
102
103    // Lower Operand specifics
104    SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
105    SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
106    SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
107    SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
108    SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
109    SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
110    SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
111    SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
112    SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG);
113    SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
114    SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
115
116    // Inline asm support
117    std::vector<unsigned>
118    getRegClassForInlineAsmConstraint(const std::string &Constraint,
119              MVT VT) const;
120
121    // Expand specifics
122    SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG);
123  };
124}
125
126#endif // XCOREISELLOWERING_H
127