X86TargetMachine.h revision 249423 
1//===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the X86 specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86TARGETMACHINE_H
15#define X86TARGETMACHINE_H
16
17#include "X86.h"
18#include "X86FrameLowering.h"
19#include "X86ISelLowering.h"
20#include "X86InstrInfo.h"
21#include "X86JITInfo.h"
22#include "X86SelectionDAGInfo.h"
23#include "X86Subtarget.h"
24#include "llvm/IR/DataLayout.h"
25#include "llvm/Target/TargetFrameLowering.h"
26#include "llvm/Target/TargetMachine.h"
27
28namespace llvm {
29
30class StringRef;
31
32class X86TargetMachine : public LLVMTargetMachine {
33  X86Subtarget       Subtarget;
34  X86FrameLowering   FrameLowering;
35  InstrItineraryData InstrItins;
36
37public:
38  X86TargetMachine(const Target &T, StringRef TT,
39                   StringRef CPU, StringRef FS, const TargetOptions &Options,
40                   Reloc::Model RM, CodeModel::Model CM,
41                   CodeGenOpt::Level OL,
42                   bool is64Bit);
43
44  virtual const X86InstrInfo     *getInstrInfo() const {
45    llvm_unreachable("getInstrInfo not implemented");
46  }
47  virtual const TargetFrameLowering  *getFrameLowering() const {
48    return &FrameLowering;
49  }
50  virtual       X86JITInfo       *getJITInfo()         {
51    llvm_unreachable("getJITInfo not implemented");
52  }
53  virtual const X86Subtarget     *getSubtargetImpl() const{ return &Subtarget; }
54  virtual const X86TargetLowering *getTargetLowering() const {
55    llvm_unreachable("getTargetLowering not implemented");
56  }
57  virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
58    llvm_unreachable("getSelectionDAGInfo not implemented");
59  }
60  virtual const X86RegisterInfo  *getRegisterInfo() const {
61    return &getInstrInfo()->getRegisterInfo();
62  }
63  virtual const InstrItineraryData *getInstrItineraryData() const {
64    return &InstrItins;
65  }
66
67  /// \brief Register X86 analysis passes with a pass manager.
68  virtual void addAnalysisPasses(PassManagerBase &PM);
69
70  // Set up the pass pipeline.
71  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
72
73  virtual bool addCodeEmitter(PassManagerBase &PM,
74                              JITCodeEmitter &JCE);
75};
76
77/// X86_32TargetMachine - X86 32-bit target machine.
78///
79class X86_32TargetMachine : public X86TargetMachine {
80  virtual void anchor();
81  const DataLayout  DL; // Calculates type size & alignment
82  X86InstrInfo      InstrInfo;
83  X86TargetLowering TLInfo;
84  X86SelectionDAGInfo TSInfo;
85  X86JITInfo        JITInfo;
86public:
87  X86_32TargetMachine(const Target &T, StringRef TT,
88                      StringRef CPU, StringRef FS, const TargetOptions &Options,
89                      Reloc::Model RM, CodeModel::Model CM,
90                      CodeGenOpt::Level OL);
91  virtual const DataLayout *getDataLayout() const { return &DL; }
92  virtual const X86TargetLowering *getTargetLowering() const {
93    return &TLInfo;
94  }
95  virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
96    return &TSInfo;
97  }
98  virtual const X86InstrInfo     *getInstrInfo() const {
99    return &InstrInfo;
100  }
101  virtual       X86JITInfo       *getJITInfo()         {
102    return &JITInfo;
103  }
104};
105
106/// X86_64TargetMachine - X86 64-bit target machine.
107///
108class X86_64TargetMachine : public X86TargetMachine {
109  virtual void anchor();
110  const DataLayout  DL; // Calculates type size & alignment
111  X86InstrInfo      InstrInfo;
112  X86TargetLowering TLInfo;
113  X86SelectionDAGInfo TSInfo;
114  X86JITInfo        JITInfo;
115public:
116  X86_64TargetMachine(const Target &T, StringRef TT,
117                      StringRef CPU, StringRef FS, const TargetOptions &Options,
118                      Reloc::Model RM, CodeModel::Model CM,
119                      CodeGenOpt::Level OL);
120  virtual const DataLayout *getDataLayout() const { return &DL; }
121  virtual const X86TargetLowering *getTargetLowering() const {
122    return &TLInfo;
123  }
124  virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
125    return &TSInfo;
126  }
127  virtual const X86InstrInfo     *getInstrInfo() const {
128    return &InstrInfo;
129  }
130  virtual       X86JITInfo       *getJITInfo()         {
131    return &JITInfo;
132  }
133};
134
135} // End llvm namespace
136
137#endif
138