1249259Sdim//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2249259Sdim//
3249259Sdim//                     The LLVM Compiler Infrastructure
4249259Sdim//
5249259Sdim// This file is distributed under the University of Illinois Open Source
6249259Sdim// License. See LICENSE.TXT for details.
7249259Sdim//
8249259Sdim//===----------------------------------------------------------------------===//
9249259Sdim//
10249259Sdim/// \file
11249259Sdim/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
12249259Sdim//
13249259Sdim//===----------------------------------------------------------------------===//
14249259Sdim
15249259Sdim#ifndef AMDGPU_TARGET_MACHINE_H
16249259Sdim#define AMDGPU_TARGET_MACHINE_H
17249259Sdim
18249259Sdim#include "AMDGPUFrameLowering.h"
19249259Sdim#include "AMDGPUInstrInfo.h"
20249259Sdim#include "AMDGPUSubtarget.h"
21249259Sdim#include "AMDILIntrinsicInfo.h"
22249259Sdim#include "R600ISelLowering.h"
23249259Sdim#include "llvm/ADT/OwningPtr.h"
24249259Sdim#include "llvm/IR/DataLayout.h"
25249259Sdim
26249259Sdimnamespace llvm {
27249259Sdim
28249259SdimMCAsmInfo* createMCAsmInfo(const Target &T, StringRef TT);
29249259Sdim
30249259Sdimclass AMDGPUTargetMachine : public LLVMTargetMachine {
31249259Sdim
32249259Sdim  AMDGPUSubtarget Subtarget;
33249259Sdim  const DataLayout Layout;
34249259Sdim  AMDGPUFrameLowering FrameLowering;
35249259Sdim  AMDGPUIntrinsicInfo IntrinsicInfo;
36249259Sdim  const AMDGPUInstrInfo * InstrInfo;
37249259Sdim  AMDGPUTargetLowering * TLInfo;
38249259Sdim  const InstrItineraryData* InstrItins;
39249259Sdim
40249259Sdimpublic:
41249259Sdim   AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
42249259Sdim                       StringRef CPU,
43249259Sdim                       TargetOptions Options,
44249259Sdim                       Reloc::Model RM, CodeModel::Model CM,
45249259Sdim                       CodeGenOpt::Level OL);
46249259Sdim   ~AMDGPUTargetMachine();
47249259Sdim   virtual const AMDGPUFrameLowering* getFrameLowering() const {
48249259Sdim     return &FrameLowering;
49249259Sdim   }
50249259Sdim   virtual const AMDGPUIntrinsicInfo* getIntrinsicInfo() const {
51249259Sdim     return &IntrinsicInfo;
52249259Sdim   }
53249259Sdim   virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;}
54249259Sdim   virtual const AMDGPUSubtarget *getSubtargetImpl() const {return &Subtarget; }
55249259Sdim   virtual const AMDGPURegisterInfo *getRegisterInfo() const {
56249259Sdim      return &InstrInfo->getRegisterInfo();
57249259Sdim   }
58249259Sdim   virtual AMDGPUTargetLowering * getTargetLowering() const {
59249259Sdim      return TLInfo;
60249259Sdim   }
61249259Sdim   virtual const InstrItineraryData* getInstrItineraryData() const {
62249259Sdim      return InstrItins;
63249259Sdim   }
64249259Sdim   virtual const DataLayout* getDataLayout() const { return &Layout; }
65249259Sdim   virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
66249259Sdim};
67249259Sdim
68249259Sdim} // End namespace llvm
69249259Sdim
70249259Sdim#endif // AMDGPU_TARGET_MACHINE_H
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