1193323Sed//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// Top-level implementation for the PowerPC target. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14234353Sdim#include "PPCTargetMachine.h" 15193323Sed#include "PPC.h" 16249423Sdim#include "llvm/CodeGen/Passes.h" 17249423Sdim#include "llvm/MC/MCStreamer.h" 18193323Sed#include "llvm/PassManager.h" 19239462Sdim#include "llvm/Support/CommandLine.h" 20198090Srdivacky#include "llvm/Support/FormattedStream.h" 21226633Sdim#include "llvm/Support/TargetRegistry.h" 22249423Sdim#include "llvm/Target/TargetOptions.h" 23193323Sedusing namespace llvm; 24193323Sed 25239462Sdimstatic cl:: 26239462Sdimopt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, 27239462Sdim cl::desc("Disable CTR loops for PPC")); 28239462Sdim 29198090Srdivackyextern "C" void LLVMInitializePowerPCTarget() { 30198090Srdivacky // Register the targets 31234353Sdim RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target); 32198090Srdivacky RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target); 33193323Sed} 34193323Sed 35226633SdimPPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, 36226633Sdim StringRef CPU, StringRef FS, 37234353Sdim const TargetOptions &Options, 38226633Sdim Reloc::Model RM, CodeModel::Model CM, 39234353Sdim CodeGenOpt::Level OL, 40226633Sdim bool is64Bit) 41234353Sdim : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 42224145Sdim Subtarget(TT, CPU, FS, is64Bit), 43243830Sdim DL(Subtarget.getDataLayoutString()), InstrInfo(*this), 44218893Sdim FrameLowering(Subtarget), JITInfo(*this, is64Bit), 45208599Srdivacky TLInfo(*this), TSInfo(*this), 46249423Sdim InstrItins(Subtarget.getInstrItineraryData()) { 47234353Sdim 48234353Sdim // The binutils for the BG/P are too old for CFI. 49234353Sdim if (Subtarget.isBGP()) 50234353Sdim setMCUseCFI(false); 51193323Sed} 52193323Sed 53234353Sdimvoid PPC32TargetMachine::anchor() { } 54193323Sed 55234353SdimPPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, 56226633Sdim StringRef CPU, StringRef FS, 57234353Sdim const TargetOptions &Options, 58234353Sdim Reloc::Model RM, CodeModel::Model CM, 59234353Sdim CodeGenOpt::Level OL) 60234353Sdim : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 61193323Sed} 62193323Sed 63234353Sdimvoid PPC64TargetMachine::anchor() { } 64193323Sed 65234353SdimPPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT, 66226633Sdim StringRef CPU, StringRef FS, 67234353Sdim const TargetOptions &Options, 68234353Sdim Reloc::Model RM, CodeModel::Model CM, 69234353Sdim CodeGenOpt::Level OL) 70234353Sdim : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 71193323Sed} 72193323Sed 73193323Sed 74193323Sed//===----------------------------------------------------------------------===// 75193323Sed// Pass Pipeline Configuration 76193323Sed//===----------------------------------------------------------------------===// 77193323Sed 78234353Sdimnamespace { 79234353Sdim/// PPC Code Generator Pass Configuration Options. 80234353Sdimclass PPCPassConfig : public TargetPassConfig { 81234353Sdimpublic: 82234353Sdim PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM) 83234353Sdim : TargetPassConfig(TM, PM) {} 84234353Sdim 85234353Sdim PPCTargetMachine &getPPCTargetMachine() const { 86234353Sdim return getTM<PPCTargetMachine>(); 87234353Sdim } 88234353Sdim 89251662Sdim const PPCSubtarget &getPPCSubtarget() const { 90251662Sdim return *getPPCTargetMachine().getSubtargetImpl(); 91251662Sdim } 92251662Sdim 93239462Sdim virtual bool addPreRegAlloc(); 94251662Sdim virtual bool addILPOpts(); 95234353Sdim virtual bool addInstSelector(); 96251662Sdim virtual bool addPreSched2(); 97234353Sdim virtual bool addPreEmitPass(); 98234353Sdim}; 99234353Sdim} // namespace 100234353Sdim 101234353SdimTargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) { 102239462Sdim return new PPCPassConfig(this, PM); 103239462Sdim} 104234353Sdim 105239462Sdimbool PPCPassConfig::addPreRegAlloc() { 106239462Sdim if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) 107239462Sdim addPass(createPPCCTRLoops()); 108234353Sdim 109239462Sdim return false; 110234353Sdim} 111234353Sdim 112251662Sdimbool PPCPassConfig::addILPOpts() { 113251662Sdim if (getPPCSubtarget().hasISEL()) { 114251662Sdim addPass(&EarlyIfConverterID); 115251662Sdim return true; 116251662Sdim } 117251662Sdim 118251662Sdim return false; 119251662Sdim} 120251662Sdim 121234353Sdimbool PPCPassConfig::addInstSelector() { 122193323Sed // Install an instruction selector. 123239462Sdim addPass(createPPCISelDag(getPPCTargetMachine())); 124193323Sed return false; 125193323Sed} 126193323Sed 127251662Sdimbool PPCPassConfig::addPreSched2() { 128251662Sdim if (getOptLevel() != CodeGenOpt::None) 129251662Sdim addPass(&IfConverterID); 130251662Sdim 131251662Sdim return true; 132251662Sdim} 133251662Sdim 134234353Sdimbool PPCPassConfig::addPreEmitPass() { 135251662Sdim if (getOptLevel() != CodeGenOpt::None) 136251662Sdim addPass(createPPCEarlyReturnPass()); 137193323Sed // Must run branch selection immediately preceding the asm printer. 138239462Sdim addPass(createPPCBranchSelectionPass()); 139193323Sed return false; 140193323Sed} 141193323Sed 142198090Srdivackybool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, 143198090Srdivacky JITCodeEmitter &JCE) { 144193323Sed // Inform the subtarget that we are in JIT mode. FIXME: does this break macho 145193323Sed // writing? 146193323Sed Subtarget.SetJITMode(); 147234353Sdim 148193323Sed // Machine code emitter pass for PowerPC. 149198090Srdivacky PM.add(createPPCJITCodeEmitterPass(*this, JCE)); 150193323Sed 151193323Sed return false; 152193323Sed} 153249423Sdim 154249423Sdimvoid PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) { 155249423Sdim // Add first the target-independent BasicTTI pass, then our PPC pass. This 156249423Sdim // allows the PPC pass to delegate to the target independent layer when 157249423Sdim // appropriate. 158249423Sdim PM.add(createBasicTargetTransformInfoPass(getTargetLowering())); 159249423Sdim PM.add(createPPCTargetTransformInfoPass(this)); 160249423Sdim} 161249423Sdim 162