ARMScheduleV6.td revision 194612
1194612Sed//===- ARMSchedule.td - ARM v6 Scheduling Definitions ------*- tablegen -*-===// 2194612Sed// 3194612Sed// The LLVM Compiler Infrastructure 4194612Sed// 5194612Sed// This file is distributed under the University of Illinois Open Source 6194612Sed// License. See LICENSE.TXT for details. 7194612Sed// 8194612Sed//===----------------------------------------------------------------------===// 9194612Sed// 10194612Sed// This file defines the itinerary class data for the ARM v6 processors. 11194612Sed// 12194612Sed//===----------------------------------------------------------------------===// 13194612Sed 14194612Seddef V6Itineraries : ProcessorItineraries<[ 15194612Sed InstrItinData<IIC_iALU , [InstrStage<1, [FU_iALU]>]>, 16194612Sed InstrItinData<IIC_iLoad , [InstrStage<2, [FU_iLdSt]>]>, 17194612Sed InstrItinData<IIC_iStore , [InstrStage<1, [FU_iLdSt]>]>, 18194612Sed InstrItinData<IIC_fpALU , [InstrStage<6, [FU_FpALU]>]>, 19194612Sed InstrItinData<IIC_fpLoad , [InstrStage<2, [FU_FpLdSt]>]>, 20194612Sed InstrItinData<IIC_fpStore , [InstrStage<1, [FU_FpLdSt]>]>, 21194612Sed InstrItinData<IIC_Br , [InstrStage<3, [FU_Br]>]> 22194612Sed]>; 23