118334Speter/* Reload pseudo regs into hard regs for insns that require hard regs. 290075Sobrien Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3169689Skan 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 4169689Skan Free Software Foundation, Inc. 518334Speter 690075SobrienThis file is part of GCC. 718334Speter 890075SobrienGCC is free software; you can redistribute it and/or modify it under 990075Sobrienthe terms of the GNU General Public License as published by the Free 1090075SobrienSoftware Foundation; either version 2, or (at your option) any later 1190075Sobrienversion. 1218334Speter 1390075SobrienGCC is distributed in the hope that it will be useful, but WITHOUT ANY 1490075SobrienWARRANTY; without even the implied warranty of MERCHANTABILITY or 1590075SobrienFITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1690075Sobrienfor more details. 1718334Speter 1818334SpeterYou should have received a copy of the GNU General Public License 1990075Sobrienalong with GCC; see the file COPYING. If not, write to the Free 20169689SkanSoftware Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 21169689Skan02110-1301, USA. */ 2218334Speter 2318334Speter#include "config.h" 2450397Sobrien#include "system.h" 25132718Skan#include "coretypes.h" 26132718Skan#include "tm.h" 2750397Sobrien 2850397Sobrien#include "machmode.h" 2950397Sobrien#include "hard-reg-set.h" 3018334Speter#include "rtl.h" 3190075Sobrien#include "tm_p.h" 3218334Speter#include "obstack.h" 3318334Speter#include "insn-config.h" 3418334Speter#include "flags.h" 3590075Sobrien#include "function.h" 3618334Speter#include "expr.h" 3790075Sobrien#include "optabs.h" 3818334Speter#include "regs.h" 39169689Skan#include "addresses.h" 4052284Sobrien#include "basic-block.h" 4118334Speter#include "reload.h" 4218334Speter#include "recog.h" 4318334Speter#include "output.h" 4418334Speter#include "real.h" 4550397Sobrien#include "toplev.h" 4690075Sobrien#include "except.h" 4796263Sobrien#include "tree.h" 48169689Skan#include "target.h" 4918334Speter 5018334Speter/* This file contains the reload pass of the compiler, which is 5118334Speter run after register allocation has been done. It checks that 5218334Speter each insn is valid (operands required to be in registers really 5318334Speter are in registers of the proper class) and fixes up invalid ones 5418334Speter by copying values temporarily into registers for the insns 5518334Speter that need them. 5618334Speter 5718334Speter The results of register allocation are described by the vector 5818334Speter reg_renumber; the insns still contain pseudo regs, but reg_renumber 5918334Speter can be used to find which hard reg, if any, a pseudo reg is in. 6018334Speter 6118334Speter The technique we always use is to free up a few hard regs that are 6218334Speter called ``reload regs'', and for each place where a pseudo reg 6318334Speter must be in a hard reg, copy it temporarily into one of the reload regs. 6418334Speter 6552284Sobrien Reload regs are allocated locally for every instruction that needs 6652284Sobrien reloads. When there are pseudos which are allocated to a register that 6752284Sobrien has been chosen as a reload reg, such pseudos must be ``spilled''. 6852284Sobrien This means that they go to other hard regs, or to stack slots if no other 6918334Speter available hard regs can be found. Spilling can invalidate more 7018334Speter insns, requiring additional need for reloads, so we must keep checking 7118334Speter until the process stabilizes. 7218334Speter 7318334Speter For machines with different classes of registers, we must keep track 7418334Speter of the register class needed for each reload, and make sure that 7518334Speter we allocate enough reload registers of each class. 7618334Speter 7718334Speter The file reload.c contains the code that checks one insn for 7818334Speter validity and reports the reloads that it needs. This file 7918334Speter is in charge of scanning the entire rtl code, accumulating the 8018334Speter reload needs, spilling, assigning reload registers to use for 8118334Speter fixing up each insn, and generating the new insns to copy values 8218334Speter into the reload registers. */ 8318334Speter 8418334Speter/* During reload_as_needed, element N contains a REG rtx for the hard reg 8550397Sobrien into which reg N has been reloaded (perhaps for a previous insn). */ 8618334Speterstatic rtx *reg_last_reload_reg; 8718334Speter 8818334Speter/* Elt N nonzero if reg_last_reload_reg[N] has been set in this insn 8918334Speter for an output reload that stores into reg N. */ 90169689Skanstatic regset_head reg_has_output_reload; 9118334Speter 9218334Speter/* Indicates which hard regs are reload-registers for an output reload 9318334Speter in the current insn. */ 9418334Speterstatic HARD_REG_SET reg_is_output_reload; 9518334Speter 9618334Speter/* Element N is the constant value to which pseudo reg N is equivalent, 9718334Speter or zero if pseudo reg N is not equivalent to a constant. 9818334Speter find_reloads looks at this in order to replace pseudo reg N 9918334Speter with the constant it stands for. */ 10018334Speterrtx *reg_equiv_constant; 10118334Speter 102169689Skan/* Element N is an invariant value to which pseudo reg N is equivalent. 103169689Skan eliminate_regs_in_insn uses this to replace pseudos in particular 104169689Skan contexts. */ 105169689Skanrtx *reg_equiv_invariant; 106169689Skan 10718334Speter/* Element N is a memory location to which pseudo reg N is equivalent, 10818334Speter prior to any register elimination (such as frame pointer to stack 10918334Speter pointer). Depending on whether or not it is a valid address, this value 11018334Speter is transferred to either reg_equiv_address or reg_equiv_mem. */ 11118334Speterrtx *reg_equiv_memory_loc; 11218334Speter 113169689Skan/* We allocate reg_equiv_memory_loc inside a varray so that the garbage 114169689Skan collector can keep track of what is inside. */ 115169689SkanVEC(rtx,gc) *reg_equiv_memory_loc_vec; 116169689Skan 11718334Speter/* Element N is the address of stack slot to which pseudo reg N is equivalent. 11818334Speter This is used when the address is not valid as a memory address 11918334Speter (because its displacement is too big for the machine.) */ 12018334Speterrtx *reg_equiv_address; 12118334Speter 12218334Speter/* Element N is the memory slot to which pseudo reg N is equivalent, 12318334Speter or zero if pseudo reg N is not equivalent to a memory slot. */ 12418334Speterrtx *reg_equiv_mem; 12518334Speter 126169689Skan/* Element N is an EXPR_LIST of REG_EQUIVs containing MEMs with 127169689Skan alternate representations of the location of pseudo reg N. */ 128169689Skanrtx *reg_equiv_alt_mem_list; 129169689Skan 13018334Speter/* Widest width in which each pseudo reg is referred to (via subreg). */ 13190075Sobrienstatic unsigned int *reg_max_ref_width; 13218334Speter 13352284Sobrien/* Element N is the list of insns that initialized reg N from its equivalent 13418334Speter constant or memory slot. */ 135169689Skanrtx *reg_equiv_init; 136169689Skanint reg_equiv_init_size; 13718334Speter 13852284Sobrien/* Vector to remember old contents of reg_renumber before spilling. */ 13952284Sobrienstatic short *reg_old_renumber; 14052284Sobrien 14150397Sobrien/* During reload_as_needed, element N contains the last pseudo regno reloaded 14252284Sobrien into hard register N. If that pseudo reg occupied more than one register, 14318334Speter reg_reloaded_contents points to that pseudo for each spill register in 14418334Speter use; all of these must remain set for an inheritance to occur. */ 14518334Speterstatic int reg_reloaded_contents[FIRST_PSEUDO_REGISTER]; 14618334Speter 14718334Speter/* During reload_as_needed, element N contains the insn for which 14850397Sobrien hard register N was last used. Its contents are significant only 14950397Sobrien when reg_reloaded_valid is set for this register. */ 15018334Speterstatic rtx reg_reloaded_insn[FIRST_PSEUDO_REGISTER]; 15118334Speter 152117395Skan/* Indicate if reg_reloaded_insn / reg_reloaded_contents is valid. */ 15350397Sobrienstatic HARD_REG_SET reg_reloaded_valid; 15450397Sobrien/* Indicate if the register was dead at the end of the reload. 15550397Sobrien This is only valid if reg_reloaded_contents is set and valid. */ 15650397Sobrienstatic HARD_REG_SET reg_reloaded_dead; 15750397Sobrien 158132718Skan/* Indicate whether the register's current value is one that is not 159132718Skan safe to retain across a call, even for registers that are normally 160132718Skan call-saved. */ 161132718Skanstatic HARD_REG_SET reg_reloaded_call_part_clobbered; 162132718Skan 16318334Speter/* Number of spill-regs so far; number of valid elements of spill_regs. */ 16418334Speterstatic int n_spills; 16518334Speter 16618334Speter/* In parallel with spill_regs, contains REG rtx's for those regs. 16718334Speter Holds the last rtx used for any given reg, or 0 if it has never 16818334Speter been used for spilling yet. This rtx is reused, provided it has 16918334Speter the proper mode. */ 17018334Speterstatic rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER]; 17118334Speter 17218334Speter/* In parallel with spill_regs, contains nonzero for a spill reg 17318334Speter that was stored after the last time it was used. 17418334Speter The precise value is the insn generated to do the store. */ 17518334Speterstatic rtx spill_reg_store[FIRST_PSEUDO_REGISTER]; 17618334Speter 17752284Sobrien/* This is the register that was stored with spill_reg_store. This is a 17852284Sobrien copy of reload_out / reload_out_reg when the value was stored; if 17952284Sobrien reload_out is a MEM, spill_reg_stored_to will be set to reload_out_reg. */ 18052284Sobrienstatic rtx spill_reg_stored_to[FIRST_PSEUDO_REGISTER]; 18152284Sobrien 18218334Speter/* This table is the inverse mapping of spill_regs: 18318334Speter indexed by hard reg number, 18418334Speter it contains the position of that reg in spill_regs, 18590075Sobrien or -1 for something that is not in spill_regs. 18652284Sobrien 18752284Sobrien ?!? This is no longer accurate. */ 18818334Speterstatic short spill_reg_order[FIRST_PSEUDO_REGISTER]; 18918334Speter 19052284Sobrien/* This reg set indicates registers that can't be used as spill registers for 19152284Sobrien the currently processed insn. These are the hard registers which are live 19252284Sobrien during the insn, but not allocated to pseudos, as well as fixed 19352284Sobrien registers. */ 19452284Sobrienstatic HARD_REG_SET bad_spill_regs; 19518334Speter 19652284Sobrien/* These are the hard registers that can't be used as spill register for any 19752284Sobrien insn. This includes registers used for user variables and registers that 19852284Sobrien we can't eliminate. A register that appears in this set also can't be used 19952284Sobrien to retry register allocation. */ 20052284Sobrienstatic HARD_REG_SET bad_spill_regs_global; 20118334Speter 20252284Sobrien/* Describes order of use of registers for reloading 20352284Sobrien of spilled pseudo-registers. `n_spills' is the number of 20452284Sobrien elements that are actually valid; new ones are added at the end. 20518334Speter 20652284Sobrien Both spill_regs and spill_reg_order are used on two occasions: 20752284Sobrien once during find_reload_regs, where they keep track of the spill registers 20852284Sobrien for a single insn, but also during reload_as_needed where they show all 20952284Sobrien the registers ever used by reload. For the latter case, the information 21052284Sobrien is calculated during finish_spills. */ 21118334Speterstatic short spill_regs[FIRST_PSEUDO_REGISTER]; 21218334Speter 21352284Sobrien/* This vector of reg sets indicates, for each pseudo, which hard registers 21452284Sobrien may not be used for retrying global allocation because the register was 21552284Sobrien formerly spilled from one of them. If we allowed reallocating a pseudo to 21652284Sobrien a register that it was already allocated to, reload might not 21752284Sobrien terminate. */ 21852284Sobrienstatic HARD_REG_SET *pseudo_previous_regs; 21950397Sobrien 22052284Sobrien/* This vector of reg sets indicates, for each pseudo, which hard 22152284Sobrien registers may not be used for retrying global allocation because they 22252284Sobrien are used as spill registers during one of the insns in which the 22352284Sobrien pseudo is live. */ 22452284Sobrienstatic HARD_REG_SET *pseudo_forbidden_regs; 22550397Sobrien 22652284Sobrien/* All hard regs that have been used as spill registers for any insn are 22752284Sobrien marked in this set. */ 22852284Sobrienstatic HARD_REG_SET used_spill_regs; 22952284Sobrien 23018334Speter/* Index of last register assigned as a spill register. We allocate in 23118334Speter a round-robin fashion. */ 23218334Speterstatic int last_spill_reg; 23318334Speter 23418334Speter/* Nonzero if indirect addressing is supported on the machine; this means 23518334Speter that spilling (REG n) does not require reloading it into a register in 23618334Speter order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The 23718334Speter value indicates the level of indirect addressing supported, e.g., two 23818334Speter means that (MEM (MEM (REG n))) is also valid if (REG n) does not get 23918334Speter a hard register. */ 24018334Speterstatic char spill_indirect_levels; 24118334Speter 24218334Speter/* Nonzero if indirect addressing is supported when the innermost MEM is 24318334Speter of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to 24490075Sobrien which these are valid is the same as spill_indirect_levels, above. */ 24518334Speterchar indirect_symref_ok; 24618334Speter 24718334Speter/* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */ 24818334Speterchar double_reg_address_ok; 24918334Speter 25018334Speter/* Record the stack slot for each spilled hard register. */ 25118334Speterstatic rtx spill_stack_slot[FIRST_PSEUDO_REGISTER]; 25218334Speter 25318334Speter/* Width allocated so far for that stack slot. */ 25490075Sobrienstatic unsigned int spill_stack_slot_width[FIRST_PSEUDO_REGISTER]; 25518334Speter 25652284Sobrien/* Record which pseudos needed to be spilled. */ 25790075Sobrienstatic regset_head spilled_pseudos; 25818334Speter 25990075Sobrien/* Used for communication between order_regs_for_reload and count_pseudo. 26090075Sobrien Used to avoid counting one pseudo twice. */ 26190075Sobrienstatic regset_head pseudos_counted; 26290075Sobrien 26318334Speter/* First uid used by insns created by reload in this function. 26418334Speter Used in find_equiv_reg. */ 26518334Speterint reload_first_uid; 26618334Speter 26718334Speter/* Flag set by local-alloc or global-alloc if anything is live in 26818334Speter a call-clobbered reg across calls. */ 26918334Speterint caller_save_needed; 27018334Speter 27118334Speter/* Set to 1 while reload_as_needed is operating. 27218334Speter Required by some machines to handle any generated moves differently. */ 27318334Speterint reload_in_progress = 0; 27418334Speter 27518334Speter/* These arrays record the insn_code of insns that may be needed to 27618334Speter perform input and output reloads of special objects. They provide a 27718334Speter place to pass a scratch register. */ 27818334Speterenum insn_code reload_in_optab[NUM_MACHINE_MODES]; 27918334Speterenum insn_code reload_out_optab[NUM_MACHINE_MODES]; 28018334Speter 28118334Speter/* This obstack is used for allocation of rtl during register elimination. 28218334Speter The allocated storage can be freed once find_reloads has processed the 28318334Speter insn. */ 284169689Skanstatic struct obstack reload_obstack; 28518334Speter 28652284Sobrien/* Points to the beginning of the reload_obstack. All insn_chain structures 28752284Sobrien are allocated first. */ 288169689Skanstatic char *reload_startobj; 28952284Sobrien 29052284Sobrien/* The point after all insn_chain structures. Used to quickly deallocate 29190075Sobrien memory allocated in copy_reloads during calculate_needs_all_insns. */ 292169689Skanstatic char *reload_firstobj; 29318334Speter 29490075Sobrien/* This points before all local rtl generated by register elimination. 29590075Sobrien Used to quickly free all memory after processing one insn. */ 29690075Sobrienstatic char *reload_insn_firstobj; 29790075Sobrien 29852284Sobrien/* List of insn_chain instructions, one for every insn that reload needs to 29952284Sobrien examine. */ 30052284Sobrienstruct insn_chain *reload_insn_chain; 30152284Sobrien 30252284Sobrien/* List of all insns needing reloads. */ 30352284Sobrienstatic struct insn_chain *insns_need_reload; 30418334Speter 30518334Speter/* This structure is used to record information about register eliminations. 30618334Speter Each array entry describes one possible way of eliminating a register 30718334Speter in favor of another. If there is more than one way of eliminating a 30818334Speter particular register, the most preferred should be specified first. */ 30918334Speter 31052284Sobrienstruct elim_table 31118334Speter{ 31250397Sobrien int from; /* Register number to be eliminated. */ 31350397Sobrien int to; /* Register number used as replacement. */ 314132718Skan HOST_WIDE_INT initial_offset; /* Initial difference between values. */ 315132718Skan int can_eliminate; /* Nonzero if this elimination can be done. */ 31618334Speter int can_eliminate_previous; /* Value of CAN_ELIMINATE in previous scan over 31750397Sobrien insns made by reload. */ 318132718Skan HOST_WIDE_INT offset; /* Current offset between the two regs. */ 319132718Skan HOST_WIDE_INT previous_offset;/* Offset at end of previous insn. */ 32050397Sobrien int ref_outside_mem; /* "to" has been referenced outside a MEM. */ 32118334Speter rtx from_rtx; /* REG rtx for the register to be eliminated. 32218334Speter We cannot simply compare the number since 32318334Speter we might then spuriously replace a hard 32418334Speter register corresponding to a pseudo 32550397Sobrien assigned to the reg to be eliminated. */ 32650397Sobrien rtx to_rtx; /* REG rtx for the replacement. */ 32752284Sobrien}; 32818334Speter 32990075Sobrienstatic struct elim_table *reg_eliminate = 0; 33052284Sobrien 33152284Sobrien/* This is an intermediate structure to initialize the table. It has 33290075Sobrien exactly the members provided by ELIMINABLE_REGS. */ 33390075Sobrienstatic const struct elim_table_1 33452284Sobrien{ 33590075Sobrien const int from; 33690075Sobrien const int to; 33752284Sobrien} reg_eliminate_1[] = 33852284Sobrien 33918334Speter/* If a set of eliminable registers was specified, define the table from it. 34018334Speter Otherwise, default to the normal case of the frame pointer being 34118334Speter replaced by the stack pointer. */ 34218334Speter 34318334Speter#ifdef ELIMINABLE_REGS 34418334Speter ELIMINABLE_REGS; 34518334Speter#else 34618334Speter {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}; 34718334Speter#endif 34818334Speter 34990075Sobrien#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1) 35018334Speter 35118334Speter/* Record the number of pending eliminations that have an offset not equal 352117395Skan to their initial offset. If nonzero, we use a new copy of each 35318334Speter replacement result in any insns encountered. */ 35452284Sobrienint num_not_at_initial_offset; 35518334Speter 35618334Speter/* Count the number of registers that we may be able to eliminate. */ 35718334Speterstatic int num_eliminable; 35852284Sobrien/* And the number of registers that are equivalent to a constant that 35952284Sobrien can be eliminated to frame_pointer / arg_pointer + constant. */ 36052284Sobrienstatic int num_eliminable_invariants; 36118334Speter 36218334Speter/* For each label, we record the offset of each elimination. If we reach 36318334Speter a label by more than one path and an offset differs, we cannot do the 364117395Skan elimination. This information is indexed by the difference of the 365117395Skan number of the label and the first label number. We can't offset the 366117395Skan pointer itself as this can cause problems on machines with segmented 367117395Skan memory. The first table is an array of flags that records whether we 368117395Skan have yet encountered a label and the second table is an array of arrays, 369117395Skan one entry in the latter array for each elimination. */ 37018334Speter 371117395Skanstatic int first_label_num; 37218334Speterstatic char *offsets_known_at; 373132718Skanstatic HOST_WIDE_INT (*offsets_at)[NUM_ELIMINABLE_REGS]; 37418334Speter 37518334Speter/* Number of labels in the current function. */ 37618334Speter 37718334Speterstatic int num_labels; 37818334Speter 379132718Skanstatic void replace_pseudos_in (rtx *, enum machine_mode, rtx); 380132718Skanstatic void maybe_fix_stack_asms (void); 381132718Skanstatic void copy_reloads (struct insn_chain *); 382132718Skanstatic void calculate_needs_all_insns (int); 383132718Skanstatic int find_reg (struct insn_chain *, int); 384132718Skanstatic void find_reload_regs (struct insn_chain *); 385132718Skanstatic void select_reload_regs (void); 386132718Skanstatic void delete_caller_save_insns (void); 38752284Sobrien 388132718Skanstatic void spill_failure (rtx, enum reg_class); 389132718Skanstatic void count_spilled_pseudo (int, int, int); 390132718Skanstatic void delete_dead_insn (rtx); 391132718Skanstatic void alter_reg (int, int); 392132718Skanstatic void set_label_offsets (rtx, rtx, int); 393132718Skanstatic void check_eliminable_occurrences (rtx); 394132718Skanstatic void elimination_effects (rtx, enum machine_mode); 395132718Skanstatic int eliminate_regs_in_insn (rtx, int); 396132718Skanstatic void update_eliminable_offsets (void); 397132718Skanstatic void mark_not_eliminable (rtx, rtx, void *); 398132718Skanstatic void set_initial_elim_offsets (void); 399169689Skanstatic bool verify_initial_elim_offsets (void); 400132718Skanstatic void set_initial_label_offsets (void); 401132718Skanstatic void set_offsets_for_label (rtx); 402132718Skanstatic void init_elim_table (void); 403132718Skanstatic void update_eliminables (HARD_REG_SET *); 404132718Skanstatic void spill_hard_reg (unsigned int, int); 405132718Skanstatic int finish_spills (int); 406132718Skanstatic void scan_paradoxical_subregs (rtx); 407132718Skanstatic void count_pseudo (int); 408132718Skanstatic void order_regs_for_reload (struct insn_chain *); 409132718Skanstatic void reload_as_needed (int); 410132718Skanstatic void forget_old_reloads_1 (rtx, rtx, void *); 411169689Skanstatic void forget_marked_reloads (regset); 412132718Skanstatic int reload_reg_class_lower (const void *, const void *); 413132718Skanstatic void mark_reload_reg_in_use (unsigned int, int, enum reload_type, 414132718Skan enum machine_mode); 415132718Skanstatic void clear_reload_reg_in_use (unsigned int, int, enum reload_type, 416132718Skan enum machine_mode); 417132718Skanstatic int reload_reg_free_p (unsigned int, int, enum reload_type); 418132718Skanstatic int reload_reg_free_for_value_p (int, int, int, enum reload_type, 419132718Skan rtx, rtx, int, int); 420132718Skanstatic int free_for_value_p (int, enum machine_mode, int, enum reload_type, 421132718Skan rtx, rtx, int, int); 422132718Skanstatic int reload_reg_reaches_end_p (unsigned int, int, enum reload_type); 423132718Skanstatic int allocate_reload_reg (struct insn_chain *, int, int); 424132718Skanstatic int conflicts_with_override (rtx); 425132718Skanstatic void failed_reload (rtx, int); 426132718Skanstatic int set_reload_reg (int, int); 427132718Skanstatic void choose_reload_regs_init (struct insn_chain *, rtx *); 428132718Skanstatic void choose_reload_regs (struct insn_chain *); 429132718Skanstatic void merge_assigned_reloads (rtx); 430132718Skanstatic void emit_input_reload_insns (struct insn_chain *, struct reload *, 431132718Skan rtx, int); 432132718Skanstatic void emit_output_reload_insns (struct insn_chain *, struct reload *, 433132718Skan int); 434132718Skanstatic void do_input_reload (struct insn_chain *, struct reload *, int); 435132718Skanstatic void do_output_reload (struct insn_chain *, struct reload *, int); 436169689Skanstatic bool inherit_piecemeal_p (int, int); 437132718Skanstatic void emit_reload_insns (struct insn_chain *); 438132718Skanstatic void delete_output_reload (rtx, int, int); 439132718Skanstatic void delete_address_reloads (rtx, rtx); 440132718Skanstatic void delete_address_reloads_1 (rtx, rtx, rtx); 441132718Skanstatic rtx inc_for_reload (rtx, rtx, rtx, int); 44252284Sobrien#ifdef AUTO_INC_DEC 443132718Skanstatic void add_auto_inc_notes (rtx, rtx); 44452284Sobrien#endif 445132718Skanstatic void copy_eh_notes (rtx, rtx); 446169689Skanstatic int reloads_conflict (int, int); 447169689Skanstatic rtx gen_reload (rtx, rtx, int, enum reload_type); 448169689Skanstatic rtx emit_insn_if_valid_for_reload (rtx); 44918334Speter 45018334Speter/* Initialize the reload pass once per compilation. */ 45118334Speter 45218334Spetervoid 453132718Skaninit_reload (void) 45418334Speter{ 45590075Sobrien int i; 45618334Speter 45718334Speter /* Often (MEM (REG n)) is still valid even if (REG n) is put on the stack. 45818334Speter Set spill_indirect_levels to the number of levels such addressing is 45918334Speter permitted, zero if it is not permitted at all. */ 46018334Speter 46190075Sobrien rtx tem 46250397Sobrien = gen_rtx_MEM (Pmode, 46350397Sobrien gen_rtx_PLUS (Pmode, 46490075Sobrien gen_rtx_REG (Pmode, 46590075Sobrien LAST_VIRTUAL_REGISTER + 1), 46650397Sobrien GEN_INT (4))); 46718334Speter spill_indirect_levels = 0; 46818334Speter 46918334Speter while (memory_address_p (QImode, tem)) 47018334Speter { 47118334Speter spill_indirect_levels++; 47250397Sobrien tem = gen_rtx_MEM (Pmode, tem); 47318334Speter } 47418334Speter 47518334Speter /* See if indirect addressing is valid for (MEM (SYMBOL_REF ...)). */ 47618334Speter 47750397Sobrien tem = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "foo")); 47818334Speter indirect_symref_ok = memory_address_p (QImode, tem); 47918334Speter 48018334Speter /* See if reg+reg is a valid (and offsettable) address. */ 48118334Speter 48218334Speter for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 48318334Speter { 48450397Sobrien tem = gen_rtx_PLUS (Pmode, 48550397Sobrien gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM), 48650397Sobrien gen_rtx_REG (Pmode, i)); 48790075Sobrien 48818334Speter /* This way, we make sure that reg+reg is an offsettable address. */ 48918334Speter tem = plus_constant (tem, 4); 49018334Speter 49118334Speter if (memory_address_p (QImode, tem)) 49218334Speter { 49318334Speter double_reg_address_ok = 1; 49418334Speter break; 49518334Speter } 49618334Speter } 49718334Speter 49850397Sobrien /* Initialize obstack for our rtl allocation. */ 49918334Speter gcc_obstack_init (&reload_obstack); 500132718Skan reload_startobj = obstack_alloc (&reload_obstack, 0); 50190075Sobrien 50290075Sobrien INIT_REG_SET (&spilled_pseudos); 50390075Sobrien INIT_REG_SET (&pseudos_counted); 50452284Sobrien} 50550397Sobrien 50652284Sobrien/* List of insn chains that are currently unused. */ 50752284Sobrienstatic struct insn_chain *unused_insn_chains = 0; 50850397Sobrien 50952284Sobrien/* Allocate an empty insn_chain structure. */ 51052284Sobrienstruct insn_chain * 511132718Skannew_insn_chain (void) 51252284Sobrien{ 51352284Sobrien struct insn_chain *c; 51450397Sobrien 51552284Sobrien if (unused_insn_chains == 0) 51652284Sobrien { 517132718Skan c = obstack_alloc (&reload_obstack, sizeof (struct insn_chain)); 51890075Sobrien INIT_REG_SET (&c->live_throughout); 51990075Sobrien INIT_REG_SET (&c->dead_or_set); 52050397Sobrien } 52152284Sobrien else 52252284Sobrien { 52352284Sobrien c = unused_insn_chains; 52452284Sobrien unused_insn_chains = c->next; 52552284Sobrien } 52652284Sobrien c->is_caller_save_insn = 0; 52752284Sobrien c->need_operand_change = 0; 52852284Sobrien c->need_reload = 0; 52952284Sobrien c->need_elim = 0; 53052284Sobrien return c; 53118334Speter} 53218334Speter 53352284Sobrien/* Small utility function to set all regs in hard reg set TO which are 53452284Sobrien allocated to pseudos in regset FROM. */ 53590075Sobrien 53652284Sobrienvoid 537132718Skancompute_use_by_pseudos (HARD_REG_SET *to, regset from) 53852284Sobrien{ 53990075Sobrien unsigned int regno; 540169689Skan reg_set_iterator rsi; 54190075Sobrien 542169689Skan EXECUTE_IF_SET_IN_REG_SET (from, FIRST_PSEUDO_REGISTER, regno, rsi) 543169689Skan { 544169689Skan int r = reg_renumber[regno]; 545169689Skan int nregs; 54690075Sobrien 547169689Skan if (r < 0) 548169689Skan { 549169689Skan /* reload_combine uses the information from 550169689Skan BASIC_BLOCK->global_live_at_start, which might still 551169689Skan contain registers that have not actually been allocated 552169689Skan since they have an equivalence. */ 553169689Skan gcc_assert (reload_completed); 554169689Skan } 555169689Skan else 556169689Skan { 557169689Skan nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; 558169689Skan while (nregs-- > 0) 559169689Skan SET_HARD_REG_BIT (*to, r + nregs); 560169689Skan } 561169689Skan } 56252284Sobrien} 56390075Sobrien 56490075Sobrien/* Replace all pseudos found in LOC with their corresponding 56590075Sobrien equivalences. */ 56690075Sobrien 56790075Sobrienstatic void 568132718Skanreplace_pseudos_in (rtx *loc, enum machine_mode mem_mode, rtx usage) 56990075Sobrien{ 57090075Sobrien rtx x = *loc; 57190075Sobrien enum rtx_code code; 57290075Sobrien const char *fmt; 57390075Sobrien int i, j; 57490075Sobrien 57590075Sobrien if (! x) 57690075Sobrien return; 57790075Sobrien 57890075Sobrien code = GET_CODE (x); 57990075Sobrien if (code == REG) 58090075Sobrien { 58190075Sobrien unsigned int regno = REGNO (x); 58290075Sobrien 58390075Sobrien if (regno < FIRST_PSEUDO_REGISTER) 58490075Sobrien return; 58590075Sobrien 58690075Sobrien x = eliminate_regs (x, mem_mode, usage); 58790075Sobrien if (x != *loc) 58890075Sobrien { 58990075Sobrien *loc = x; 590132718Skan replace_pseudos_in (loc, mem_mode, usage); 59190075Sobrien return; 59290075Sobrien } 59390075Sobrien 59490075Sobrien if (reg_equiv_constant[regno]) 59590075Sobrien *loc = reg_equiv_constant[regno]; 59690075Sobrien else if (reg_equiv_mem[regno]) 59790075Sobrien *loc = reg_equiv_mem[regno]; 59890075Sobrien else if (reg_equiv_address[regno]) 59990075Sobrien *loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address[regno]); 60090075Sobrien else 601169689Skan { 602169689Skan gcc_assert (!REG_P (regno_reg_rtx[regno]) 603169689Skan || REGNO (regno_reg_rtx[regno]) != regno); 604169689Skan *loc = regno_reg_rtx[regno]; 605169689Skan } 60690075Sobrien 60790075Sobrien return; 60890075Sobrien } 60990075Sobrien else if (code == MEM) 61090075Sobrien { 611132718Skan replace_pseudos_in (& XEXP (x, 0), GET_MODE (x), usage); 61290075Sobrien return; 61390075Sobrien } 61490075Sobrien 61590075Sobrien /* Process each of our operands recursively. */ 61690075Sobrien fmt = GET_RTX_FORMAT (code); 61790075Sobrien for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 61890075Sobrien if (*fmt == 'e') 619132718Skan replace_pseudos_in (&XEXP (x, i), mem_mode, usage); 62090075Sobrien else if (*fmt == 'E') 62190075Sobrien for (j = 0; j < XVECLEN (x, i); j++) 622132718Skan replace_pseudos_in (& XVECEXP (x, i, j), mem_mode, usage); 62390075Sobrien} 62490075Sobrien 62552284Sobrien 62652284Sobrien/* Global variables used by reload and its subroutines. */ 62752284Sobrien 62852284Sobrien/* Set during calculate_needs if an insn needs register elimination. */ 62952284Sobrienstatic int something_needs_elimination; 63052284Sobrien/* Set during calculate_needs if an insn needs an operand changed. */ 631169689Skanstatic int something_needs_operands_changed; 63252284Sobrien 63352284Sobrien/* Nonzero means we couldn't get enough spill regs. */ 63452284Sobrienstatic int failure; 63552284Sobrien 63618334Speter/* Main entry point for the reload pass. 63718334Speter 63818334Speter FIRST is the first insn of the function being compiled. 63918334Speter 64018334Speter GLOBAL nonzero means we were called from global_alloc 64118334Speter and should attempt to reallocate any pseudoregs that we 64218334Speter displace from hard regs we will use for reloads. 64318334Speter If GLOBAL is zero, we do not have enough information to do that, 64418334Speter so any pseudo reg that is spilled must go to the stack. 64518334Speter 64618334Speter Return value is nonzero if reload failed 64718334Speter and we must not do any more for this function. */ 64818334Speter 64918334Speterint 650132718Skanreload (rtx first, int global) 65118334Speter{ 65290075Sobrien int i; 65390075Sobrien rtx insn; 65490075Sobrien struct elim_table *ep; 655117395Skan basic_block bb; 65618334Speter 65752284Sobrien /* Make sure even insns with volatile mem refs are recognizable. */ 65852284Sobrien init_recog (); 65918334Speter 66052284Sobrien failure = 0; 66118334Speter 662132718Skan reload_firstobj = obstack_alloc (&reload_obstack, 0); 66318334Speter 66452284Sobrien /* Make sure that the last insn in the chain 66552284Sobrien is not something that needs reloading. */ 666132718Skan emit_note (NOTE_INSN_DELETED); 66718334Speter 66818334Speter /* Enable find_equiv_reg to distinguish insns made by reload. */ 66918334Speter reload_first_uid = get_max_uid (); 67018334Speter 67118334Speter#ifdef SECONDARY_MEMORY_NEEDED 67218334Speter /* Initialize the secondary memory table. */ 67318334Speter clear_secondary_mem (); 67418334Speter#endif 67518334Speter 67618334Speter /* We don't have a stack slot for any spill reg yet. */ 677132718Skan memset (spill_stack_slot, 0, sizeof spill_stack_slot); 678132718Skan memset (spill_stack_slot_width, 0, sizeof spill_stack_slot_width); 67918334Speter 68018334Speter /* Initialize the save area information for caller-save, in case some 68118334Speter are needed. */ 68218334Speter init_save_areas (); 68318334Speter 68418334Speter /* Compute which hard registers are now in use 68518334Speter as homes for pseudo registers. 68618334Speter This is done here rather than (eg) in global_alloc 68718334Speter because this point is reached even if not optimizing. */ 68818334Speter for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 68918334Speter mark_home_live (i); 69018334Speter 69150397Sobrien /* A function that receives a nonlocal goto must save all call-saved 69250397Sobrien registers. */ 69350397Sobrien if (current_function_has_nonlocal_label) 69450397Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 69590075Sobrien if (! call_used_regs[i] && ! fixed_regs[i] && ! LOCAL_REGNO (i)) 69690075Sobrien regs_ever_live[i] = 1; 69750397Sobrien 69818334Speter /* Find all the pseudo registers that didn't get hard regs 69918334Speter but do have known equivalent constants or memory slots. 70018334Speter These include parameters (known equivalent to parameter slots) 70118334Speter and cse'd or loop-moved constant memory addresses. 70218334Speter 70318334Speter Record constant equivalents in reg_equiv_constant 70418334Speter so they will be substituted by find_reloads. 70518334Speter Record memory equivalents in reg_mem_equiv so they can 70618334Speter be substituted eventually by altering the REG-rtx's. */ 70718334Speter 708169689Skan reg_equiv_constant = XCNEWVEC (rtx, max_regno); 709169689Skan reg_equiv_invariant = XCNEWVEC (rtx, max_regno); 710169689Skan reg_equiv_mem = XCNEWVEC (rtx, max_regno); 711169689Skan reg_equiv_alt_mem_list = XCNEWVEC (rtx, max_regno); 712169689Skan reg_equiv_address = XCNEWVEC (rtx, max_regno); 713169689Skan reg_max_ref_width = XCNEWVEC (unsigned int, max_regno); 714169689Skan reg_old_renumber = XCNEWVEC (short, max_regno); 71590075Sobrien memcpy (reg_old_renumber, reg_renumber, max_regno * sizeof (short)); 716169689Skan pseudo_forbidden_regs = XNEWVEC (HARD_REG_SET, max_regno); 717169689Skan pseudo_previous_regs = XCNEWVEC (HARD_REG_SET, max_regno); 71818334Speter 71952284Sobrien CLEAR_HARD_REG_SET (bad_spill_regs_global); 72018334Speter 721169689Skan /* Look for REG_EQUIV notes; record what each pseudo is equivalent 722169689Skan to. Also find all paradoxical subregs and find largest such for 723169689Skan each pseudo. */ 72418334Speter 72552284Sobrien num_eliminable_invariants = 0; 72618334Speter for (insn = first; insn; insn = NEXT_INSN (insn)) 72718334Speter { 72818334Speter rtx set = single_set (insn); 72918334Speter 73090075Sobrien /* We may introduce USEs that we want to remove at the end, so 73190075Sobrien we'll mark them with QImode. Make sure there are no 73290075Sobrien previously-marked insns left by say regmove. */ 73390075Sobrien if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE 73490075Sobrien && GET_MODE (insn) != VOIDmode) 73590075Sobrien PUT_MODE (insn, VOIDmode); 73690075Sobrien 737169689Skan if (INSN_P (insn)) 738169689Skan scan_paradoxical_subregs (PATTERN (insn)); 739169689Skan 740169689Skan if (set != 0 && REG_P (SET_DEST (set))) 74118334Speter { 74218334Speter rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX); 743169689Skan rtx x; 744169689Skan 745169689Skan if (! note) 746169689Skan continue; 747169689Skan 748169689Skan i = REGNO (SET_DEST (set)); 749169689Skan x = XEXP (note, 0); 750169689Skan 751169689Skan if (i <= LAST_VIRTUAL_REGISTER) 752169689Skan continue; 753169689Skan 754169689Skan if (! function_invariant_p (x) 755169689Skan || ! flag_pic 756169689Skan /* A function invariant is often CONSTANT_P but may 757169689Skan include a register. We promise to only pass 758169689Skan CONSTANT_P objects to LEGITIMATE_PIC_OPERAND_P. */ 759169689Skan || (CONSTANT_P (x) 760169689Skan && LEGITIMATE_PIC_OPERAND_P (x))) 76118334Speter { 762169689Skan /* It can happen that a REG_EQUIV note contains a MEM 763169689Skan that is not a legitimate memory operand. As later 764169689Skan stages of reload assume that all addresses found 765169689Skan in the reg_equiv_* arrays were originally legitimate, 766169689Skan we ignore such REG_EQUIV notes. */ 767169689Skan if (memory_operand (x, VOIDmode)) 76818334Speter { 769169689Skan /* Always unshare the equivalence, so we can 770169689Skan substitute into this insn without touching the 771169689Skan equivalence. */ 772169689Skan reg_equiv_memory_loc[i] = copy_rtx (x); 773169689Skan } 774169689Skan else if (function_invariant_p (x)) 775169689Skan { 776169689Skan if (GET_CODE (x) == PLUS) 77750397Sobrien { 778169689Skan /* This is PLUS of frame pointer and a constant, 779169689Skan and might be shared. Unshare it. */ 780169689Skan reg_equiv_invariant[i] = copy_rtx (x); 781169689Skan num_eliminable_invariants++; 78250397Sobrien } 783169689Skan else if (x == frame_pointer_rtx || x == arg_pointer_rtx) 78418334Speter { 785169689Skan reg_equiv_invariant[i] = x; 786169689Skan num_eliminable_invariants++; 78718334Speter } 788169689Skan else if (LEGITIMATE_CONSTANT_P (x)) 789169689Skan reg_equiv_constant[i] = x; 79018334Speter else 791169689Skan { 792169689Skan reg_equiv_memory_loc[i] 793169689Skan = force_const_mem (GET_MODE (SET_DEST (set)), x); 794169689Skan if (! reg_equiv_memory_loc[i]) 795169689Skan reg_equiv_init[i] = NULL_RTX; 796169689Skan } 79718334Speter } 798169689Skan else 799169689Skan { 800169689Skan reg_equiv_init[i] = NULL_RTX; 801169689Skan continue; 802169689Skan } 80318334Speter } 804169689Skan else 805169689Skan reg_equiv_init[i] = NULL_RTX; 80618334Speter } 807169689Skan } 80818334Speter 809169689Skan if (dump_file) 810169689Skan for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 811169689Skan if (reg_equiv_init[i]) 812169689Skan { 813169689Skan fprintf (dump_file, "init_insns for %u: ", i); 814169689Skan print_inline_rtx (dump_file, reg_equiv_init[i], 20); 815169689Skan fprintf (dump_file, "\n"); 816169689Skan } 81718334Speter 81852284Sobrien init_elim_table (); 81918334Speter 820117395Skan first_label_num = get_first_label_num (); 821117395Skan num_labels = max_label_num () - first_label_num; 82218334Speter 82318334Speter /* Allocate the tables used to store offset information at labels. */ 82450397Sobrien /* We used to use alloca here, but the size of what it would try to 82550397Sobrien allocate would occasionally cause it to exceed the stack limit and 82650397Sobrien cause a core dump. */ 827169689Skan offsets_known_at = XNEWVEC (char, num_labels); 828169689Skan offsets_at = (HOST_WIDE_INT (*)[NUM_ELIMINABLE_REGS]) xmalloc (num_labels * NUM_ELIMINABLE_REGS * sizeof (HOST_WIDE_INT)); 82918334Speter 83018334Speter /* Alter each pseudo-reg rtx to contain its hard reg number. 83118334Speter Assign stack slots to the pseudos that lack hard regs or equivalents. 83218334Speter Do not touch virtual registers. */ 83318334Speter 83418334Speter for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++) 83518334Speter alter_reg (i, -1); 83618334Speter 83718334Speter /* If we have some registers we think can be eliminated, scan all insns to 83818334Speter see if there is an insn that sets one of these registers to something 83918334Speter other than itself plus a constant. If so, the register cannot be 84018334Speter eliminated. Doing this scan here eliminates an extra pass through the 84118334Speter main reload loop in the most common case where register elimination 84218334Speter cannot be done. */ 84318334Speter for (insn = first; insn && num_eliminable; insn = NEXT_INSN (insn)) 844169689Skan if (INSN_P (insn)) 84590075Sobrien note_stores (PATTERN (insn), mark_not_eliminable, NULL); 84618334Speter 84752284Sobrien maybe_fix_stack_asms (); 84818334Speter 84952284Sobrien insns_need_reload = 0; 85052284Sobrien something_needs_elimination = 0; 85190075Sobrien 85218334Speter /* Initialize to -1, which means take the first spill register. */ 85318334Speter last_spill_reg = -1; 85418334Speter 85518334Speter /* Spill any hard regs that we know we can't eliminate. */ 85652284Sobrien CLEAR_HARD_REG_SET (used_spill_regs); 857169689Skan /* There can be multiple ways to eliminate a register; 858169689Skan they should be listed adjacently. 859169689Skan Elimination for any register fails only if all possible ways fail. */ 860169689Skan for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ) 861169689Skan { 862169689Skan int from = ep->from; 863169689Skan int can_eliminate = 0; 864169689Skan do 865169689Skan { 866169689Skan can_eliminate |= ep->can_eliminate; 867169689Skan ep++; 868169689Skan } 869169689Skan while (ep < ®_eliminate[NUM_ELIMINABLE_REGS] && ep->from == from); 870169689Skan if (! can_eliminate) 871169689Skan spill_hard_reg (from, 1); 872169689Skan } 87318334Speter 87418334Speter#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 87518334Speter if (frame_pointer_needed) 87690075Sobrien spill_hard_reg (HARD_FRAME_POINTER_REGNUM, 1); 87718334Speter#endif 87890075Sobrien finish_spills (global); 87918334Speter 88052284Sobrien /* From now on, we may need to generate moves differently. We may also 88152284Sobrien allow modifications of insns which cause them to not be recognized. 88252284Sobrien Any such modifications will be cleaned up during reload itself. */ 88318334Speter reload_in_progress = 1; 88418334Speter 88518334Speter /* This loop scans the entire function each go-round 88618334Speter and repeats until one repetition spills no additional hard regs. */ 88752284Sobrien for (;;) 88818334Speter { 88952284Sobrien int something_changed; 89052284Sobrien int did_spill; 89118334Speter 89250397Sobrien HOST_WIDE_INT starting_frame_size; 89318334Speter 89490075Sobrien /* Round size of stack frame to stack_alignment_needed. This must be done 89550397Sobrien here because the stack size may be a part of the offset computation 89650397Sobrien for register elimination, and there might have been new stack slots 89790075Sobrien created in the last iteration of this loop. */ 89890075Sobrien if (cfun->stack_alignment_needed) 89990075Sobrien assign_stack_local (BLKmode, 0, cfun->stack_alignment_needed); 90050397Sobrien 90150397Sobrien starting_frame_size = get_frame_size (); 90250397Sobrien 90352284Sobrien set_initial_elim_offsets (); 90452284Sobrien set_initial_label_offsets (); 90518334Speter 90618334Speter /* For each pseudo register that has an equivalent location defined, 90718334Speter try to eliminate any eliminable registers (such as the frame pointer) 90818334Speter assuming initial offsets for the replacement register, which 90918334Speter is the normal case. 91018334Speter 91118334Speter If the resulting location is directly addressable, substitute 91218334Speter the MEM we just got directly for the old REG. 91318334Speter 91418334Speter If it is not addressable but is a constant or the sum of a hard reg 91518334Speter and constant, it is probably not addressable because the constant is 91618334Speter out of range, in that case record the address; we will generate 91718334Speter hairy code to compute the address in a register each time it is 91818334Speter needed. Similarly if it is a hard register, but one that is not 91918334Speter valid as an address register. 92018334Speter 92118334Speter If the location is not addressable, but does not have one of the 92218334Speter above forms, assign a stack slot. We have to do this to avoid the 92318334Speter potential of producing lots of reloads if, e.g., a location involves 92418334Speter a pseudo that didn't get a hard register and has an equivalent memory 92518334Speter location that also involves a pseudo that didn't get a hard register. 92618334Speter 92718334Speter Perhaps at some point we will improve reload_when_needed handling 92818334Speter so this problem goes away. But that's very hairy. */ 92918334Speter 93018334Speter for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 93118334Speter if (reg_renumber[i] < 0 && reg_equiv_memory_loc[i]) 93218334Speter { 93318334Speter rtx x = eliminate_regs (reg_equiv_memory_loc[i], 0, NULL_RTX); 93418334Speter 93518334Speter if (strict_memory_address_p (GET_MODE (regno_reg_rtx[i]), 93618334Speter XEXP (x, 0))) 93718334Speter reg_equiv_mem[i] = x, reg_equiv_address[i] = 0; 93818334Speter else if (CONSTANT_P (XEXP (x, 0)) 939169689Skan || (REG_P (XEXP (x, 0)) 94018334Speter && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) 94118334Speter || (GET_CODE (XEXP (x, 0)) == PLUS 942169689Skan && REG_P (XEXP (XEXP (x, 0), 0)) 94318334Speter && (REGNO (XEXP (XEXP (x, 0), 0)) 94418334Speter < FIRST_PSEUDO_REGISTER) 94518334Speter && CONSTANT_P (XEXP (XEXP (x, 0), 1)))) 94618334Speter reg_equiv_address[i] = XEXP (x, 0), reg_equiv_mem[i] = 0; 94718334Speter else 94818334Speter { 94918334Speter /* Make a new stack slot. Then indicate that something 95018334Speter changed so we go back and recompute offsets for 95118334Speter eliminable registers because the allocation of memory 95218334Speter below might change some offset. reg_equiv_{mem,address} 95318334Speter will be set up for this pseudo on the next pass around 95418334Speter the loop. */ 95518334Speter reg_equiv_memory_loc[i] = 0; 95618334Speter reg_equiv_init[i] = 0; 95718334Speter alter_reg (i, -1); 95818334Speter } 95918334Speter } 96018334Speter 96152284Sobrien if (caller_save_needed) 96252284Sobrien setup_save_areas (); 96352284Sobrien 96452284Sobrien /* If we allocated another stack slot, redo elimination bookkeeping. */ 96552284Sobrien if (starting_frame_size != get_frame_size ()) 96618334Speter continue; 96718334Speter 96852284Sobrien if (caller_save_needed) 96918334Speter { 97052284Sobrien save_call_clobbered_regs (); 97152284Sobrien /* That might have allocated new insn_chain structures. */ 972132718Skan reload_firstobj = obstack_alloc (&reload_obstack, 0); 97318334Speter } 97418334Speter 97552284Sobrien calculate_needs_all_insns (global); 97618334Speter 97790075Sobrien CLEAR_REG_SET (&spilled_pseudos); 97852284Sobrien did_spill = 0; 97918334Speter 98052284Sobrien something_changed = 0; 98118334Speter 98252284Sobrien /* If we allocated any new memory locations, make another pass 98352284Sobrien since it might have changed elimination offsets. */ 98452284Sobrien if (starting_frame_size != get_frame_size ()) 98552284Sobrien something_changed = 1; 98618334Speter 987169689Skan /* Even if the frame size remained the same, we might still have 988169689Skan changed elimination offsets, e.g. if find_reloads called 989169689Skan force_const_mem requiring the back end to allocate a constant 990169689Skan pool base register that needs to be saved on the stack. */ 991169689Skan else if (!verify_initial_elim_offsets ()) 992169689Skan something_changed = 1; 993169689Skan 99452284Sobrien { 99552284Sobrien HARD_REG_SET to_spill; 99652284Sobrien CLEAR_HARD_REG_SET (to_spill); 99752284Sobrien update_eliminables (&to_spill); 998169689Skan AND_COMPL_HARD_REG_SET(used_spill_regs, to_spill); 999169689Skan 100052284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 100152284Sobrien if (TEST_HARD_REG_BIT (to_spill, i)) 100218334Speter { 100390075Sobrien spill_hard_reg (i, 1); 100452284Sobrien did_spill = 1; 100518334Speter 100652284Sobrien /* Regardless of the state of spills, if we previously had 1007117395Skan a register that we thought we could eliminate, but now can 100852284Sobrien not eliminate, we must run another pass. 100918334Speter 101052284Sobrien Consider pseudos which have an entry in reg_equiv_* which 101152284Sobrien reference an eliminable register. We must make another pass 101252284Sobrien to update reg_equiv_* so that we do not substitute in the 101352284Sobrien old value from when we thought the elimination could be 101452284Sobrien performed. */ 101552284Sobrien something_changed = 1; 101652284Sobrien } 101752284Sobrien } 101818334Speter 101990075Sobrien select_reload_regs (); 102052284Sobrien if (failure) 102152284Sobrien goto failed; 102218334Speter 102352284Sobrien if (insns_need_reload != 0 || did_spill) 102490075Sobrien something_changed |= finish_spills (global); 102518334Speter 102652284Sobrien if (! something_changed) 102752284Sobrien break; 102818334Speter 102952284Sobrien if (caller_save_needed) 103052284Sobrien delete_caller_save_insns (); 103190075Sobrien 103290075Sobrien obstack_free (&reload_obstack, reload_firstobj); 103352284Sobrien } 103418334Speter 103552284Sobrien /* If global-alloc was run, notify it of any register eliminations we have 103652284Sobrien done. */ 103752284Sobrien if (global) 103852284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 103952284Sobrien if (ep->can_eliminate) 104052284Sobrien mark_elimination (ep->from, ep->to); 104152284Sobrien 104252284Sobrien /* If a pseudo has no hard reg, delete the insns that made the equivalence. 104352284Sobrien If that insn didn't set the register (i.e., it copied the register to 104452284Sobrien memory), just delete that insn instead of the equivalencing insn plus 104552284Sobrien anything now dead. If we call delete_dead_insn on that insn, we may 104652284Sobrien delete the insn that actually sets the register if the register dies 104752284Sobrien there and that is incorrect. */ 104852284Sobrien 104952284Sobrien for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 105052284Sobrien { 105152284Sobrien if (reg_renumber[i] < 0 && reg_equiv_init[i] != 0) 105252284Sobrien { 105352284Sobrien rtx list; 105452284Sobrien for (list = reg_equiv_init[i]; list; list = XEXP (list, 1)) 105552284Sobrien { 105652284Sobrien rtx equiv_insn = XEXP (list, 0); 105790075Sobrien 105890075Sobrien /* If we already deleted the insn or if it may trap, we can't 105990075Sobrien delete it. The latter case shouldn't happen, but can 106090075Sobrien if an insn has a variable address, gets a REG_EH_REGION 1061169689Skan note added to it, and then gets converted into a load 106290075Sobrien from a constant address. */ 1063169689Skan if (NOTE_P (equiv_insn) 106490075Sobrien || can_throw_internal (equiv_insn)) 106590075Sobrien ; 106690075Sobrien else if (reg_set_p (regno_reg_rtx[i], PATTERN (equiv_insn))) 106752284Sobrien delete_dead_insn (equiv_insn); 106852284Sobrien else 1069169689Skan SET_INSN_DELETED (equiv_insn); 107052284Sobrien } 107152284Sobrien } 107252284Sobrien } 107318334Speter 107452284Sobrien /* Use the reload registers where necessary 107552284Sobrien by generating move instructions to move the must-be-register 107652284Sobrien values into or out of the reload registers. */ 107718334Speter 107852284Sobrien if (insns_need_reload != 0 || something_needs_elimination 107952284Sobrien || something_needs_operands_changed) 108052284Sobrien { 108190075Sobrien HOST_WIDE_INT old_frame_size = get_frame_size (); 108218334Speter 108352284Sobrien reload_as_needed (global); 108418334Speter 1085169689Skan gcc_assert (old_frame_size == get_frame_size ()); 108618334Speter 1087169689Skan gcc_assert (verify_initial_elim_offsets ()); 108852284Sobrien } 108918334Speter 109052284Sobrien /* If we were able to eliminate the frame pointer, show that it is no 109152284Sobrien longer live at the start of any basic block. If it ls live by 109252284Sobrien virtue of being in a pseudo, that pseudo will be marked live 109352284Sobrien and hence the frame pointer will be known to be live via that 109452284Sobrien pseudo. */ 109518334Speter 109652284Sobrien if (! frame_pointer_needed) 1097117395Skan FOR_EACH_BB (bb) 1098169689Skan CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_start, 109952284Sobrien HARD_FRAME_POINTER_REGNUM); 110018334Speter 1101169689Skan /* Come here (with failure set nonzero) if we can't get enough spill 1102169689Skan regs. */ 110352284Sobrien failed: 110418334Speter 110590075Sobrien CLEAR_REG_SET (&spilled_pseudos); 110652284Sobrien reload_in_progress = 0; 110718334Speter 110852284Sobrien /* Now eliminate all pseudo regs by modifying them into 110952284Sobrien their equivalent memory references. 111052284Sobrien The REG-rtx's for the pseudos are modified in place, 111152284Sobrien so all insns that used to refer to them now refer to memory. 111218334Speter 111352284Sobrien For a reg that has a reg_equiv_address, all those insns 111452284Sobrien were changed by reloading so that no insns refer to it any longer; 111552284Sobrien but the DECL_RTL of a variable decl may refer to it, 111652284Sobrien and if so this causes the debugging info to mention the variable. */ 111718334Speter 111852284Sobrien for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 111952284Sobrien { 112052284Sobrien rtx addr = 0; 112118334Speter 112252284Sobrien if (reg_equiv_mem[i]) 112352284Sobrien addr = XEXP (reg_equiv_mem[i], 0); 112418334Speter 112552284Sobrien if (reg_equiv_address[i]) 112652284Sobrien addr = reg_equiv_address[i]; 112718334Speter 112852284Sobrien if (addr) 112952284Sobrien { 113052284Sobrien if (reg_renumber[i] < 0) 113152284Sobrien { 113252284Sobrien rtx reg = regno_reg_rtx[i]; 113390075Sobrien 1134117395Skan REG_USERVAR_P (reg) = 0; 113590075Sobrien PUT_CODE (reg, MEM); 113652284Sobrien XEXP (reg, 0) = addr; 113790075Sobrien if (reg_equiv_memory_loc[i]) 113890075Sobrien MEM_COPY_ATTRIBUTES (reg, reg_equiv_memory_loc[i]); 113990075Sobrien else 114090075Sobrien { 1141169689Skan MEM_IN_STRUCT_P (reg) = MEM_SCALAR_P (reg) = 0; 114290075Sobrien MEM_ATTRS (reg) = 0; 114390075Sobrien } 1144169689Skan MEM_NOTRAP_P (reg) = 1; 114552284Sobrien } 114652284Sobrien else if (reg_equiv_mem[i]) 114752284Sobrien XEXP (reg_equiv_mem[i], 0) = addr; 114852284Sobrien } 114952284Sobrien } 115018334Speter 115152284Sobrien /* We must set reload_completed now since the cleanup_subreg_operands call 115252284Sobrien below will re-recognize each insn and reload may have generated insns 115352284Sobrien which are only valid during and after reload. */ 115452284Sobrien reload_completed = 1; 115518334Speter 115690075Sobrien /* Make a pass over all the insns and delete all USEs which we inserted 115790075Sobrien only to tag a REG_EQUAL note on them. Remove all REG_DEAD and REG_UNUSED 1158117395Skan notes. Delete all CLOBBER insns, except those that refer to the return 1159117395Skan value and the special mem:BLK CLOBBERs added to prevent the scheduler 1160117395Skan from misarranging variable-array code, and simplify (subreg (reg)) 1161117395Skan operands. Also remove all REG_RETVAL and REG_LIBCALL notes since they 1162117395Skan are no longer useful or accurate. Strip and regenerate REG_INC notes 1163117395Skan that may have been moved around. */ 116418334Speter 116552284Sobrien for (insn = first; insn; insn = NEXT_INSN (insn)) 116690075Sobrien if (INSN_P (insn)) 116752284Sobrien { 116852284Sobrien rtx *pnote; 116918334Speter 1170169689Skan if (CALL_P (insn)) 1171132718Skan replace_pseudos_in (& CALL_INSN_FUNCTION_USAGE (insn), 1172132718Skan VOIDmode, CALL_INSN_FUNCTION_USAGE (insn)); 117390075Sobrien 117452284Sobrien if ((GET_CODE (PATTERN (insn)) == USE 117590075Sobrien /* We mark with QImode USEs introduced by reload itself. */ 117690075Sobrien && (GET_MODE (insn) == QImode 117790075Sobrien || find_reg_note (insn, REG_EQUAL, NULL_RTX))) 117890075Sobrien || (GET_CODE (PATTERN (insn)) == CLOBBER 1179169689Skan && (!MEM_P (XEXP (PATTERN (insn), 0)) 1180117395Skan || GET_MODE (XEXP (PATTERN (insn), 0)) != BLKmode 1181117395Skan || (GET_CODE (XEXP (XEXP (PATTERN (insn), 0), 0)) != SCRATCH 1182132718Skan && XEXP (XEXP (PATTERN (insn), 0), 0) 1183117395Skan != stack_pointer_rtx)) 1184169689Skan && (!REG_P (XEXP (PATTERN (insn), 0)) 118590075Sobrien || ! REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0))))) 118652284Sobrien { 118790075Sobrien delete_insn (insn); 118852284Sobrien continue; 118952284Sobrien } 119018334Speter 1191132718Skan /* Some CLOBBERs may survive until here and still reference unassigned 1192132718Skan pseudos with const equivalent, which may in turn cause ICE in later 1193132718Skan passes if the reference remains in place. */ 1194132718Skan if (GET_CODE (PATTERN (insn)) == CLOBBER) 1195132718Skan replace_pseudos_in (& XEXP (PATTERN (insn), 0), 1196132718Skan VOIDmode, PATTERN (insn)); 1197132718Skan 1198169689Skan /* Discard obvious no-ops, even without -O. This optimization 1199169689Skan is fast and doesn't interfere with debugging. */ 1200169689Skan if (NONJUMP_INSN_P (insn) 1201169689Skan && GET_CODE (PATTERN (insn)) == SET 1202169689Skan && REG_P (SET_SRC (PATTERN (insn))) 1203169689Skan && REG_P (SET_DEST (PATTERN (insn))) 1204169689Skan && (REGNO (SET_SRC (PATTERN (insn))) 1205169689Skan == REGNO (SET_DEST (PATTERN (insn))))) 1206169689Skan { 1207169689Skan delete_insn (insn); 1208169689Skan continue; 1209169689Skan } 1210169689Skan 121152284Sobrien pnote = ®_NOTES (insn); 121252284Sobrien while (*pnote != 0) 121352284Sobrien { 121452284Sobrien if (REG_NOTE_KIND (*pnote) == REG_DEAD 121552284Sobrien || REG_NOTE_KIND (*pnote) == REG_UNUSED 121652284Sobrien || REG_NOTE_KIND (*pnote) == REG_INC 121752284Sobrien || REG_NOTE_KIND (*pnote) == REG_RETVAL 121852284Sobrien || REG_NOTE_KIND (*pnote) == REG_LIBCALL) 121952284Sobrien *pnote = XEXP (*pnote, 1); 122052284Sobrien else 122152284Sobrien pnote = &XEXP (*pnote, 1); 122252284Sobrien } 122318334Speter 122452284Sobrien#ifdef AUTO_INC_DEC 122552284Sobrien add_auto_inc_notes (insn, PATTERN (insn)); 122652284Sobrien#endif 122718334Speter 1228169689Skan /* Simplify (subreg (reg)) if it appears as an operand. */ 122952284Sobrien cleanup_subreg_operands (insn); 1230169689Skan 1231169689Skan /* Clean up invalid ASMs so that they don't confuse later passes. 1232169689Skan See PR 21299. */ 1233169689Skan if (asm_noperands (PATTERN (insn)) >= 0) 1234169689Skan { 1235169689Skan extract_insn (insn); 1236169689Skan if (!constrain_operands (1)) 1237169689Skan { 1238169689Skan error_for_asm (insn, 1239169689Skan "%<asm%> operand has impossible constraints"); 1240169689Skan delete_insn (insn); 1241169689Skan continue; 1242169689Skan } 1243169689Skan } 124452284Sobrien } 124518334Speter 124652284Sobrien /* If we are doing stack checking, give a warning if this function's 124752284Sobrien frame size is larger than we expect. */ 124852284Sobrien if (flag_stack_check && ! STACK_CHECK_BUILTIN) 124952284Sobrien { 125052284Sobrien HOST_WIDE_INT size = get_frame_size () + STACK_CHECK_FIXED_FRAME_SIZE; 125190075Sobrien static int verbose_warned = 0; 125290075Sobrien 125352284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 125452284Sobrien if (regs_ever_live[i] && ! fixed_regs[i] && call_used_regs[i]) 125552284Sobrien size += UNITS_PER_WORD; 125618334Speter 125752284Sobrien if (size > STACK_CHECK_MAX_FRAME_SIZE) 125890075Sobrien { 1259169689Skan warning (0, "frame size too large for reliable stack checking"); 126052284Sobrien if (! verbose_warned) 126152284Sobrien { 1262169689Skan warning (0, "try reducing the number of local variables"); 126352284Sobrien verbose_warned = 1; 126452284Sobrien } 126552284Sobrien } 126652284Sobrien } 126718334Speter 126852284Sobrien /* Indicate that we no longer have known memory locations or constants. */ 126952284Sobrien if (reg_equiv_constant) 127052284Sobrien free (reg_equiv_constant); 1271169689Skan if (reg_equiv_invariant) 1272169689Skan free (reg_equiv_invariant); 127352284Sobrien reg_equiv_constant = 0; 1274169689Skan reg_equiv_invariant = 0; 1275169689Skan VEC_free (rtx, gc, reg_equiv_memory_loc_vec); 127652284Sobrien reg_equiv_memory_loc = 0; 127718334Speter 1278117395Skan if (offsets_known_at) 1279117395Skan free (offsets_known_at); 1280117395Skan if (offsets_at) 1281117395Skan free (offsets_at); 128218334Speter 1283169689Skan for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1284169689Skan if (reg_equiv_alt_mem_list[i]) 1285169689Skan free_EXPR_LIST_list (®_equiv_alt_mem_list[i]); 1286169689Skan free (reg_equiv_alt_mem_list); 1287169689Skan 128852284Sobrien free (reg_equiv_mem); 1289169689Skan reg_equiv_init = 0; 129052284Sobrien free (reg_equiv_address); 129152284Sobrien free (reg_max_ref_width); 129252284Sobrien free (reg_old_renumber); 129352284Sobrien free (pseudo_previous_regs); 129452284Sobrien free (pseudo_forbidden_regs); 129518334Speter 129652284Sobrien CLEAR_HARD_REG_SET (used_spill_regs); 129752284Sobrien for (i = 0; i < n_spills; i++) 129852284Sobrien SET_HARD_REG_BIT (used_spill_regs, spill_regs[i]); 129918334Speter 130052284Sobrien /* Free all the insn_chain structures at once. */ 130152284Sobrien obstack_free (&reload_obstack, reload_startobj); 130252284Sobrien unused_insn_chains = 0; 130390075Sobrien fixup_abnormal_edges (); 130418334Speter 130596263Sobrien /* Replacing pseudos with their memory equivalents might have 130696263Sobrien created shared rtx. Subsequent passes would get confused 130796263Sobrien by this, so unshare everything here. */ 130896263Sobrien unshare_all_rtl_again (first); 130996263Sobrien 1310132718Skan#ifdef STACK_BOUNDARY 1311132718Skan /* init_emit has set the alignment of the hard frame pointer 1312132718Skan to STACK_BOUNDARY. It is very likely no longer valid if 1313132718Skan the hard frame pointer was used for register allocation. */ 1314132718Skan if (!frame_pointer_needed) 1315132718Skan REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = BITS_PER_UNIT; 1316132718Skan#endif 1317132718Skan 131852284Sobrien return failure; 131952284Sobrien} 132018334Speter 132152284Sobrien/* Yet another special case. Unfortunately, reg-stack forces people to 132252284Sobrien write incorrect clobbers in asm statements. These clobbers must not 132352284Sobrien cause the register to appear in bad_spill_regs, otherwise we'll call 132452284Sobrien fatal_insn later. We clear the corresponding regnos in the live 132552284Sobrien register sets to avoid this. 132652284Sobrien The whole thing is rather sick, I'm afraid. */ 132790075Sobrien 132852284Sobrienstatic void 1329132718Skanmaybe_fix_stack_asms (void) 133052284Sobrien{ 133152284Sobrien#ifdef STACK_REGS 133290075Sobrien const char *constraints[MAX_RECOG_OPERANDS]; 133352284Sobrien enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 133452284Sobrien struct insn_chain *chain; 133518334Speter 133652284Sobrien for (chain = reload_insn_chain; chain != 0; chain = chain->next) 133752284Sobrien { 133852284Sobrien int i, noperands; 133952284Sobrien HARD_REG_SET clobbered, allowed; 134052284Sobrien rtx pat; 134118334Speter 134290075Sobrien if (! INSN_P (chain->insn) 134352284Sobrien || (noperands = asm_noperands (PATTERN (chain->insn))) < 0) 134452284Sobrien continue; 134552284Sobrien pat = PATTERN (chain->insn); 134652284Sobrien if (GET_CODE (pat) != PARALLEL) 134752284Sobrien continue; 134818334Speter 134952284Sobrien CLEAR_HARD_REG_SET (clobbered); 135052284Sobrien CLEAR_HARD_REG_SET (allowed); 135118334Speter 135252284Sobrien /* First, make a mask of all stack regs that are clobbered. */ 135352284Sobrien for (i = 0; i < XVECLEN (pat, 0); i++) 135452284Sobrien { 135552284Sobrien rtx t = XVECEXP (pat, 0, i); 135652284Sobrien if (GET_CODE (t) == CLOBBER && STACK_REG_P (XEXP (t, 0))) 135752284Sobrien SET_HARD_REG_BIT (clobbered, REGNO (XEXP (t, 0))); 135852284Sobrien } 135918334Speter 136052284Sobrien /* Get the operand values and constraints out of the insn. */ 136190075Sobrien decode_asm_operands (pat, recog_data.operand, recog_data.operand_loc, 136252284Sobrien constraints, operand_mode); 136318334Speter 136452284Sobrien /* For every operand, see what registers are allowed. */ 136552284Sobrien for (i = 0; i < noperands; i++) 136652284Sobrien { 136790075Sobrien const char *p = constraints[i]; 136852284Sobrien /* For every alternative, we compute the class of registers allowed 136952284Sobrien for reloading in CLS, and merge its contents into the reg set 137052284Sobrien ALLOWED. */ 137152284Sobrien int cls = (int) NO_REGS; 137218334Speter 137352284Sobrien for (;;) 137452284Sobrien { 1375132718Skan char c = *p; 137618334Speter 137752284Sobrien if (c == '\0' || c == ',' || c == '#') 137852284Sobrien { 137952284Sobrien /* End of one alternative - mark the regs in the current 138052284Sobrien class, and reset the class. */ 138152284Sobrien IOR_HARD_REG_SET (allowed, reg_class_contents[cls]); 138252284Sobrien cls = NO_REGS; 1383132718Skan p++; 138452284Sobrien if (c == '#') 138552284Sobrien do { 138652284Sobrien c = *p++; 138752284Sobrien } while (c != '\0' && c != ','); 138852284Sobrien if (c == '\0') 138952284Sobrien break; 139052284Sobrien continue; 139152284Sobrien } 139218334Speter 139352284Sobrien switch (c) 139452284Sobrien { 139552284Sobrien case '=': case '+': case '*': case '%': case '?': case '!': 139652284Sobrien case '0': case '1': case '2': case '3': case '4': case 'm': 139752284Sobrien case '<': case '>': case 'V': case 'o': case '&': case 'E': 139852284Sobrien case 'F': case 's': case 'i': case 'n': case 'X': case 'I': 139952284Sobrien case 'J': case 'K': case 'L': case 'M': case 'N': case 'O': 140052284Sobrien case 'P': 140152284Sobrien break; 140218334Speter 140352284Sobrien case 'p': 140490075Sobrien cls = (int) reg_class_subunion[cls] 1405169689Skan [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; 140652284Sobrien break; 140718334Speter 140852284Sobrien case 'g': 140952284Sobrien case 'r': 141052284Sobrien cls = (int) reg_class_subunion[cls][(int) GENERAL_REGS]; 141152284Sobrien break; 141218334Speter 141352284Sobrien default: 1414132718Skan if (EXTRA_ADDRESS_CONSTRAINT (c, p)) 1415117395Skan cls = (int) reg_class_subunion[cls] 1416169689Skan [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; 1417117395Skan else 1418117395Skan cls = (int) reg_class_subunion[cls] 1419132718Skan [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]; 142018334Speter } 1421132718Skan p += CONSTRAINT_LEN (c, p); 142252284Sobrien } 142352284Sobrien } 142452284Sobrien /* Those of the registers which are clobbered, but allowed by the 142552284Sobrien constraints, must be usable as reload registers. So clear them 142652284Sobrien out of the life information. */ 142752284Sobrien AND_HARD_REG_SET (allowed, clobbered); 142852284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 142952284Sobrien if (TEST_HARD_REG_BIT (allowed, i)) 143052284Sobrien { 143190075Sobrien CLEAR_REGNO_REG_SET (&chain->live_throughout, i); 143290075Sobrien CLEAR_REGNO_REG_SET (&chain->dead_or_set, i); 143352284Sobrien } 143452284Sobrien } 143518334Speter 143652284Sobrien#endif 143752284Sobrien} 143890075Sobrien 143990075Sobrien/* Copy the global variables n_reloads and rld into the corresponding elts 144090075Sobrien of CHAIN. */ 144190075Sobrienstatic void 1442132718Skancopy_reloads (struct insn_chain *chain) 144390075Sobrien{ 144490075Sobrien chain->n_reloads = n_reloads; 1445132718Skan chain->rld = obstack_alloc (&reload_obstack, 1446132718Skan n_reloads * sizeof (struct reload)); 144790075Sobrien memcpy (chain->rld, rld, n_reloads * sizeof (struct reload)); 1448132718Skan reload_insn_firstobj = obstack_alloc (&reload_obstack, 0); 144990075Sobrien} 145018334Speter 145152284Sobrien/* Walk the chain of insns, and determine for each whether it needs reloads 145252284Sobrien and/or eliminations. Build the corresponding insns_need_reload list, and 145352284Sobrien set something_needs_elimination as appropriate. */ 145452284Sobrienstatic void 1455132718Skancalculate_needs_all_insns (int global) 145652284Sobrien{ 145752284Sobrien struct insn_chain **pprev_reload = &insns_need_reload; 145890075Sobrien struct insn_chain *chain, *next = 0; 145918334Speter 146052284Sobrien something_needs_elimination = 0; 146118334Speter 1462132718Skan reload_insn_firstobj = obstack_alloc (&reload_obstack, 0); 146390075Sobrien for (chain = reload_insn_chain; chain != 0; chain = next) 146452284Sobrien { 146590075Sobrien rtx insn = chain->insn; 146618334Speter 146790075Sobrien next = chain->next; 146818334Speter 146990075Sobrien /* Clear out the shortcuts. */ 147090075Sobrien chain->n_reloads = 0; 147190075Sobrien chain->need_elim = 0; 147290075Sobrien chain->need_reload = 0; 147390075Sobrien chain->need_operand_change = 0; 147490075Sobrien 147552284Sobrien /* If this is a label, a JUMP_INSN, or has REG_NOTES (which might 147652284Sobrien include REG_LABEL), we need to see what effects this has on the 147752284Sobrien known offsets at labels. */ 147818334Speter 1479169689Skan if (LABEL_P (insn) || JUMP_P (insn) 148090075Sobrien || (INSN_P (insn) && REG_NOTES (insn) != 0)) 148152284Sobrien set_label_offsets (insn, insn, 0); 148218334Speter 148390075Sobrien if (INSN_P (insn)) 148452284Sobrien { 148552284Sobrien rtx old_body = PATTERN (insn); 148652284Sobrien int old_code = INSN_CODE (insn); 148752284Sobrien rtx old_notes = REG_NOTES (insn); 148852284Sobrien int did_elimination = 0; 148952284Sobrien int operands_changed = 0; 149052284Sobrien rtx set = single_set (insn); 149118334Speter 149252284Sobrien /* Skip insns that only set an equivalence. */ 1493169689Skan if (set && REG_P (SET_DEST (set)) 149452284Sobrien && reg_renumber[REGNO (SET_DEST (set))] < 0 1495169689Skan && (reg_equiv_constant[REGNO (SET_DEST (set))] 1496169689Skan || (reg_equiv_invariant[REGNO (SET_DEST (set))])) 1497169689Skan && reg_equiv_init[REGNO (SET_DEST (set))]) 149890075Sobrien continue; 149918334Speter 150052284Sobrien /* If needed, eliminate any eliminable registers. */ 150152284Sobrien if (num_eliminable || num_eliminable_invariants) 150252284Sobrien did_elimination = eliminate_regs_in_insn (insn, 0); 150318334Speter 150452284Sobrien /* Analyze the instruction. */ 150552284Sobrien operands_changed = find_reloads (insn, 0, spill_indirect_levels, 150652284Sobrien global, spill_reg_order); 150718334Speter 150852284Sobrien /* If a no-op set needs more than one reload, this is likely 150952284Sobrien to be something that needs input address reloads. We 151052284Sobrien can't get rid of this cleanly later, and it is of no use 151152284Sobrien anyway, so discard it now. 151252284Sobrien We only do this when expensive_optimizations is enabled, 151352284Sobrien since this complements reload inheritance / output 151452284Sobrien reload deletion, and it can make debugging harder. */ 151552284Sobrien if (flag_expensive_optimizations && n_reloads > 1) 151652284Sobrien { 151752284Sobrien rtx set = single_set (insn); 151852284Sobrien if (set 151952284Sobrien && SET_SRC (set) == SET_DEST (set) 1520169689Skan && REG_P (SET_SRC (set)) 152152284Sobrien && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) 152218334Speter { 152390075Sobrien delete_insn (insn); 1524117395Skan /* Delete it from the reload chain. */ 152590075Sobrien if (chain->prev) 152690075Sobrien chain->prev->next = next; 152790075Sobrien else 152890075Sobrien reload_insn_chain = next; 152990075Sobrien if (next) 153090075Sobrien next->prev = chain->prev; 153190075Sobrien chain->next = unused_insn_chains; 153290075Sobrien unused_insn_chains = chain; 153352284Sobrien continue; 153418334Speter } 153518334Speter } 153652284Sobrien if (num_eliminable) 153752284Sobrien update_eliminable_offsets (); 153818334Speter 153952284Sobrien /* Remember for later shortcuts which insns had any reloads or 154052284Sobrien register eliminations. */ 154152284Sobrien chain->need_elim = did_elimination; 154252284Sobrien chain->need_reload = n_reloads > 0; 154352284Sobrien chain->need_operand_change = operands_changed; 154418334Speter 154552284Sobrien /* Discard any register replacements done. */ 154652284Sobrien if (did_elimination) 154752284Sobrien { 154890075Sobrien obstack_free (&reload_obstack, reload_insn_firstobj); 154952284Sobrien PATTERN (insn) = old_body; 155052284Sobrien INSN_CODE (insn) = old_code; 155152284Sobrien REG_NOTES (insn) = old_notes; 155252284Sobrien something_needs_elimination = 1; 155352284Sobrien } 155418334Speter 155552284Sobrien something_needs_operands_changed |= operands_changed; 155618334Speter 155752284Sobrien if (n_reloads != 0) 155850397Sobrien { 155990075Sobrien copy_reloads (chain); 156052284Sobrien *pprev_reload = chain; 156152284Sobrien pprev_reload = &chain->next_need_reload; 156250397Sobrien } 156318334Speter } 156452284Sobrien } 156552284Sobrien *pprev_reload = 0; 156652284Sobrien} 156790075Sobrien 156890075Sobrien/* Comparison function for qsort to decide which of two reloads 156990075Sobrien should be handled first. *P1 and *P2 are the reload numbers. */ 157018334Speter 157190075Sobrienstatic int 1572132718Skanreload_reg_class_lower (const void *r1p, const void *r2p) 157390075Sobrien{ 157490075Sobrien int r1 = *(const short *) r1p, r2 = *(const short *) r2p; 157590075Sobrien int t; 157618334Speter 157790075Sobrien /* Consider required reloads before optional ones. */ 157890075Sobrien t = rld[r1].optional - rld[r2].optional; 157990075Sobrien if (t != 0) 158090075Sobrien return t; 158118334Speter 158290075Sobrien /* Count all solitary classes before non-solitary ones. */ 158390075Sobrien t = ((reg_class_size[(int) rld[r2].class] == 1) 158490075Sobrien - (reg_class_size[(int) rld[r1].class] == 1)); 158590075Sobrien if (t != 0) 158690075Sobrien return t; 158718334Speter 158890075Sobrien /* Aside from solitaires, consider all multi-reg groups first. */ 158990075Sobrien t = rld[r2].nregs - rld[r1].nregs; 159090075Sobrien if (t != 0) 159190075Sobrien return t; 159218334Speter 159390075Sobrien /* Consider reloads in order of increasing reg-class number. */ 159490075Sobrien t = (int) rld[r1].class - (int) rld[r2].class; 159590075Sobrien if (t != 0) 159690075Sobrien return t; 159718334Speter 159890075Sobrien /* If reloads are equally urgent, sort by reload number, 159990075Sobrien so that the results of qsort leave nothing to chance. */ 160090075Sobrien return r1 - r2; 160190075Sobrien} 160290075Sobrien 160390075Sobrien/* The cost of spilling each hard reg. */ 160490075Sobrienstatic int spill_cost[FIRST_PSEUDO_REGISTER]; 160518334Speter 160690075Sobrien/* When spilling multiple hard registers, we use SPILL_COST for the first 160790075Sobrien spilled hard reg and SPILL_ADD_COST for subsequent regs. SPILL_ADD_COST 160890075Sobrien only the first hard reg for a multi-reg pseudo. */ 160990075Sobrienstatic int spill_add_cost[FIRST_PSEUDO_REGISTER]; 161018334Speter 161190075Sobrien/* Update the spill cost arrays, considering that pseudo REG is live. */ 161218334Speter 161390075Sobrienstatic void 1614132718Skancount_pseudo (int reg) 161590075Sobrien{ 161690075Sobrien int freq = REG_FREQ (reg); 161790075Sobrien int r = reg_renumber[reg]; 161890075Sobrien int nregs; 161918334Speter 162090075Sobrien if (REGNO_REG_SET_P (&pseudos_counted, reg) 162190075Sobrien || REGNO_REG_SET_P (&spilled_pseudos, reg)) 162290075Sobrien return; 162352284Sobrien 162490075Sobrien SET_REGNO_REG_SET (&pseudos_counted, reg); 162552284Sobrien 1626169689Skan gcc_assert (r >= 0); 162718334Speter 162890075Sobrien spill_add_cost[r] += freq; 162918334Speter 1630169689Skan nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (reg)]; 163190075Sobrien while (nregs-- > 0) 163290075Sobrien spill_cost[r + nregs] += freq; 163390075Sobrien} 163418334Speter 163590075Sobrien/* Calculate the SPILL_COST and SPILL_ADD_COST arrays and determine the 163690075Sobrien contents of BAD_SPILL_REGS for the insn described by CHAIN. */ 163718334Speter 163890075Sobrienstatic void 1639132718Skanorder_regs_for_reload (struct insn_chain *chain) 164090075Sobrien{ 1641169689Skan unsigned i; 164290075Sobrien HARD_REG_SET used_by_pseudos; 164390075Sobrien HARD_REG_SET used_by_pseudos2; 1644169689Skan reg_set_iterator rsi; 164518334Speter 164690075Sobrien COPY_HARD_REG_SET (bad_spill_regs, fixed_reg_set); 164718334Speter 164890075Sobrien memset (spill_cost, 0, sizeof spill_cost); 164990075Sobrien memset (spill_add_cost, 0, sizeof spill_add_cost); 165018334Speter 165190075Sobrien /* Count number of uses of each hard reg by pseudo regs allocated to it 165290075Sobrien and then order them by decreasing use. First exclude hard registers 165390075Sobrien that are live in or across this insn. */ 165452284Sobrien 165590075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout); 165690075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set); 165790075Sobrien IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos); 165890075Sobrien IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos2); 165952284Sobrien 166090075Sobrien /* Now find out which pseudos are allocated to it, and update 166190075Sobrien hard_reg_n_uses. */ 166290075Sobrien CLEAR_REG_SET (&pseudos_counted); 166318334Speter 166490075Sobrien EXECUTE_IF_SET_IN_REG_SET 1665169689Skan (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi) 1666169689Skan { 1667169689Skan count_pseudo (i); 1668169689Skan } 166990075Sobrien EXECUTE_IF_SET_IN_REG_SET 1670169689Skan (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi) 1671169689Skan { 1672169689Skan count_pseudo (i); 1673169689Skan } 167490075Sobrien CLEAR_REG_SET (&pseudos_counted); 167590075Sobrien} 167690075Sobrien 167790075Sobrien/* Vector of reload-numbers showing the order in which the reloads should 167890075Sobrien be processed. */ 167990075Sobrienstatic short reload_order[MAX_RELOADS]; 168018334Speter 168190075Sobrien/* This is used to keep track of the spill regs used in one insn. */ 168290075Sobrienstatic HARD_REG_SET used_spill_regs_local; 168318334Speter 168490075Sobrien/* We decided to spill hard register SPILLED, which has a size of 168590075Sobrien SPILLED_NREGS. Determine how pseudo REG, which is live during the insn, 168690075Sobrien is affected. We will add it to SPILLED_PSEUDOS if necessary, and we will 168790075Sobrien update SPILL_COST/SPILL_ADD_COST. */ 168818334Speter 168990075Sobrienstatic void 1690132718Skancount_spilled_pseudo (int spilled, int spilled_nregs, int reg) 169190075Sobrien{ 169290075Sobrien int r = reg_renumber[reg]; 1693169689Skan int nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (reg)]; 169418334Speter 169590075Sobrien if (REGNO_REG_SET_P (&spilled_pseudos, reg) 169690075Sobrien || spilled + spilled_nregs <= r || r + nregs <= spilled) 169790075Sobrien return; 169818334Speter 169990075Sobrien SET_REGNO_REG_SET (&spilled_pseudos, reg); 170018334Speter 170190075Sobrien spill_add_cost[r] -= REG_FREQ (reg); 170290075Sobrien while (nregs-- > 0) 170390075Sobrien spill_cost[r + nregs] -= REG_FREQ (reg); 170490075Sobrien} 170518334Speter 170690075Sobrien/* Find reload register to use for reload number ORDER. */ 170718334Speter 170890075Sobrienstatic int 1709132718Skanfind_reg (struct insn_chain *chain, int order) 171090075Sobrien{ 171190075Sobrien int rnum = reload_order[order]; 171290075Sobrien struct reload *rl = rld + rnum; 171390075Sobrien int best_cost = INT_MAX; 171490075Sobrien int best_reg = -1; 171590075Sobrien unsigned int i, j; 171690075Sobrien int k; 171790075Sobrien HARD_REG_SET not_usable; 171890075Sobrien HARD_REG_SET used_by_other_reload; 1719169689Skan reg_set_iterator rsi; 172018334Speter 172190075Sobrien COPY_HARD_REG_SET (not_usable, bad_spill_regs); 172290075Sobrien IOR_HARD_REG_SET (not_usable, bad_spill_regs_global); 172390075Sobrien IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->class]); 172418334Speter 172590075Sobrien CLEAR_HARD_REG_SET (used_by_other_reload); 172690075Sobrien for (k = 0; k < order; k++) 172790075Sobrien { 172890075Sobrien int other = reload_order[k]; 172918334Speter 173090075Sobrien if (rld[other].regno >= 0 && reloads_conflict (other, rnum)) 173190075Sobrien for (j = 0; j < rld[other].nregs; j++) 173290075Sobrien SET_HARD_REG_BIT (used_by_other_reload, rld[other].regno + j); 173390075Sobrien } 173418334Speter 173552284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 173652284Sobrien { 173790075Sobrien unsigned int regno = i; 173818334Speter 173990075Sobrien if (! TEST_HARD_REG_BIT (not_usable, regno) 174090075Sobrien && ! TEST_HARD_REG_BIT (used_by_other_reload, regno) 174190075Sobrien && HARD_REGNO_MODE_OK (regno, rl->mode)) 174252284Sobrien { 174390075Sobrien int this_cost = spill_cost[regno]; 174490075Sobrien int ok = 1; 1745169689Skan unsigned int this_nregs = hard_regno_nregs[regno][rl->mode]; 174618334Speter 174790075Sobrien for (j = 1; j < this_nregs; j++) 174818334Speter { 174990075Sobrien this_cost += spill_add_cost[regno + j]; 175090075Sobrien if ((TEST_HARD_REG_BIT (not_usable, regno + j)) 175190075Sobrien || TEST_HARD_REG_BIT (used_by_other_reload, regno + j)) 175290075Sobrien ok = 0; 175352284Sobrien } 175490075Sobrien if (! ok) 175590075Sobrien continue; 1756169689Skan if (rl->in && REG_P (rl->in) && REGNO (rl->in) == regno) 175790075Sobrien this_cost--; 1758169689Skan if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno) 175990075Sobrien this_cost--; 176090075Sobrien if (this_cost < best_cost 176190075Sobrien /* Among registers with equal cost, prefer caller-saved ones, or 176290075Sobrien use REG_ALLOC_ORDER if it is defined. */ 176390075Sobrien || (this_cost == best_cost 176490075Sobrien#ifdef REG_ALLOC_ORDER 176590075Sobrien && (inv_reg_alloc_order[regno] 176690075Sobrien < inv_reg_alloc_order[best_reg]) 176790075Sobrien#else 176890075Sobrien && call_used_regs[regno] 176990075Sobrien && ! call_used_regs[best_reg] 177090075Sobrien#endif 177190075Sobrien )) 177290075Sobrien { 177390075Sobrien best_reg = regno; 177490075Sobrien best_cost = this_cost; 177590075Sobrien } 177652284Sobrien } 177752284Sobrien } 177890075Sobrien if (best_reg == -1) 177990075Sobrien return 0; 178018334Speter 1781169689Skan if (dump_file) 1782169689Skan fprintf (dump_file, "Using reg %d for reload %d\n", best_reg, rnum); 178318334Speter 1784169689Skan rl->nregs = hard_regno_nregs[best_reg][rl->mode]; 178590075Sobrien rl->regno = best_reg; 178618334Speter 178790075Sobrien EXECUTE_IF_SET_IN_REG_SET 1788169689Skan (&chain->live_throughout, FIRST_PSEUDO_REGISTER, j, rsi) 1789169689Skan { 1790169689Skan count_spilled_pseudo (best_reg, rl->nregs, j); 1791169689Skan } 179218334Speter 179390075Sobrien EXECUTE_IF_SET_IN_REG_SET 1794169689Skan (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, j, rsi) 1795169689Skan { 1796169689Skan count_spilled_pseudo (best_reg, rl->nregs, j); 1797169689Skan } 179818334Speter 179990075Sobrien for (i = 0; i < rl->nregs; i++) 180052284Sobrien { 1801169689Skan gcc_assert (spill_cost[best_reg + i] == 0); 1802169689Skan gcc_assert (spill_add_cost[best_reg + i] == 0); 180390075Sobrien SET_HARD_REG_BIT (used_spill_regs_local, best_reg + i); 180418334Speter } 180590075Sobrien return 1; 180652284Sobrien} 180718334Speter 180852284Sobrien/* Find more reload regs to satisfy the remaining need of an insn, which 180952284Sobrien is given by CHAIN. 181052284Sobrien Do it by ascending class number, since otherwise a reg 181152284Sobrien might be spilled for a big class and might fail to count 181290075Sobrien for a smaller class even though it belongs to that class. */ 181318334Speter 181452284Sobrienstatic void 1815132718Skanfind_reload_regs (struct insn_chain *chain) 181652284Sobrien{ 181790075Sobrien int i; 181818334Speter 181990075Sobrien /* In order to be certain of getting the registers we need, 182090075Sobrien we must sort the reloads into order of increasing register class. 182190075Sobrien Then our grabbing of reload registers will parallel the process 182290075Sobrien that provided the reload registers. */ 182390075Sobrien for (i = 0; i < chain->n_reloads; i++) 182418334Speter { 182590075Sobrien /* Show whether this reload already has a hard reg. */ 182690075Sobrien if (chain->rld[i].reg_rtx) 182752284Sobrien { 182890075Sobrien int regno = REGNO (chain->rld[i].reg_rtx); 182990075Sobrien chain->rld[i].regno = regno; 183090075Sobrien chain->rld[i].nregs 1831169689Skan = hard_regno_nregs[regno][GET_MODE (chain->rld[i].reg_rtx)]; 183218334Speter } 183390075Sobrien else 183490075Sobrien chain->rld[i].regno = -1; 183590075Sobrien reload_order[i] = i; 183690075Sobrien } 183750397Sobrien 183890075Sobrien n_reloads = chain->n_reloads; 183990075Sobrien memcpy (rld, chain->rld, n_reloads * sizeof (struct reload)); 184050397Sobrien 184190075Sobrien CLEAR_HARD_REG_SET (used_spill_regs_local); 184250397Sobrien 1843169689Skan if (dump_file) 1844169689Skan fprintf (dump_file, "Spilling for insn %d.\n", INSN_UID (chain->insn)); 184552284Sobrien 184690075Sobrien qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower); 184752284Sobrien 184890075Sobrien /* Compute the order of preference for hard registers to spill. */ 184952284Sobrien 185090075Sobrien order_regs_for_reload (chain); 185152284Sobrien 185290075Sobrien for (i = 0; i < n_reloads; i++) 185390075Sobrien { 185490075Sobrien int r = reload_order[i]; 185552284Sobrien 185690075Sobrien /* Ignore reloads that got marked inoperative. */ 185790075Sobrien if ((rld[r].out != 0 || rld[r].in != 0 || rld[r].secondary_p) 185890075Sobrien && ! rld[r].optional 185990075Sobrien && rld[r].regno == -1) 186090075Sobrien if (! find_reg (chain, i)) 186190075Sobrien { 1862169689Skan if (dump_file) 1863169689Skan fprintf(dump_file, "reload failure for reload %d\n", r); 186490075Sobrien spill_failure (chain->insn, rld[r].class); 186590075Sobrien failure = 1; 186652284Sobrien return; 186790075Sobrien } 186818334Speter } 186918334Speter 187090075Sobrien COPY_HARD_REG_SET (chain->used_spill_regs, used_spill_regs_local); 187190075Sobrien IOR_HARD_REG_SET (used_spill_regs, used_spill_regs_local); 187290075Sobrien 187390075Sobrien memcpy (chain->rld, rld, n_reloads * sizeof (struct reload)); 187452284Sobrien} 187518334Speter 187690075Sobrienstatic void 1877132718Skanselect_reload_regs (void) 187852284Sobrien{ 187990075Sobrien struct insn_chain *chain; 188018334Speter 188190075Sobrien /* Try to satisfy the needs for each insn. */ 188290075Sobrien for (chain = insns_need_reload; chain != 0; 188390075Sobrien chain = chain->next_need_reload) 188490075Sobrien find_reload_regs (chain); 188552284Sobrien} 188652284Sobrien 188752284Sobrien/* Delete all insns that were inserted by emit_caller_save_insns during 188852284Sobrien this iteration. */ 188952284Sobrienstatic void 1890132718Skandelete_caller_save_insns (void) 189152284Sobrien{ 189252284Sobrien struct insn_chain *c = reload_insn_chain; 189318334Speter 189452284Sobrien while (c != 0) 189552284Sobrien { 189652284Sobrien while (c != 0 && c->is_caller_save_insn) 189752284Sobrien { 189852284Sobrien struct insn_chain *next = c->next; 189952284Sobrien rtx insn = c->insn; 190050397Sobrien 190152284Sobrien if (c == reload_insn_chain) 190252284Sobrien reload_insn_chain = next; 190390075Sobrien delete_insn (insn); 190418334Speter 190552284Sobrien if (next) 190652284Sobrien next->prev = c->prev; 190752284Sobrien if (c->prev) 190852284Sobrien c->prev->next = next; 190952284Sobrien c->next = unused_insn_chains; 191052284Sobrien unused_insn_chains = c; 191152284Sobrien c = next; 191252284Sobrien } 191352284Sobrien if (c != 0) 191452284Sobrien c = c->next; 191552284Sobrien } 191618334Speter} 191718334Speter 191818334Speter/* Handle the failure to find a register to spill. 191918334Speter INSN should be one of the insns which needed this particular spill reg. */ 192018334Speter 192118334Speterstatic void 1922132718Skanspill_failure (rtx insn, enum reg_class class) 192318334Speter{ 192418334Speter if (asm_noperands (PATTERN (insn)) >= 0) 1925169689Skan error_for_asm (insn, "can't find a register in class %qs while " 1926169689Skan "reloading %<asm%>", 192790075Sobrien reg_class_names[class]); 192818334Speter else 192952284Sobrien { 1930169689Skan error ("unable to find a register to spill in class %qs", 193190075Sobrien reg_class_names[class]); 1932169689Skan 1933169689Skan if (dump_file) 1934169689Skan { 1935169689Skan fprintf (dump_file, "\nReloads for insn # %d\n", INSN_UID (insn)); 1936169689Skan debug_reload_to_stream (dump_file); 1937169689Skan } 193890075Sobrien fatal_insn ("this is the insn:", insn); 193952284Sobrien } 194018334Speter} 194118334Speter 194218334Speter/* Delete an unneeded INSN and any previous insns who sole purpose is loading 194318334Speter data that is dead in INSN. */ 194418334Speter 194518334Speterstatic void 1946132718Skandelete_dead_insn (rtx insn) 194718334Speter{ 194818334Speter rtx prev = prev_real_insn (insn); 194918334Speter rtx prev_dest; 195018334Speter 195118334Speter /* If the previous insn sets a register that dies in our insn, delete it 195218334Speter too. */ 195318334Speter if (prev && GET_CODE (PATTERN (prev)) == SET 1954169689Skan && (prev_dest = SET_DEST (PATTERN (prev)), REG_P (prev_dest)) 195518334Speter && reg_mentioned_p (prev_dest, PATTERN (insn)) 195650397Sobrien && find_regno_note (insn, REG_DEAD, REGNO (prev_dest)) 195750397Sobrien && ! side_effects_p (SET_SRC (PATTERN (prev)))) 195818334Speter delete_dead_insn (prev); 195918334Speter 1960169689Skan SET_INSN_DELETED (insn); 196118334Speter} 196218334Speter 196318334Speter/* Modify the home of pseudo-reg I. 196418334Speter The new home is present in reg_renumber[I]. 196518334Speter 196618334Speter FROM_REG may be the hard reg that the pseudo-reg is being spilled from; 196718334Speter or it may be -1, meaning there is none or it is not relevant. 196818334Speter This is used so that all pseudos spilled from a given hard reg 196918334Speter can share one stack slot. */ 197018334Speter 197118334Speterstatic void 1972132718Skanalter_reg (int i, int from_reg) 197318334Speter{ 197418334Speter /* When outputting an inline function, this can happen 197518334Speter for a reg that isn't actually used. */ 197618334Speter if (regno_reg_rtx[i] == 0) 197718334Speter return; 197818334Speter 197918334Speter /* If the reg got changed to a MEM at rtl-generation time, 198018334Speter ignore it. */ 1981169689Skan if (!REG_P (regno_reg_rtx[i])) 198218334Speter return; 198318334Speter 198418334Speter /* Modify the reg-rtx to contain the new hard reg 198518334Speter number or else to contain its pseudo reg number. */ 198618334Speter REGNO (regno_reg_rtx[i]) 198718334Speter = reg_renumber[i] >= 0 ? reg_renumber[i] : i; 198818334Speter 198918334Speter /* If we have a pseudo that is needed but has no hard reg or equivalent, 199018334Speter allocate a stack slot for it. */ 199118334Speter 199218334Speter if (reg_renumber[i] < 0 199350397Sobrien && REG_N_REFS (i) > 0 199418334Speter && reg_equiv_constant[i] == 0 1995169689Skan && (reg_equiv_invariant[i] == 0 || reg_equiv_init[i] == 0) 199618334Speter && reg_equiv_memory_loc[i] == 0) 199718334Speter { 199890075Sobrien rtx x; 1999169689Skan enum machine_mode mode = GET_MODE (regno_reg_rtx[i]); 200090075Sobrien unsigned int inherent_size = PSEUDO_REGNO_BYTES (i); 2001169689Skan unsigned int inherent_align = GET_MODE_ALIGNMENT (mode); 200290075Sobrien unsigned int total_size = MAX (inherent_size, reg_max_ref_width[i]); 2003169689Skan unsigned int min_align = reg_max_ref_width[i] * BITS_PER_UNIT; 200418334Speter int adjust = 0; 200518334Speter 200618334Speter /* Each pseudo reg has an inherent size which comes from its own mode, 200718334Speter and a total size which provides room for paradoxical subregs 200818334Speter which refer to the pseudo reg in wider modes. 200918334Speter 201018334Speter We can use a slot already allocated if it provides both 201118334Speter enough inherent space and enough total space. 201218334Speter Otherwise, we allocate a new slot, making sure that it has no less 201318334Speter inherent space, and no less total space, then the previous slot. */ 201418334Speter if (from_reg == -1) 201518334Speter { 201618334Speter /* No known place to spill from => no slot to reuse. */ 2017169689Skan x = assign_stack_local (mode, total_size, 2018169689Skan min_align > inherent_align 2019169689Skan || total_size > inherent_size ? -1 : 0); 202018334Speter if (BYTES_BIG_ENDIAN) 202118334Speter /* Cancel the big-endian correction done in assign_stack_local. 202218334Speter Get the address of the beginning of the slot. 202318334Speter This is so we can do a big-endian correction unconditionally 202418334Speter below. */ 202518334Speter adjust = inherent_size - total_size; 202618334Speter 202790075Sobrien /* Nothing can alias this slot except this pseudo. */ 202890075Sobrien set_mem_alias_set (x, new_alias_set ()); 202918334Speter } 203090075Sobrien 203118334Speter /* Reuse a stack slot if possible. */ 203218334Speter else if (spill_stack_slot[from_reg] != 0 203318334Speter && spill_stack_slot_width[from_reg] >= total_size 203418334Speter && (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg])) 2035169689Skan >= inherent_size) 2036169689Skan && MEM_ALIGN (spill_stack_slot[from_reg]) >= min_align) 203718334Speter x = spill_stack_slot[from_reg]; 203890075Sobrien 203918334Speter /* Allocate a bigger slot. */ 204018334Speter else 204118334Speter { 204218334Speter /* Compute maximum size needed, both for inherent size 204318334Speter and for total size. */ 204418334Speter rtx stack_slot; 204590075Sobrien 204618334Speter if (spill_stack_slot[from_reg]) 204718334Speter { 204818334Speter if (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg])) 204918334Speter > inherent_size) 205018334Speter mode = GET_MODE (spill_stack_slot[from_reg]); 205118334Speter if (spill_stack_slot_width[from_reg] > total_size) 205218334Speter total_size = spill_stack_slot_width[from_reg]; 2053169689Skan if (MEM_ALIGN (spill_stack_slot[from_reg]) > min_align) 2054169689Skan min_align = MEM_ALIGN (spill_stack_slot[from_reg]); 205518334Speter } 205690075Sobrien 205718334Speter /* Make a slot with that size. */ 205850397Sobrien x = assign_stack_local (mode, total_size, 2059169689Skan min_align > inherent_align 2060169689Skan || total_size > inherent_size ? -1 : 0); 206118334Speter stack_slot = x; 206290075Sobrien 206390075Sobrien /* All pseudos mapped to this slot can alias each other. */ 206490075Sobrien if (spill_stack_slot[from_reg]) 206590075Sobrien set_mem_alias_set (x, MEM_ALIAS_SET (spill_stack_slot[from_reg])); 206690075Sobrien else 206790075Sobrien set_mem_alias_set (x, new_alias_set ()); 206890075Sobrien 206918334Speter if (BYTES_BIG_ENDIAN) 207018334Speter { 207118334Speter /* Cancel the big-endian correction done in assign_stack_local. 207218334Speter Get the address of the beginning of the slot. 207318334Speter This is so we can do a big-endian correction unconditionally 207418334Speter below. */ 207518334Speter adjust = GET_MODE_SIZE (mode) - total_size; 207618334Speter if (adjust) 207790075Sobrien stack_slot 207890075Sobrien = adjust_address_nv (x, mode_for_size (total_size 207950397Sobrien * BITS_PER_UNIT, 208050397Sobrien MODE_INT, 1), 208190075Sobrien adjust); 208218334Speter } 208390075Sobrien 208418334Speter spill_stack_slot[from_reg] = stack_slot; 208518334Speter spill_stack_slot_width[from_reg] = total_size; 208618334Speter } 208718334Speter 208818334Speter /* On a big endian machine, the "address" of the slot 208918334Speter is the address of the low part that fits its inherent mode. */ 209018334Speter if (BYTES_BIG_ENDIAN && inherent_size < total_size) 209118334Speter adjust += (total_size - inherent_size); 209218334Speter 209318334Speter /* If we have any adjustment to make, or if the stack slot is the 209418334Speter wrong mode, make a new stack slot. */ 209590075Sobrien x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust); 209690075Sobrien 209790075Sobrien /* If we have a decl for the original register, set it for the 209890075Sobrien memory. If this is a shared MEM, make a copy. */ 2099132718Skan if (REG_EXPR (regno_reg_rtx[i]) 2100169689Skan && DECL_P (REG_EXPR (regno_reg_rtx[i]))) 210118334Speter { 2102132718Skan rtx decl = DECL_RTL_IF_SET (REG_EXPR (regno_reg_rtx[i])); 210350397Sobrien 210496263Sobrien /* We can do this only for the DECLs home pseudo, not for 210596263Sobrien any copies of it, since otherwise when the stack slot 210696263Sobrien is reused, nonoverlapping_memrefs_p might think they 210796263Sobrien cannot overlap. */ 2108169689Skan if (decl && REG_P (decl) && REGNO (decl) == (unsigned) i) 210996263Sobrien { 211096263Sobrien if (from_reg != -1 && spill_stack_slot[from_reg] == x) 211196263Sobrien x = copy_rtx (x); 211296263Sobrien 2113132718Skan set_mem_attrs_from_reg (x, regno_reg_rtx[i]); 211496263Sobrien } 211518334Speter } 211618334Speter 211790075Sobrien /* Save the stack slot for later. */ 211818334Speter reg_equiv_memory_loc[i] = x; 211918334Speter } 212018334Speter} 212118334Speter 212218334Speter/* Mark the slots in regs_ever_live for the hard regs 212318334Speter used by pseudo-reg number REGNO. */ 212418334Speter 212518334Spetervoid 2126132718Skanmark_home_live (int regno) 212718334Speter{ 212890075Sobrien int i, lim; 212990075Sobrien 213018334Speter i = reg_renumber[regno]; 213118334Speter if (i < 0) 213218334Speter return; 2133169689Skan lim = i + hard_regno_nregs[i][PSEUDO_REGNO_MODE (regno)]; 213418334Speter while (i < lim) 213518334Speter regs_ever_live[i++] = 1; 213618334Speter} 213718334Speter 213818334Speter/* This function handles the tracking of elimination offsets around branches. 213918334Speter 214018334Speter X is a piece of RTL being scanned. 214118334Speter 214218334Speter INSN is the insn that it came from, if any. 214318334Speter 2144117395Skan INITIAL_P is nonzero if we are to set the offset to be the initial 214518334Speter offset and zero if we are setting the offset of the label to be the 214618334Speter current offset. */ 214718334Speter 214818334Speterstatic void 2149132718Skanset_label_offsets (rtx x, rtx insn, int initial_p) 215018334Speter{ 215118334Speter enum rtx_code code = GET_CODE (x); 215218334Speter rtx tem; 215352284Sobrien unsigned int i; 215418334Speter struct elim_table *p; 215518334Speter 215618334Speter switch (code) 215718334Speter { 215818334Speter case LABEL_REF: 215918334Speter if (LABEL_REF_NONLOCAL_P (x)) 216018334Speter return; 216118334Speter 216218334Speter x = XEXP (x, 0); 216318334Speter 216450397Sobrien /* ... fall through ... */ 216518334Speter 216618334Speter case CODE_LABEL: 216718334Speter /* If we know nothing about this label, set the desired offsets. Note 216818334Speter that this sets the offset at a label to be the offset before a label 216918334Speter if we don't know anything about the label. This is not correct for 217018334Speter the label after a BARRIER, but is the best guess we can make. If 217118334Speter we guessed wrong, we will suppress an elimination that might have 217218334Speter been possible had we been able to guess correctly. */ 217318334Speter 2174117395Skan if (! offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num]) 217518334Speter { 217618334Speter for (i = 0; i < NUM_ELIMINABLE_REGS; i++) 2177117395Skan offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i] 217818334Speter = (initial_p ? reg_eliminate[i].initial_offset 217918334Speter : reg_eliminate[i].offset); 2180117395Skan offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num] = 1; 218118334Speter } 218218334Speter 218318334Speter /* Otherwise, if this is the definition of a label and it is 218418334Speter preceded by a BARRIER, set our offsets to the known offset of 218518334Speter that label. */ 218618334Speter 218718334Speter else if (x == insn 218818334Speter && (tem = prev_nonnote_insn (insn)) != 0 2189169689Skan && BARRIER_P (tem)) 219052284Sobrien set_offsets_for_label (insn); 219118334Speter else 219218334Speter /* If neither of the above cases is true, compare each offset 219318334Speter with those previously recorded and suppress any eliminations 219418334Speter where the offsets disagree. */ 219518334Speter 219618334Speter for (i = 0; i < NUM_ELIMINABLE_REGS; i++) 2197117395Skan if (offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i] 219818334Speter != (initial_p ? reg_eliminate[i].initial_offset 219918334Speter : reg_eliminate[i].offset)) 220018334Speter reg_eliminate[i].can_eliminate = 0; 220118334Speter 220218334Speter return; 220318334Speter 220418334Speter case JUMP_INSN: 220518334Speter set_label_offsets (PATTERN (insn), insn, initial_p); 220618334Speter 220750397Sobrien /* ... fall through ... */ 220818334Speter 220918334Speter case INSN: 221018334Speter case CALL_INSN: 221118334Speter /* Any labels mentioned in REG_LABEL notes can be branched to indirectly 221218334Speter and hence must have all eliminations at their initial offsets. */ 221318334Speter for (tem = REG_NOTES (x); tem; tem = XEXP (tem, 1)) 221418334Speter if (REG_NOTE_KIND (tem) == REG_LABEL) 221518334Speter set_label_offsets (XEXP (tem, 0), insn, 1); 221618334Speter return; 221718334Speter 221890075Sobrien case PARALLEL: 221918334Speter case ADDR_VEC: 222018334Speter case ADDR_DIFF_VEC: 222190075Sobrien /* Each of the labels in the parallel or address vector must be 222290075Sobrien at their initial offsets. We want the first field for PARALLEL 222390075Sobrien and ADDR_VEC and the second field for ADDR_DIFF_VEC. */ 222418334Speter 222552284Sobrien for (i = 0; i < (unsigned) XVECLEN (x, code == ADDR_DIFF_VEC); i++) 222618334Speter set_label_offsets (XVECEXP (x, code == ADDR_DIFF_VEC, i), 222718334Speter insn, initial_p); 222818334Speter return; 222918334Speter 223018334Speter case SET: 223118334Speter /* We only care about setting PC. If the source is not RETURN, 223218334Speter IF_THEN_ELSE, or a label, disable any eliminations not at 223318334Speter their initial offsets. Similarly if any arm of the IF_THEN_ELSE 223418334Speter isn't one of those possibilities. For branches to a label, 223518334Speter call ourselves recursively. 223618334Speter 223718334Speter Note that this can disable elimination unnecessarily when we have 223818334Speter a non-local goto since it will look like a non-constant jump to 223918334Speter someplace in the current function. This isn't a significant 224018334Speter problem since such jumps will normally be when all elimination 224118334Speter pairs are back to their initial offsets. */ 224218334Speter 224318334Speter if (SET_DEST (x) != pc_rtx) 224418334Speter return; 224518334Speter 224618334Speter switch (GET_CODE (SET_SRC (x))) 224718334Speter { 224818334Speter case PC: 224918334Speter case RETURN: 225018334Speter return; 225118334Speter 225218334Speter case LABEL_REF: 2253169689Skan set_label_offsets (SET_SRC (x), insn, initial_p); 225418334Speter return; 225518334Speter 225618334Speter case IF_THEN_ELSE: 225718334Speter tem = XEXP (SET_SRC (x), 1); 225818334Speter if (GET_CODE (tem) == LABEL_REF) 225918334Speter set_label_offsets (XEXP (tem, 0), insn, initial_p); 226018334Speter else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN) 226118334Speter break; 226218334Speter 226318334Speter tem = XEXP (SET_SRC (x), 2); 226418334Speter if (GET_CODE (tem) == LABEL_REF) 226518334Speter set_label_offsets (XEXP (tem, 0), insn, initial_p); 226618334Speter else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN) 226718334Speter break; 226818334Speter return; 226950397Sobrien 227050397Sobrien default: 227150397Sobrien break; 227218334Speter } 227318334Speter 227418334Speter /* If we reach here, all eliminations must be at their initial 227518334Speter offset because we are doing a jump to a variable address. */ 227618334Speter for (p = reg_eliminate; p < ®_eliminate[NUM_ELIMINABLE_REGS]; p++) 227718334Speter if (p->offset != p->initial_offset) 227818334Speter p->can_eliminate = 0; 227950397Sobrien break; 228090075Sobrien 228150397Sobrien default: 228250397Sobrien break; 228318334Speter } 228418334Speter} 228518334Speter 228618334Speter/* Scan X and replace any eliminable registers (such as fp) with a 228718334Speter replacement (such as sp), plus an offset. 228818334Speter 228918334Speter MEM_MODE is the mode of an enclosing MEM. We need this to know how 229018334Speter much to adjust a register for, e.g., PRE_DEC. Also, if we are inside a 229118334Speter MEM, we are allowed to replace a sum of a register and the constant zero 229218334Speter with the register, which we cannot do outside a MEM. In addition, we need 229318334Speter to record the fact that a register is referenced outside a MEM. 229418334Speter 229518334Speter If INSN is an insn, it is the insn containing X. If we replace a REG 2296117395Skan in a SET_DEST with an equivalent MEM and INSN is nonzero, write a 229718334Speter CLOBBER of the pseudo after INSN so find_equiv_regs will know that 229850397Sobrien the REG is being modified. 229918334Speter 230018334Speter Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST). 230118334Speter That's used when we eliminate in expressions stored in notes. 230218334Speter This means, do not set ref_outside_mem even if the reference 230318334Speter is outside of MEMs. 230418334Speter 230518334Speter REG_EQUIV_MEM and REG_EQUIV_ADDRESS contain address that have had 230618334Speter replacements done assuming all offsets are at their initial values. If 230718334Speter they are not, or if REG_EQUIV_ADDRESS is nonzero for a pseudo we 230818334Speter encounter, return the actual location so that find_reloads will do 230918334Speter the proper thing. */ 231018334Speter 2311169689Skanstatic rtx 2312169689Skaneliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn, 2313169689Skan bool may_use_invariant) 231418334Speter{ 231518334Speter enum rtx_code code = GET_CODE (x); 231618334Speter struct elim_table *ep; 231718334Speter int regno; 231818334Speter rtx new; 231918334Speter int i, j; 232090075Sobrien const char *fmt; 232118334Speter int copied = 0; 232218334Speter 232352284Sobrien if (! current_function_decl) 232452284Sobrien return x; 232552284Sobrien 232618334Speter switch (code) 232718334Speter { 232818334Speter case CONST_INT: 232918334Speter case CONST_DOUBLE: 233096263Sobrien case CONST_VECTOR: 233118334Speter case CONST: 233218334Speter case SYMBOL_REF: 233318334Speter case CODE_LABEL: 233418334Speter case PC: 233518334Speter case CC0: 233618334Speter case ASM_INPUT: 233718334Speter case ADDR_VEC: 233818334Speter case ADDR_DIFF_VEC: 233918334Speter case RETURN: 234018334Speter return x; 234118334Speter 234218334Speter case REG: 234318334Speter regno = REGNO (x); 234418334Speter 234518334Speter /* First handle the case where we encounter a bare register that 234618334Speter is eliminable. Replace it with a PLUS. */ 234718334Speter if (regno < FIRST_PSEUDO_REGISTER) 234818334Speter { 234918334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 235018334Speter ep++) 235118334Speter if (ep->from_rtx == x && ep->can_eliminate) 235290075Sobrien return plus_constant (ep->to_rtx, ep->previous_offset); 235318334Speter 235418334Speter } 235590075Sobrien else if (reg_renumber && reg_renumber[regno] < 0 2356169689Skan && reg_equiv_invariant && reg_equiv_invariant[regno]) 2357169689Skan { 2358169689Skan if (may_use_invariant) 2359169689Skan return eliminate_regs_1 (copy_rtx (reg_equiv_invariant[regno]), 2360169689Skan mem_mode, insn, true); 2361169689Skan /* There exists at least one use of REGNO that cannot be 2362169689Skan eliminated. Prevent the defining insn from being deleted. */ 2363169689Skan reg_equiv_init[regno] = NULL_RTX; 2364169689Skan alter_reg (regno, -1); 2365169689Skan } 236618334Speter return x; 236718334Speter 236890075Sobrien /* You might think handling MINUS in a manner similar to PLUS is a 236990075Sobrien good idea. It is not. It has been tried multiple times and every 237090075Sobrien time the change has had to have been reverted. 237190075Sobrien 237290075Sobrien Other parts of reload know a PLUS is special (gen_reload for example) 237390075Sobrien and require special code to handle code a reloaded PLUS operand. 237490075Sobrien 237590075Sobrien Also consider backends where the flags register is clobbered by a 2376169689Skan MINUS, but we can emit a PLUS that does not clobber flags (IA-32, 237790075Sobrien lea instruction comes to mind). If we try to reload a MINUS, we 237890075Sobrien may kill the flags register that was holding a useful value. 237990075Sobrien 238090075Sobrien So, please before trying to handle MINUS, consider reload as a 238190075Sobrien whole instead of this little section as well as the backend issues. */ 238218334Speter case PLUS: 238318334Speter /* If this is the sum of an eliminable register and a constant, rework 238490075Sobrien the sum. */ 2385169689Skan if (REG_P (XEXP (x, 0)) 238618334Speter && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER 238718334Speter && CONSTANT_P (XEXP (x, 1))) 238818334Speter { 238918334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 239018334Speter ep++) 239118334Speter if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate) 239218334Speter { 239318334Speter /* The only time we want to replace a PLUS with a REG (this 239418334Speter occurs when the constant operand of the PLUS is the negative 239518334Speter of the offset) is when we are inside a MEM. We won't want 239618334Speter to do so at other times because that would change the 239718334Speter structure of the insn in a way that reload can't handle. 239818334Speter We special-case the commonest situation in 239918334Speter eliminate_regs_in_insn, so just replace a PLUS with a 240018334Speter PLUS here, unless inside a MEM. */ 240118334Speter if (mem_mode != 0 && GET_CODE (XEXP (x, 1)) == CONST_INT 240218334Speter && INTVAL (XEXP (x, 1)) == - ep->previous_offset) 240318334Speter return ep->to_rtx; 240418334Speter else 240550397Sobrien return gen_rtx_PLUS (Pmode, ep->to_rtx, 240650397Sobrien plus_constant (XEXP (x, 1), 240750397Sobrien ep->previous_offset)); 240818334Speter } 240918334Speter 241018334Speter /* If the register is not eliminable, we are done since the other 241118334Speter operand is a constant. */ 241218334Speter return x; 241318334Speter } 241418334Speter 241518334Speter /* If this is part of an address, we want to bring any constant to the 241618334Speter outermost PLUS. We will do this by doing register replacement in 241718334Speter our operands and seeing if a constant shows up in one of them. 241818334Speter 241990075Sobrien Note that there is no risk of modifying the structure of the insn, 242090075Sobrien since we only get called for its operands, thus we are either 242190075Sobrien modifying the address inside a MEM, or something like an address 242290075Sobrien operand of a load-address insn. */ 242318334Speter 242418334Speter { 2425169689Skan rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true); 2426169689Skan rtx new1 = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true); 242718334Speter 242890075Sobrien if (reg_renumber && (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))) 242918334Speter { 243018334Speter /* If one side is a PLUS and the other side is a pseudo that 243118334Speter didn't get a hard register but has a reg_equiv_constant, 243218334Speter we must replace the constant here since it may no longer 243318334Speter be in the position of any operand. */ 2434169689Skan if (GET_CODE (new0) == PLUS && REG_P (new1) 243518334Speter && REGNO (new1) >= FIRST_PSEUDO_REGISTER 243618334Speter && reg_renumber[REGNO (new1)] < 0 243718334Speter && reg_equiv_constant != 0 243818334Speter && reg_equiv_constant[REGNO (new1)] != 0) 243918334Speter new1 = reg_equiv_constant[REGNO (new1)]; 2440169689Skan else if (GET_CODE (new1) == PLUS && REG_P (new0) 244118334Speter && REGNO (new0) >= FIRST_PSEUDO_REGISTER 244218334Speter && reg_renumber[REGNO (new0)] < 0 244318334Speter && reg_equiv_constant[REGNO (new0)] != 0) 244418334Speter new0 = reg_equiv_constant[REGNO (new0)]; 244518334Speter 244618334Speter new = form_sum (new0, new1); 244718334Speter 244818334Speter /* As above, if we are not inside a MEM we do not want to 244918334Speter turn a PLUS into something else. We might try to do so here 245018334Speter for an addition of 0 if we aren't optimizing. */ 245118334Speter if (! mem_mode && GET_CODE (new) != PLUS) 245250397Sobrien return gen_rtx_PLUS (GET_MODE (x), new, const0_rtx); 245318334Speter else 245418334Speter return new; 245518334Speter } 245618334Speter } 245718334Speter return x; 245818334Speter 245918334Speter case MULT: 246090075Sobrien /* If this is the product of an eliminable register and a 246118334Speter constant, apply the distribute law and move the constant out 246218334Speter so that we have (plus (mult ..) ..). This is needed in order 246318334Speter to keep load-address insns valid. This case is pathological. 246418334Speter We ignore the possibility of overflow here. */ 2465169689Skan if (REG_P (XEXP (x, 0)) 246618334Speter && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER 246718334Speter && GET_CODE (XEXP (x, 1)) == CONST_INT) 246818334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 246918334Speter ep++) 247018334Speter if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate) 247118334Speter { 247218334Speter if (! mem_mode 247318334Speter /* Refs inside notes don't count for this purpose. */ 247418334Speter && ! (insn != 0 && (GET_CODE (insn) == EXPR_LIST 247518334Speter || GET_CODE (insn) == INSN_LIST))) 247618334Speter ep->ref_outside_mem = 1; 247718334Speter 247818334Speter return 247950397Sobrien plus_constant (gen_rtx_MULT (Pmode, ep->to_rtx, XEXP (x, 1)), 248018334Speter ep->previous_offset * INTVAL (XEXP (x, 1))); 248118334Speter } 248218334Speter 248350397Sobrien /* ... fall through ... */ 248418334Speter 248518334Speter case CALL: 248618334Speter case COMPARE: 248790075Sobrien /* See comments before PLUS about handling MINUS. */ 248818334Speter case MINUS: 248918334Speter case DIV: case UDIV: 249018334Speter case MOD: case UMOD: 249118334Speter case AND: case IOR: case XOR: 249218334Speter case ROTATERT: case ROTATE: 249318334Speter case ASHIFTRT: case LSHIFTRT: case ASHIFT: 249418334Speter case NE: case EQ: 249518334Speter case GE: case GT: case GEU: case GTU: 249618334Speter case LE: case LT: case LEU: case LTU: 249718334Speter { 2498169689Skan rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false); 2499169689Skan rtx new1 = XEXP (x, 1) 2500169689Skan ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, false) : 0; 250118334Speter 250218334Speter if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) 250350397Sobrien return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1); 250418334Speter } 250518334Speter return x; 250618334Speter 250718334Speter case EXPR_LIST: 250818334Speter /* If we have something in XEXP (x, 0), the usual case, eliminate it. */ 250918334Speter if (XEXP (x, 0)) 251018334Speter { 2511169689Skan new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true); 251218334Speter if (new != XEXP (x, 0)) 251352284Sobrien { 251452284Sobrien /* If this is a REG_DEAD note, it is not valid anymore. 251552284Sobrien Using the eliminated version could result in creating a 251652284Sobrien REG_DEAD note for the stack or frame pointer. */ 251752284Sobrien if (GET_MODE (x) == REG_DEAD) 251852284Sobrien return (XEXP (x, 1) 2519169689Skan ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true) 252052284Sobrien : NULL_RTX); 252152284Sobrien 252252284Sobrien x = gen_rtx_EXPR_LIST (REG_NOTE_KIND (x), new, XEXP (x, 1)); 252352284Sobrien } 252418334Speter } 252518334Speter 252650397Sobrien /* ... fall through ... */ 252718334Speter 252818334Speter case INSN_LIST: 252918334Speter /* Now do eliminations in the rest of the chain. If this was 253018334Speter an EXPR_LIST, this might result in allocating more memory than is 253118334Speter strictly needed, but it simplifies the code. */ 253218334Speter if (XEXP (x, 1)) 253318334Speter { 2534169689Skan new = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true); 253518334Speter if (new != XEXP (x, 1)) 253690075Sobrien return 253790075Sobrien gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new); 253818334Speter } 253918334Speter return x; 254018334Speter 254118334Speter case PRE_INC: 254218334Speter case POST_INC: 254318334Speter case PRE_DEC: 254418334Speter case POST_DEC: 254518334Speter case STRICT_LOW_PART: 254618334Speter case NEG: case NOT: 254718334Speter case SIGN_EXTEND: case ZERO_EXTEND: 254818334Speter case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: 254918334Speter case FLOAT: case FIX: 255018334Speter case UNSIGNED_FIX: case UNSIGNED_FLOAT: 255118334Speter case ABS: 255218334Speter case SQRT: 255318334Speter case FFS: 2554132718Skan case CLZ: 2555132718Skan case CTZ: 2556132718Skan case POPCOUNT: 2557132718Skan case PARITY: 2558169689Skan new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false); 255918334Speter if (new != XEXP (x, 0)) 256050397Sobrien return gen_rtx_fmt_e (code, GET_MODE (x), new); 256118334Speter return x; 256218334Speter 256318334Speter case SUBREG: 256490075Sobrien /* Similar to above processing, but preserve SUBREG_BYTE. 256518334Speter Convert (subreg (mem)) to (mem) if not paradoxical. 256618334Speter Also, if we have a non-paradoxical (subreg (pseudo)) and the 256718334Speter pseudo didn't get a hard reg, we must replace this with the 2568132718Skan eliminated version of the memory location because push_reload 256918334Speter may do the replacement in certain circumstances. */ 2570169689Skan if (REG_P (SUBREG_REG (x)) 257118334Speter && (GET_MODE_SIZE (GET_MODE (x)) 257218334Speter <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 257318334Speter && reg_equiv_memory_loc != 0 257418334Speter && reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0) 257518334Speter { 257652284Sobrien new = SUBREG_REG (x); 257718334Speter } 257818334Speter else 2579169689Skan new = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false); 258018334Speter 258190075Sobrien if (new != SUBREG_REG (x)) 258218334Speter { 258350397Sobrien int x_size = GET_MODE_SIZE (GET_MODE (x)); 258450397Sobrien int new_size = GET_MODE_SIZE (GET_MODE (new)); 258550397Sobrien 2586169689Skan if (MEM_P (new) 258750397Sobrien && ((x_size < new_size 258850397Sobrien#ifdef WORD_REGISTER_OPERATIONS 258950397Sobrien /* On these machines, combine can create rtl of the form 259050397Sobrien (set (subreg:m1 (reg:m2 R) 0) ...) 259190075Sobrien where m1 < m2, and expects something interesting to 259250397Sobrien happen to the entire word. Moreover, it will use the 259350397Sobrien (reg:m2 R) later, expecting all bits to be preserved. 259490075Sobrien So if the number of words is the same, preserve the 2595132718Skan subreg so that push_reload can see it. */ 259690075Sobrien && ! ((x_size - 1) / UNITS_PER_WORD 259790075Sobrien == (new_size -1 ) / UNITS_PER_WORD) 259818334Speter#endif 259950397Sobrien ) 260090075Sobrien || x_size == new_size) 260118334Speter ) 260296263Sobrien return adjust_address_nv (new, GET_MODE (x), SUBREG_BYTE (x)); 260390075Sobrien else 260490075Sobrien return gen_rtx_SUBREG (GET_MODE (x), new, SUBREG_BYTE (x)); 260590075Sobrien } 260618334Speter 260790075Sobrien return x; 260818334Speter 260990075Sobrien case MEM: 261090075Sobrien /* Our only special processing is to pass the mode of the MEM to our 261190075Sobrien recursive call and copy the flags. While we are here, handle this 261290075Sobrien case more efficiently. */ 261390075Sobrien return 261490075Sobrien replace_equiv_address_nv (x, 2615169689Skan eliminate_regs_1 (XEXP (x, 0), GET_MODE (x), 2616169689Skan insn, true)); 261790075Sobrien 261890075Sobrien case USE: 261990075Sobrien /* Handle insn_list USE that a call to a pure function may generate. */ 2620169689Skan new = eliminate_regs_1 (XEXP (x, 0), 0, insn, false); 262190075Sobrien if (new != XEXP (x, 0)) 262290075Sobrien return gen_rtx_USE (GET_MODE (x), new); 262390075Sobrien return x; 262490075Sobrien 262590075Sobrien case CLOBBER: 262690075Sobrien case ASM_OPERANDS: 262790075Sobrien case SET: 2628169689Skan gcc_unreachable (); 262990075Sobrien 263090075Sobrien default: 263190075Sobrien break; 263290075Sobrien } 263390075Sobrien 263490075Sobrien /* Process each of our operands recursively. If any have changed, make a 263590075Sobrien copy of the rtx. */ 263690075Sobrien fmt = GET_RTX_FORMAT (code); 263790075Sobrien for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 263890075Sobrien { 263990075Sobrien if (*fmt == 'e') 264090075Sobrien { 2641169689Skan new = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false); 264290075Sobrien if (new != XEXP (x, i) && ! copied) 264390075Sobrien { 2644169689Skan x = shallow_copy_rtx (x); 264590075Sobrien copied = 1; 264618334Speter } 264790075Sobrien XEXP (x, i) = new; 264818334Speter } 264990075Sobrien else if (*fmt == 'E') 265090075Sobrien { 265190075Sobrien int copied_vec = 0; 265290075Sobrien for (j = 0; j < XVECLEN (x, i); j++) 265390075Sobrien { 2654169689Skan new = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false); 265590075Sobrien if (new != XVECEXP (x, i, j) && ! copied_vec) 265690075Sobrien { 265790075Sobrien rtvec new_v = gen_rtvec_v (XVECLEN (x, i), 265890075Sobrien XVEC (x, i)->elem); 265990075Sobrien if (! copied) 266090075Sobrien { 2661169689Skan x = shallow_copy_rtx (x); 266290075Sobrien copied = 1; 266390075Sobrien } 266490075Sobrien XVEC (x, i) = new_v; 266590075Sobrien copied_vec = 1; 266690075Sobrien } 266790075Sobrien XVECEXP (x, i, j) = new; 266890075Sobrien } 266990075Sobrien } 267090075Sobrien } 267118334Speter 267290075Sobrien return x; 267390075Sobrien} 267418334Speter 2675169689Skanrtx 2676169689Skaneliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) 2677169689Skan{ 2678169689Skan return eliminate_regs_1 (x, mem_mode, insn, false); 2679169689Skan} 2680169689Skan 268190075Sobrien/* Scan rtx X for modifications of elimination target registers. Update 268290075Sobrien the table of eliminables to reflect the changed state. MEM_MODE is 268390075Sobrien the mode of an enclosing MEM rtx, or VOIDmode if not within a MEM. */ 268490075Sobrien 268590075Sobrienstatic void 2686132718Skanelimination_effects (rtx x, enum machine_mode mem_mode) 268790075Sobrien{ 268890075Sobrien enum rtx_code code = GET_CODE (x); 268990075Sobrien struct elim_table *ep; 269090075Sobrien int regno; 269190075Sobrien int i, j; 269290075Sobrien const char *fmt; 269390075Sobrien 269490075Sobrien switch (code) 269590075Sobrien { 269690075Sobrien case CONST_INT: 269790075Sobrien case CONST_DOUBLE: 269896263Sobrien case CONST_VECTOR: 269990075Sobrien case CONST: 270090075Sobrien case SYMBOL_REF: 270190075Sobrien case CODE_LABEL: 270290075Sobrien case PC: 270390075Sobrien case CC0: 270490075Sobrien case ASM_INPUT: 270590075Sobrien case ADDR_VEC: 270690075Sobrien case ADDR_DIFF_VEC: 270790075Sobrien case RETURN: 270890075Sobrien return; 270990075Sobrien 271090075Sobrien case REG: 271190075Sobrien regno = REGNO (x); 271290075Sobrien 271390075Sobrien /* First handle the case where we encounter a bare register that 271490075Sobrien is eliminable. Replace it with a PLUS. */ 271590075Sobrien if (regno < FIRST_PSEUDO_REGISTER) 271690075Sobrien { 271790075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 271890075Sobrien ep++) 271990075Sobrien if (ep->from_rtx == x && ep->can_eliminate) 272090075Sobrien { 272190075Sobrien if (! mem_mode) 272290075Sobrien ep->ref_outside_mem = 1; 272390075Sobrien return; 272490075Sobrien } 272590075Sobrien 272690075Sobrien } 272790075Sobrien else if (reg_renumber[regno] < 0 && reg_equiv_constant 272890075Sobrien && reg_equiv_constant[regno] 272990075Sobrien && ! function_invariant_p (reg_equiv_constant[regno])) 273090075Sobrien elimination_effects (reg_equiv_constant[regno], mem_mode); 273190075Sobrien return; 273290075Sobrien 273390075Sobrien case PRE_INC: 273490075Sobrien case POST_INC: 273590075Sobrien case PRE_DEC: 273690075Sobrien case POST_DEC: 273790075Sobrien case POST_MODIFY: 273890075Sobrien case PRE_MODIFY: 273990075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 274090075Sobrien if (ep->to_rtx == XEXP (x, 0)) 274190075Sobrien { 274290075Sobrien int size = GET_MODE_SIZE (mem_mode); 274390075Sobrien 274490075Sobrien /* If more bytes than MEM_MODE are pushed, account for them. */ 274590075Sobrien#ifdef PUSH_ROUNDING 274690075Sobrien if (ep->to_rtx == stack_pointer_rtx) 274790075Sobrien size = PUSH_ROUNDING (size); 274890075Sobrien#endif 274990075Sobrien if (code == PRE_DEC || code == POST_DEC) 275090075Sobrien ep->offset += size; 275190075Sobrien else if (code == PRE_INC || code == POST_INC) 275290075Sobrien ep->offset -= size; 275390075Sobrien else if ((code == PRE_MODIFY || code == POST_MODIFY) 275490075Sobrien && GET_CODE (XEXP (x, 1)) == PLUS 275590075Sobrien && XEXP (x, 0) == XEXP (XEXP (x, 1), 0) 275690075Sobrien && CONSTANT_P (XEXP (XEXP (x, 1), 1))) 275790075Sobrien ep->offset -= INTVAL (XEXP (XEXP (x, 1), 1)); 275890075Sobrien } 275990075Sobrien 276090075Sobrien /* These two aren't unary operators. */ 276190075Sobrien if (code == POST_MODIFY || code == PRE_MODIFY) 276290075Sobrien break; 276390075Sobrien 276490075Sobrien /* Fall through to generic unary operation case. */ 276590075Sobrien case STRICT_LOW_PART: 276690075Sobrien case NEG: case NOT: 276790075Sobrien case SIGN_EXTEND: case ZERO_EXTEND: 276890075Sobrien case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: 276990075Sobrien case FLOAT: case FIX: 277090075Sobrien case UNSIGNED_FIX: case UNSIGNED_FLOAT: 277190075Sobrien case ABS: 277290075Sobrien case SQRT: 277390075Sobrien case FFS: 2774132718Skan case CLZ: 2775132718Skan case CTZ: 2776132718Skan case POPCOUNT: 2777132718Skan case PARITY: 277890075Sobrien elimination_effects (XEXP (x, 0), mem_mode); 277990075Sobrien return; 278090075Sobrien 278190075Sobrien case SUBREG: 2782169689Skan if (REG_P (SUBREG_REG (x)) 278390075Sobrien && (GET_MODE_SIZE (GET_MODE (x)) 278490075Sobrien <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 278590075Sobrien && reg_equiv_memory_loc != 0 278690075Sobrien && reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0) 278790075Sobrien return; 278890075Sobrien 278990075Sobrien elimination_effects (SUBREG_REG (x), mem_mode); 279090075Sobrien return; 279190075Sobrien 279250397Sobrien case USE: 279350397Sobrien /* If using a register that is the source of an eliminate we still 279450397Sobrien think can be performed, note it cannot be performed since we don't 279550397Sobrien know how this register is used. */ 279650397Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 279750397Sobrien if (ep->from_rtx == XEXP (x, 0)) 279850397Sobrien ep->can_eliminate = 0; 279950397Sobrien 280090075Sobrien elimination_effects (XEXP (x, 0), mem_mode); 280190075Sobrien return; 280250397Sobrien 280318334Speter case CLOBBER: 280418334Speter /* If clobbering a register that is the replacement register for an 280518334Speter elimination we still think can be performed, note that it cannot 280618334Speter be performed. Otherwise, we need not be concerned about it. */ 280718334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 280818334Speter if (ep->to_rtx == XEXP (x, 0)) 280918334Speter ep->can_eliminate = 0; 281018334Speter 281190075Sobrien elimination_effects (XEXP (x, 0), mem_mode); 281290075Sobrien return; 281318334Speter 281418334Speter case SET: 281518334Speter /* Check for setting a register that we know about. */ 2816169689Skan if (REG_P (SET_DEST (x))) 281718334Speter { 281818334Speter /* See if this is setting the replacement register for an 281918334Speter elimination. 282018334Speter 282118334Speter If DEST is the hard frame pointer, we do nothing because we 282218334Speter assume that all assignments to the frame pointer are for 282318334Speter non-local gotos and are being done at a time when they are valid 282418334Speter and do not disturb anything else. Some machines want to 282518334Speter eliminate a fake argument pointer (or even a fake frame pointer) 282618334Speter with either the real frame or the stack pointer. Assignments to 282718334Speter the hard frame pointer must not prevent this elimination. */ 282818334Speter 282918334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 283018334Speter ep++) 283118334Speter if (ep->to_rtx == SET_DEST (x) 283218334Speter && SET_DEST (x) != hard_frame_pointer_rtx) 283318334Speter { 283418334Speter /* If it is being incremented, adjust the offset. Otherwise, 283518334Speter this elimination can't be done. */ 283618334Speter rtx src = SET_SRC (x); 283718334Speter 283818334Speter if (GET_CODE (src) == PLUS 283918334Speter && XEXP (src, 0) == SET_DEST (x) 284018334Speter && GET_CODE (XEXP (src, 1)) == CONST_INT) 284118334Speter ep->offset -= INTVAL (XEXP (src, 1)); 284218334Speter else 284318334Speter ep->can_eliminate = 0; 284418334Speter } 284518334Speter } 284618334Speter 284790075Sobrien elimination_effects (SET_DEST (x), 0); 284890075Sobrien elimination_effects (SET_SRC (x), 0); 284990075Sobrien return; 285018334Speter 285118334Speter case MEM: 285218334Speter /* Our only special processing is to pass the mode of the MEM to our 285390075Sobrien recursive call. */ 285490075Sobrien elimination_effects (XEXP (x, 0), GET_MODE (x)); 285590075Sobrien return; 285690075Sobrien 285750397Sobrien default: 285850397Sobrien break; 285918334Speter } 286018334Speter 286118334Speter fmt = GET_RTX_FORMAT (code); 286218334Speter for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 286318334Speter { 286418334Speter if (*fmt == 'e') 286590075Sobrien elimination_effects (XEXP (x, i), mem_mode); 286618334Speter else if (*fmt == 'E') 286790075Sobrien for (j = 0; j < XVECLEN (x, i); j++) 286890075Sobrien elimination_effects (XVECEXP (x, i, j), mem_mode); 286990075Sobrien } 287090075Sobrien} 287190075Sobrien 287290075Sobrien/* Descend through rtx X and verify that no references to eliminable registers 287390075Sobrien remain. If any do remain, mark the involved register as not 287490075Sobrien eliminable. */ 287590075Sobrien 287690075Sobrienstatic void 2877132718Skancheck_eliminable_occurrences (rtx x) 287890075Sobrien{ 287990075Sobrien const char *fmt; 288090075Sobrien int i; 288190075Sobrien enum rtx_code code; 288290075Sobrien 288390075Sobrien if (x == 0) 288490075Sobrien return; 288590075Sobrien 288690075Sobrien code = GET_CODE (x); 288790075Sobrien 288890075Sobrien if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) 288990075Sobrien { 289090075Sobrien struct elim_table *ep; 289190075Sobrien 289290075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 2893169689Skan if (ep->from_rtx == x) 289490075Sobrien ep->can_eliminate = 0; 289590075Sobrien return; 289690075Sobrien } 289790075Sobrien 289890075Sobrien fmt = GET_RTX_FORMAT (code); 289990075Sobrien for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 290090075Sobrien { 290190075Sobrien if (*fmt == 'e') 290290075Sobrien check_eliminable_occurrences (XEXP (x, i)); 290390075Sobrien else if (*fmt == 'E') 290418334Speter { 290590075Sobrien int j; 290618334Speter for (j = 0; j < XVECLEN (x, i); j++) 290790075Sobrien check_eliminable_occurrences (XVECEXP (x, i, j)); 290818334Speter } 290918334Speter } 291018334Speter} 291118334Speter 291218334Speter/* Scan INSN and eliminate all eliminable registers in it. 291318334Speter 291418334Speter If REPLACE is nonzero, do the replacement destructively. Also 291518334Speter delete the insn as dead it if it is setting an eliminable register. 291618334Speter 291718334Speter If REPLACE is zero, do all our allocations in reload_obstack. 291818334Speter 291918334Speter If no eliminations were done and this insn doesn't require any elimination 292018334Speter processing (these are not identical conditions: it might be updating sp, 292118334Speter but not referencing fp; this needs to be seen during reload_as_needed so 292218334Speter that the offset between fp and sp can be taken into consideration), zero 292318334Speter is returned. Otherwise, 1 is returned. */ 292418334Speter 292518334Speterstatic int 2926132718Skaneliminate_regs_in_insn (rtx insn, int replace) 292718334Speter{ 292890075Sobrien int icode = recog_memoized (insn); 292918334Speter rtx old_body = PATTERN (insn); 293090075Sobrien int insn_is_asm = asm_noperands (old_body) >= 0; 293118334Speter rtx old_set = single_set (insn); 293218334Speter rtx new_body; 293318334Speter int val = 0; 2934132718Skan int i; 293590075Sobrien rtx substed_operand[MAX_RECOG_OPERANDS]; 293690075Sobrien rtx orig_operand[MAX_RECOG_OPERANDS]; 293718334Speter struct elim_table *ep; 2938169689Skan rtx plus_src, plus_cst_src; 293918334Speter 294090075Sobrien if (! insn_is_asm && icode < 0) 294190075Sobrien { 2942169689Skan gcc_assert (GET_CODE (PATTERN (insn)) == USE 2943169689Skan || GET_CODE (PATTERN (insn)) == CLOBBER 2944169689Skan || GET_CODE (PATTERN (insn)) == ADDR_VEC 2945169689Skan || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC 2946169689Skan || GET_CODE (PATTERN (insn)) == ASM_INPUT); 2947169689Skan return 0; 294890075Sobrien } 294918334Speter 2950169689Skan if (old_set != 0 && REG_P (SET_DEST (old_set)) 295118334Speter && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER) 295218334Speter { 295318334Speter /* Check for setting an eliminable register. */ 295418334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 295518334Speter if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate) 295618334Speter { 295718334Speter#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 295818334Speter /* If this is setting the frame pointer register to the 295918334Speter hardware frame pointer register and this is an elimination 296018334Speter that will be done (tested above), this insn is really 296118334Speter adjusting the frame pointer downward to compensate for 296218334Speter the adjustment done before a nonlocal goto. */ 296318334Speter if (ep->from == FRAME_POINTER_REGNUM 296418334Speter && ep->to == HARD_FRAME_POINTER_REGNUM) 296518334Speter { 296690075Sobrien rtx base = SET_SRC (old_set); 296790075Sobrien rtx base_insn = insn; 2968132718Skan HOST_WIDE_INT offset = 0; 296918334Speter 297090075Sobrien while (base != ep->to_rtx) 297150397Sobrien { 297290075Sobrien rtx prev_insn, prev_set; 297390075Sobrien 297490075Sobrien if (GET_CODE (base) == PLUS 297590075Sobrien && GET_CODE (XEXP (base, 1)) == CONST_INT) 297690075Sobrien { 297790075Sobrien offset += INTVAL (XEXP (base, 1)); 297890075Sobrien base = XEXP (base, 0); 297990075Sobrien } 298090075Sobrien else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0 298190075Sobrien && (prev_set = single_set (prev_insn)) != 0 298290075Sobrien && rtx_equal_p (SET_DEST (prev_set), base)) 298390075Sobrien { 298490075Sobrien base = SET_SRC (prev_set); 298590075Sobrien base_insn = prev_insn; 298690075Sobrien } 298790075Sobrien else 298890075Sobrien break; 298950397Sobrien } 299018334Speter 299190075Sobrien if (base == ep->to_rtx) 299218334Speter { 299390075Sobrien rtx src 299490075Sobrien = plus_constant (ep->to_rtx, offset - ep->offset); 299590075Sobrien 299690075Sobrien new_body = old_body; 299790075Sobrien if (! replace) 299818334Speter { 299990075Sobrien new_body = copy_insn (old_body); 300090075Sobrien if (REG_NOTES (insn)) 300190075Sobrien REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); 300290075Sobrien } 300390075Sobrien PATTERN (insn) = new_body; 300490075Sobrien old_set = single_set (insn); 300518334Speter 300690075Sobrien /* First see if this insn remains valid when we 300790075Sobrien make the change. If not, keep the INSN_CODE 300890075Sobrien the same and let reload fit it up. */ 300990075Sobrien validate_change (insn, &SET_SRC (old_set), src, 1); 301090075Sobrien validate_change (insn, &SET_DEST (old_set), 301190075Sobrien ep->to_rtx, 1); 301290075Sobrien if (! apply_change_group ()) 301390075Sobrien { 301490075Sobrien SET_SRC (old_set) = src; 301590075Sobrien SET_DEST (old_set) = ep->to_rtx; 301618334Speter } 301718334Speter 301818334Speter val = 1; 301918334Speter goto done; 302018334Speter } 302118334Speter } 302218334Speter#endif 302318334Speter 302418334Speter /* In this case this insn isn't serving a useful purpose. We 302518334Speter will delete it in reload_as_needed once we know that this 302618334Speter elimination is, in fact, being done. 302718334Speter 302818334Speter If REPLACE isn't set, we can't delete this insn, but needn't 302918334Speter process it since it won't be used unless something changes. */ 303018334Speter if (replace) 303190075Sobrien { 303290075Sobrien delete_dead_insn (insn); 303390075Sobrien return 1; 303490075Sobrien } 303518334Speter val = 1; 303618334Speter goto done; 303718334Speter } 303890075Sobrien } 303918334Speter 304090075Sobrien /* We allow one special case which happens to work on all machines we 3041169689Skan currently support: a single set with the source or a REG_EQUAL 3042169689Skan note being a PLUS of an eliminable register and a constant. */ 3043169689Skan plus_src = plus_cst_src = 0; 3044169689Skan if (old_set && REG_P (SET_DEST (old_set))) 304590075Sobrien { 3046169689Skan if (GET_CODE (SET_SRC (old_set)) == PLUS) 3047169689Skan plus_src = SET_SRC (old_set); 3048169689Skan /* First see if the source is of the form (plus (...) CST). */ 3049169689Skan if (plus_src 3050169689Skan && GET_CODE (XEXP (plus_src, 1)) == CONST_INT) 3051169689Skan plus_cst_src = plus_src; 3052169689Skan else if (REG_P (SET_SRC (old_set)) 3053169689Skan || plus_src) 3054169689Skan { 3055169689Skan /* Otherwise, see if we have a REG_EQUAL note of the form 3056169689Skan (plus (...) CST). */ 3057169689Skan rtx links; 3058169689Skan for (links = REG_NOTES (insn); links; links = XEXP (links, 1)) 3059169689Skan { 3060169689Skan if (REG_NOTE_KIND (links) == REG_EQUAL 3061169689Skan && GET_CODE (XEXP (links, 0)) == PLUS 3062169689Skan && GET_CODE (XEXP (XEXP (links, 0), 1)) == CONST_INT) 3063169689Skan { 3064169689Skan plus_cst_src = XEXP (links, 0); 3065169689Skan break; 3066169689Skan } 3067169689Skan } 3068169689Skan } 306918334Speter 3070169689Skan /* Check that the first operand of the PLUS is a hard reg or 3071169689Skan the lowpart subreg of one. */ 3072169689Skan if (plus_cst_src) 3073169689Skan { 3074169689Skan rtx reg = XEXP (plus_cst_src, 0); 3075169689Skan if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg)) 3076169689Skan reg = SUBREG_REG (reg); 3077169689Skan 3078169689Skan if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 3079169689Skan plus_cst_src = 0; 3080169689Skan } 3081169689Skan } 3082169689Skan if (plus_cst_src) 3083169689Skan { 3084169689Skan rtx reg = XEXP (plus_cst_src, 0); 3085169689Skan HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1)); 3086169689Skan 3087169689Skan if (GET_CODE (reg) == SUBREG) 3088169689Skan reg = SUBREG_REG (reg); 3089169689Skan 309090075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 309190075Sobrien if (ep->from_rtx == reg && ep->can_eliminate) 309290075Sobrien { 3093169689Skan rtx to_rtx = ep->to_rtx; 309490075Sobrien offset += ep->offset; 3095169689Skan offset = trunc_int_for_mode (offset, GET_MODE (reg)); 309618334Speter 3097169689Skan if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG) 3098169689Skan to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), 3099169689Skan to_rtx); 3100169689Skan /* If we have a nonzero offset, and the source is already 3101169689Skan a simple REG, the following transformation would 3102169689Skan increase the cost of the insn by replacing a simple REG 3103169689Skan with (plus (reg sp) CST). So try only when we already 3104169689Skan had a PLUS before. */ 3105169689Skan if (offset == 0 || plus_src) 310690075Sobrien { 3107169689Skan rtx new_src = plus_constant (to_rtx, offset); 310890075Sobrien 310990075Sobrien new_body = old_body; 311090075Sobrien if (! replace) 311190075Sobrien { 311290075Sobrien new_body = copy_insn (old_body); 311390075Sobrien if (REG_NOTES (insn)) 311490075Sobrien REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); 311590075Sobrien } 311690075Sobrien PATTERN (insn) = new_body; 311790075Sobrien old_set = single_set (insn); 311890075Sobrien 3119169689Skan /* First see if this insn remains valid when we make the 3120169689Skan change. If not, try to replace the whole pattern with 3121169689Skan a simple set (this may help if the original insn was a 3122169689Skan PARALLEL that was only recognized as single_set due to 3123169689Skan REG_UNUSED notes). If this isn't valid either, keep 3124169689Skan the INSN_CODE the same and let reload fix it up. */ 3125169689Skan if (!validate_change (insn, &SET_SRC (old_set), new_src, 0)) 3126169689Skan { 3127169689Skan rtx new_pat = gen_rtx_SET (VOIDmode, 3128169689Skan SET_DEST (old_set), new_src); 3129169689Skan 3130169689Skan if (!validate_change (insn, &PATTERN (insn), new_pat, 0)) 3131169689Skan SET_SRC (old_set) = new_src; 3132169689Skan } 313390075Sobrien } 3134169689Skan else 3135169689Skan break; 3136169689Skan 313790075Sobrien val = 1; 313890075Sobrien /* This can't have an effect on elimination offsets, so skip right 313990075Sobrien to the end. */ 314090075Sobrien goto done; 314190075Sobrien } 314290075Sobrien } 314390075Sobrien 314490075Sobrien /* Determine the effects of this insn on elimination offsets. */ 314590075Sobrien elimination_effects (old_body, 0); 314690075Sobrien 314790075Sobrien /* Eliminate all eliminable registers occurring in operands that 314890075Sobrien can be handled by reload. */ 314990075Sobrien extract_insn (insn); 315090075Sobrien for (i = 0; i < recog_data.n_operands; i++) 315190075Sobrien { 315290075Sobrien orig_operand[i] = recog_data.operand[i]; 315390075Sobrien substed_operand[i] = recog_data.operand[i]; 315490075Sobrien 315590075Sobrien /* For an asm statement, every operand is eliminable. */ 315690075Sobrien if (insn_is_asm || insn_data[icode].operand[i].eliminable) 315790075Sobrien { 3158169689Skan bool is_set_src, in_plus; 3159169689Skan 316090075Sobrien /* Check for setting a register that we know about. */ 316190075Sobrien if (recog_data.operand_type[i] != OP_IN 3162169689Skan && REG_P (orig_operand[i])) 316318334Speter { 316490075Sobrien /* If we are assigning to a register that can be eliminated, it 316590075Sobrien must be as part of a PARALLEL, since the code above handles 316690075Sobrien single SETs. We must indicate that we can no longer 316790075Sobrien eliminate this reg. */ 316890075Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 316990075Sobrien ep++) 3170169689Skan if (ep->from_rtx == orig_operand[i]) 317190075Sobrien ep->can_eliminate = 0; 317290075Sobrien } 317318334Speter 3174169689Skan /* Companion to the above plus substitution, we can allow 3175169689Skan invariants as the source of a plain move. */ 3176169689Skan is_set_src = false; 3177169689Skan if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set)) 3178169689Skan is_set_src = true; 3179169689Skan in_plus = false; 3180169689Skan if (plus_src 3181169689Skan && (recog_data.operand_loc[i] == &XEXP (plus_src, 0) 3182169689Skan || recog_data.operand_loc[i] == &XEXP (plus_src, 1))) 3183169689Skan in_plus = true; 3184169689Skan 3185169689Skan substed_operand[i] 3186169689Skan = eliminate_regs_1 (recog_data.operand[i], 0, 3187169689Skan replace ? insn : NULL_RTX, 3188169689Skan is_set_src || in_plus); 318990075Sobrien if (substed_operand[i] != orig_operand[i]) 3190132718Skan val = 1; 319190075Sobrien /* Terminate the search in check_eliminable_occurrences at 319290075Sobrien this point. */ 319390075Sobrien *recog_data.operand_loc[i] = 0; 319490075Sobrien 319590075Sobrien /* If an output operand changed from a REG to a MEM and INSN is an 319690075Sobrien insn, write a CLOBBER insn. */ 319790075Sobrien if (recog_data.operand_type[i] != OP_IN 3198169689Skan && REG_P (orig_operand[i]) 3199169689Skan && MEM_P (substed_operand[i]) 320090075Sobrien && replace) 320190075Sobrien emit_insn_after (gen_rtx_CLOBBER (VOIDmode, orig_operand[i]), 320290075Sobrien insn); 320390075Sobrien } 320418334Speter } 320518334Speter 320690075Sobrien for (i = 0; i < recog_data.n_dups; i++) 320790075Sobrien *recog_data.dup_loc[i] 320890075Sobrien = *recog_data.operand_loc[(int) recog_data.dup_num[i]]; 320918334Speter 321090075Sobrien /* If any eliminable remain, they aren't eliminable anymore. */ 321190075Sobrien check_eliminable_occurrences (old_body); 321218334Speter 321390075Sobrien /* Substitute the operands; the new values are in the substed_operand 321490075Sobrien array. */ 321590075Sobrien for (i = 0; i < recog_data.n_operands; i++) 321690075Sobrien *recog_data.operand_loc[i] = substed_operand[i]; 321790075Sobrien for (i = 0; i < recog_data.n_dups; i++) 321890075Sobrien *recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]]; 321990075Sobrien 322090075Sobrien /* If we are replacing a body that was a (set X (plus Y Z)), try to 322118334Speter re-recognize the insn. We do this in case we had a simple addition 322218334Speter but now can do this as a load-address. This saves an insn in this 322390075Sobrien common case. 322490075Sobrien If re-recognition fails, the old insn code number will still be used, 322590075Sobrien and some register operands may have changed into PLUS expressions. 322690075Sobrien These will be handled by find_reloads by loading them into a register 322790075Sobrien again. */ 322818334Speter 322990075Sobrien if (val) 323018334Speter { 323118334Speter /* If we aren't replacing things permanently and we changed something, 323218334Speter make another copy to ensure that all the RTL is new. Otherwise 323318334Speter things can go wrong if find_reload swaps commutative operands 323450397Sobrien and one is inside RTL that has been copied while the other is not. */ 323590075Sobrien new_body = old_body; 323690075Sobrien if (! replace) 323790075Sobrien { 323890075Sobrien new_body = copy_insn (old_body); 323990075Sobrien if (REG_NOTES (insn)) 324090075Sobrien REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn)); 324190075Sobrien } 324290075Sobrien PATTERN (insn) = new_body; 324318334Speter 324418334Speter /* If we had a move insn but now we don't, rerecognize it. This will 324518334Speter cause spurious re-recognition if the old move had a PARALLEL since 324618334Speter the new one still will, but we can't call single_set without 324718334Speter having put NEW_BODY into the insn and the re-recognition won't 324818334Speter hurt in this rare case. */ 324990075Sobrien /* ??? Why this huge if statement - why don't we just rerecognize the 325090075Sobrien thing always? */ 325190075Sobrien if (! insn_is_asm 325290075Sobrien && old_set != 0 3253169689Skan && ((REG_P (SET_SRC (old_set)) 325418334Speter && (GET_CODE (new_body) != SET 3255169689Skan || !REG_P (SET_SRC (new_body)))) 325618334Speter /* If this was a load from or store to memory, compare 325790075Sobrien the MEM in recog_data.operand to the one in the insn. 325890075Sobrien If they are not equal, then rerecognize the insn. */ 325918334Speter || (old_set != 0 3260169689Skan && ((MEM_P (SET_SRC (old_set)) 326190075Sobrien && SET_SRC (old_set) != recog_data.operand[1]) 3262169689Skan || (MEM_P (SET_DEST (old_set)) 326390075Sobrien && SET_DEST (old_set) != recog_data.operand[0]))) 326418334Speter /* If this was an add insn before, rerecognize. */ 326518334Speter || GET_CODE (SET_SRC (old_set)) == PLUS)) 326618334Speter { 326790075Sobrien int new_icode = recog (PATTERN (insn), insn, 0); 3268169689Skan if (new_icode >= 0) 3269169689Skan INSN_CODE (insn) = new_icode; 327018334Speter } 327190075Sobrien } 327218334Speter 327390075Sobrien /* Restore the old body. If there were any changes to it, we made a copy 327490075Sobrien of it while the changes were still in place, so we'll correctly return 327590075Sobrien a modified insn below. */ 327690075Sobrien if (! replace) 327790075Sobrien { 327890075Sobrien /* Restore the old body. */ 327990075Sobrien for (i = 0; i < recog_data.n_operands; i++) 328090075Sobrien *recog_data.operand_loc[i] = orig_operand[i]; 328190075Sobrien for (i = 0; i < recog_data.n_dups; i++) 328290075Sobrien *recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]]; 328318334Speter } 328418334Speter 328590075Sobrien /* Update all elimination pairs to reflect the status after the current 328690075Sobrien insn. The changes we make were determined by the earlier call to 328790075Sobrien elimination_effects. 328818334Speter 3289117395Skan We also detect cases where register elimination cannot be done, 329018334Speter namely, if a register would be both changed and referenced outside a MEM 329118334Speter in the resulting insn since such an insn is often undefined and, even if 329218334Speter not, we cannot know what meaning will be given to it. Note that it is 329318334Speter valid to have a register used in an address in an insn that changes it 329418334Speter (presumably with a pre- or post-increment or decrement). 329518334Speter 329618334Speter If anything changes, return nonzero. */ 329718334Speter 329818334Speter for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 329918334Speter { 330018334Speter if (ep->previous_offset != ep->offset && ep->ref_outside_mem) 330118334Speter ep->can_eliminate = 0; 330218334Speter 330318334Speter ep->ref_outside_mem = 0; 330418334Speter 330518334Speter if (ep->previous_offset != ep->offset) 330618334Speter val = 1; 330718334Speter } 330818334Speter 330918334Speter done: 331018334Speter /* If we changed something, perform elimination in REG_NOTES. This is 331118334Speter needed even when REPLACE is zero because a REG_DEAD note might refer 331218334Speter to a register that we eliminate and could cause a different number 331318334Speter of spill registers to be needed in the final reload pass than in 331418334Speter the pre-passes. */ 331518334Speter if (val && REG_NOTES (insn) != 0) 3316169689Skan REG_NOTES (insn) 3317169689Skan = eliminate_regs_1 (REG_NOTES (insn), 0, REG_NOTES (insn), true); 331818334Speter 331918334Speter return val; 332018334Speter} 332118334Speter 332252284Sobrien/* Loop through all elimination pairs. 332352284Sobrien Recalculate the number not at initial offset. 332452284Sobrien 332552284Sobrien Compute the maximum offset (minimum offset if the stack does not 332652284Sobrien grow downward) for each elimination pair. */ 332752284Sobrien 332852284Sobrienstatic void 3329132718Skanupdate_eliminable_offsets (void) 333052284Sobrien{ 333152284Sobrien struct elim_table *ep; 333252284Sobrien 333352284Sobrien num_not_at_initial_offset = 0; 333452284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 333552284Sobrien { 333652284Sobrien ep->previous_offset = ep->offset; 333752284Sobrien if (ep->can_eliminate && ep->offset != ep->initial_offset) 333852284Sobrien num_not_at_initial_offset++; 333952284Sobrien } 334052284Sobrien} 334152284Sobrien 334218334Speter/* Given X, a SET or CLOBBER of DEST, if DEST is the target of a register 334318334Speter replacement we currently believe is valid, mark it as not eliminable if X 334418334Speter modifies DEST in any way other than by adding a constant integer to it. 334518334Speter 334618334Speter If DEST is the frame pointer, we do nothing because we assume that 334718334Speter all assignments to the hard frame pointer are nonlocal gotos and are being 334818334Speter done at a time when they are valid and do not disturb anything else. 334918334Speter Some machines want to eliminate a fake argument pointer with either the 335018334Speter frame or stack pointer. Assignments to the hard frame pointer must not 335118334Speter prevent this elimination. 335218334Speter 335318334Speter Called via note_stores from reload before starting its passes to scan 335418334Speter the insns of the function. */ 335518334Speter 335618334Speterstatic void 3357132718Skanmark_not_eliminable (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED) 335818334Speter{ 335990075Sobrien unsigned int i; 336018334Speter 336118334Speter /* A SUBREG of a hard register here is just changing its mode. We should 336218334Speter not see a SUBREG of an eliminable hard register, but check just in 336318334Speter case. */ 336418334Speter if (GET_CODE (dest) == SUBREG) 336518334Speter dest = SUBREG_REG (dest); 336618334Speter 336718334Speter if (dest == hard_frame_pointer_rtx) 336818334Speter return; 336918334Speter 337018334Speter for (i = 0; i < NUM_ELIMINABLE_REGS; i++) 337118334Speter if (reg_eliminate[i].can_eliminate && dest == reg_eliminate[i].to_rtx 337218334Speter && (GET_CODE (x) != SET 337318334Speter || GET_CODE (SET_SRC (x)) != PLUS 337418334Speter || XEXP (SET_SRC (x), 0) != dest 337518334Speter || GET_CODE (XEXP (SET_SRC (x), 1)) != CONST_INT)) 337618334Speter { 337718334Speter reg_eliminate[i].can_eliminate_previous 337818334Speter = reg_eliminate[i].can_eliminate = 0; 337918334Speter num_eliminable--; 338018334Speter } 338118334Speter} 338252284Sobrien 338352284Sobrien/* Verify that the initial elimination offsets did not change since the 338452284Sobrien last call to set_initial_elim_offsets. This is used to catch cases 338552284Sobrien where something illegal happened during reload_as_needed that could 338652284Sobrien cause incorrect code to be generated if we did not check for it. */ 338790075Sobrien 3388169689Skanstatic bool 3389132718Skanverify_initial_elim_offsets (void) 339052284Sobrien{ 3391132718Skan HOST_WIDE_INT t; 339252284Sobrien 3393169689Skan if (!num_eliminable) 3394169689Skan return true; 3395169689Skan 339652284Sobrien#ifdef ELIMINABLE_REGS 3397169689Skan { 3398169689Skan struct elim_table *ep; 339952284Sobrien 3400169689Skan for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 3401169689Skan { 3402169689Skan INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, t); 3403169689Skan if (t != ep->initial_offset) 3404169689Skan return false; 3405169689Skan } 3406169689Skan } 340752284Sobrien#else 340852284Sobrien INITIAL_FRAME_POINTER_OFFSET (t); 340952284Sobrien if (t != reg_eliminate[0].initial_offset) 3410169689Skan return false; 341190075Sobrien#endif 3412169689Skan 3413169689Skan return true; 341452284Sobrien} 341552284Sobrien 341652284Sobrien/* Reset all offsets on eliminable registers to their initial values. */ 341790075Sobrien 341852284Sobrienstatic void 3419132718Skanset_initial_elim_offsets (void) 342052284Sobrien{ 342152284Sobrien struct elim_table *ep = reg_eliminate; 342252284Sobrien 342352284Sobrien#ifdef ELIMINABLE_REGS 342452284Sobrien for (; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 342552284Sobrien { 342652284Sobrien INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->initial_offset); 342752284Sobrien ep->previous_offset = ep->offset = ep->initial_offset; 342852284Sobrien } 342952284Sobrien#else 343052284Sobrien INITIAL_FRAME_POINTER_OFFSET (ep->initial_offset); 343152284Sobrien ep->previous_offset = ep->offset = ep->initial_offset; 343252284Sobrien#endif 343352284Sobrien 343452284Sobrien num_not_at_initial_offset = 0; 343552284Sobrien} 343652284Sobrien 3437146895Skan/* Subroutine of set_initial_label_offsets called via for_each_eh_label. */ 3438146895Skan 3439146895Skanstatic void 3440146895Skanset_initial_eh_label_offset (rtx label) 3441146895Skan{ 3442146895Skan set_label_offsets (label, NULL_RTX, 1); 3443146895Skan} 3444146895Skan 344552284Sobrien/* Initialize the known label offsets. 344652284Sobrien Set a known offset for each forced label to be at the initial offset 344752284Sobrien of each elimination. We do this because we assume that all 344852284Sobrien computed jumps occur from a location where each elimination is 344952284Sobrien at its initial offset. 345052284Sobrien For all other labels, show that we don't know the offsets. */ 345152284Sobrien 345252284Sobrienstatic void 3453132718Skanset_initial_label_offsets (void) 345452284Sobrien{ 345552284Sobrien rtx x; 3456117395Skan memset (offsets_known_at, 0, num_labels); 345752284Sobrien 345852284Sobrien for (x = forced_labels; x; x = XEXP (x, 1)) 345952284Sobrien if (XEXP (x, 0)) 346052284Sobrien set_label_offsets (XEXP (x, 0), NULL_RTX, 1); 3461146895Skan 3462146895Skan for_each_eh_label (set_initial_eh_label_offset); 346352284Sobrien} 346452284Sobrien 346552284Sobrien/* Set all elimination offsets to the known values for the code label given 346652284Sobrien by INSN. */ 346790075Sobrien 346852284Sobrienstatic void 3469132718Skanset_offsets_for_label (rtx insn) 347052284Sobrien{ 347152284Sobrien unsigned int i; 347252284Sobrien int label_nr = CODE_LABEL_NUMBER (insn); 347352284Sobrien struct elim_table *ep; 347452284Sobrien 347552284Sobrien num_not_at_initial_offset = 0; 347652284Sobrien for (i = 0, ep = reg_eliminate; i < NUM_ELIMINABLE_REGS; ep++, i++) 347752284Sobrien { 3478117395Skan ep->offset = ep->previous_offset 3479117395Skan = offsets_at[label_nr - first_label_num][i]; 348052284Sobrien if (ep->can_eliminate && ep->offset != ep->initial_offset) 348152284Sobrien num_not_at_initial_offset++; 348252284Sobrien } 348352284Sobrien} 348452284Sobrien 348552284Sobrien/* See if anything that happened changes which eliminations are valid. 3486117395Skan For example, on the SPARC, whether or not the frame pointer can 348752284Sobrien be eliminated can depend on what registers have been used. We need 348852284Sobrien not check some conditions again (such as flag_omit_frame_pointer) 348952284Sobrien since they can't have changed. */ 349052284Sobrien 349152284Sobrienstatic void 3492132718Skanupdate_eliminables (HARD_REG_SET *pset) 349352284Sobrien{ 349452284Sobrien int previous_frame_pointer_needed = frame_pointer_needed; 349552284Sobrien struct elim_table *ep; 349652284Sobrien 349752284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 349852284Sobrien if ((ep->from == HARD_FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED) 349952284Sobrien#ifdef ELIMINABLE_REGS 350052284Sobrien || ! CAN_ELIMINATE (ep->from, ep->to) 350152284Sobrien#endif 350252284Sobrien ) 350352284Sobrien ep->can_eliminate = 0; 350452284Sobrien 350552284Sobrien /* Look for the case where we have discovered that we can't replace 350652284Sobrien register A with register B and that means that we will now be 350752284Sobrien trying to replace register A with register C. This means we can 350852284Sobrien no longer replace register C with register B and we need to disable 350952284Sobrien such an elimination, if it exists. This occurs often with A == ap, 351052284Sobrien B == sp, and C == fp. */ 351152284Sobrien 351252284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 351352284Sobrien { 351452284Sobrien struct elim_table *op; 351590075Sobrien int new_to = -1; 351652284Sobrien 351752284Sobrien if (! ep->can_eliminate && ep->can_eliminate_previous) 351852284Sobrien { 351952284Sobrien /* Find the current elimination for ep->from, if there is a 352052284Sobrien new one. */ 352152284Sobrien for (op = reg_eliminate; 352252284Sobrien op < ®_eliminate[NUM_ELIMINABLE_REGS]; op++) 352352284Sobrien if (op->from == ep->from && op->can_eliminate) 352452284Sobrien { 352552284Sobrien new_to = op->to; 352652284Sobrien break; 352752284Sobrien } 352852284Sobrien 352952284Sobrien /* See if there is an elimination of NEW_TO -> EP->TO. If so, 353052284Sobrien disable it. */ 353152284Sobrien for (op = reg_eliminate; 353252284Sobrien op < ®_eliminate[NUM_ELIMINABLE_REGS]; op++) 353352284Sobrien if (op->from == new_to && op->to == ep->to) 353452284Sobrien op->can_eliminate = 0; 353552284Sobrien } 353652284Sobrien } 353752284Sobrien 353852284Sobrien /* See if any registers that we thought we could eliminate the previous 353952284Sobrien time are no longer eliminable. If so, something has changed and we 354052284Sobrien must spill the register. Also, recompute the number of eliminable 354152284Sobrien registers and see if the frame pointer is needed; it is if there is 354252284Sobrien no elimination of the frame pointer that we can perform. */ 354352284Sobrien 354452284Sobrien frame_pointer_needed = 1; 354552284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 354652284Sobrien { 354752284Sobrien if (ep->can_eliminate && ep->from == FRAME_POINTER_REGNUM 354852284Sobrien && ep->to != HARD_FRAME_POINTER_REGNUM) 354952284Sobrien frame_pointer_needed = 0; 355052284Sobrien 355152284Sobrien if (! ep->can_eliminate && ep->can_eliminate_previous) 355252284Sobrien { 355352284Sobrien ep->can_eliminate_previous = 0; 355452284Sobrien SET_HARD_REG_BIT (*pset, ep->from); 355552284Sobrien num_eliminable--; 355652284Sobrien } 355752284Sobrien } 355852284Sobrien 355952284Sobrien /* If we didn't need a frame pointer last time, but we do now, spill 356052284Sobrien the hard frame pointer. */ 356152284Sobrien if (frame_pointer_needed && ! previous_frame_pointer_needed) 356252284Sobrien SET_HARD_REG_BIT (*pset, HARD_FRAME_POINTER_REGNUM); 356352284Sobrien} 356452284Sobrien 356552284Sobrien/* Initialize the table of registers to eliminate. */ 356690075Sobrien 356752284Sobrienstatic void 3568132718Skaninit_elim_table (void) 356952284Sobrien{ 357052284Sobrien struct elim_table *ep; 357152284Sobrien#ifdef ELIMINABLE_REGS 357290075Sobrien const struct elim_table_1 *ep1; 357352284Sobrien#endif 357452284Sobrien 357552284Sobrien if (!reg_eliminate) 3576132718Skan reg_eliminate = xcalloc (sizeof (struct elim_table), NUM_ELIMINABLE_REGS); 357790075Sobrien 357852284Sobrien /* Does this function require a frame pointer? */ 357952284Sobrien 358052284Sobrien frame_pointer_needed = (! flag_omit_frame_pointer 358152284Sobrien /* ?? If EXIT_IGNORE_STACK is set, we will not save 358252284Sobrien and restore sp for alloca. So we can't eliminate 358352284Sobrien the frame pointer in that case. At some point, 358452284Sobrien we should improve this by emitting the 358552284Sobrien sp-adjusting insns for this case. */ 358652284Sobrien || (current_function_calls_alloca 358752284Sobrien && EXIT_IGNORE_STACK) 3588169689Skan || current_function_accesses_prior_frames 358952284Sobrien || FRAME_POINTER_REQUIRED); 359052284Sobrien 359152284Sobrien num_eliminable = 0; 359252284Sobrien 359352284Sobrien#ifdef ELIMINABLE_REGS 359452284Sobrien for (ep = reg_eliminate, ep1 = reg_eliminate_1; 359552284Sobrien ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++) 359652284Sobrien { 359752284Sobrien ep->from = ep1->from; 359852284Sobrien ep->to = ep1->to; 359952284Sobrien ep->can_eliminate = ep->can_eliminate_previous 360052284Sobrien = (CAN_ELIMINATE (ep->from, ep->to) 360152284Sobrien && ! (ep->to == STACK_POINTER_REGNUM && frame_pointer_needed)); 360252284Sobrien } 360352284Sobrien#else 360452284Sobrien reg_eliminate[0].from = reg_eliminate_1[0].from; 360552284Sobrien reg_eliminate[0].to = reg_eliminate_1[0].to; 360652284Sobrien reg_eliminate[0].can_eliminate = reg_eliminate[0].can_eliminate_previous 360752284Sobrien = ! frame_pointer_needed; 360852284Sobrien#endif 360952284Sobrien 361052284Sobrien /* Count the number of eliminable registers and build the FROM and TO 3611169689Skan REG rtx's. Note that code in gen_rtx_REG will cause, e.g., 3612169689Skan gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx. 361352284Sobrien We depend on this. */ 361452284Sobrien for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 361552284Sobrien { 361652284Sobrien num_eliminable += ep->can_eliminate; 361752284Sobrien ep->from_rtx = gen_rtx_REG (Pmode, ep->from); 361852284Sobrien ep->to_rtx = gen_rtx_REG (Pmode, ep->to); 361952284Sobrien } 362052284Sobrien} 362118334Speter 362218334Speter/* Kick all pseudos out of hard register REGNO. 362318334Speter 362418334Speter If CANT_ELIMINATE is nonzero, it means that we are doing this spill 362518334Speter because we found we can't eliminate some register. In the case, no pseudos 362618334Speter are allowed to be in the register, even if they are only in a block that 362718334Speter doesn't require spill registers, unlike the case when we are spilling this 362818334Speter hard reg to produce another spill register. 362918334Speter 363018334Speter Return nonzero if any pseudos needed to be kicked out. */ 363118334Speter 363252284Sobrienstatic void 3633132718Skanspill_hard_reg (unsigned int regno, int cant_eliminate) 363418334Speter{ 363590075Sobrien int i; 363618334Speter 363718334Speter if (cant_eliminate) 363852284Sobrien { 363952284Sobrien SET_HARD_REG_BIT (bad_spill_regs_global, regno); 364052284Sobrien regs_ever_live[regno] = 1; 364152284Sobrien } 364218334Speter 364318334Speter /* Spill every pseudo reg that was allocated to this reg 364418334Speter or to something that overlaps this reg. */ 364518334Speter 364618334Speter for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 364718334Speter if (reg_renumber[i] >= 0 364890075Sobrien && (unsigned int) reg_renumber[i] <= regno 364990075Sobrien && ((unsigned int) reg_renumber[i] 3650169689Skan + hard_regno_nregs[(unsigned int) reg_renumber[i]] 3651169689Skan [PSEUDO_REGNO_MODE (i)] 365218334Speter > regno)) 365390075Sobrien SET_REGNO_REG_SET (&spilled_pseudos, i); 365452284Sobrien} 365518334Speter 365652284Sobrien/* After find_reload_regs has been run for all insn that need reloads, 365752284Sobrien and/or spill_hard_regs was called, this function is used to actually 365852284Sobrien spill pseudo registers and try to reallocate them. It also sets up the 365952284Sobrien spill_regs array for use by choose_reload_regs. */ 366018334Speter 366152284Sobrienstatic int 3662132718Skanfinish_spills (int global) 366352284Sobrien{ 366452284Sobrien struct insn_chain *chain; 366552284Sobrien int something_changed = 0; 3666169689Skan unsigned i; 3667169689Skan reg_set_iterator rsi; 366818334Speter 366952284Sobrien /* Build the spill_regs array for the function. */ 367052284Sobrien /* If there are some registers still to eliminate and one of the spill regs 367152284Sobrien wasn't ever used before, additional stack space may have to be 367252284Sobrien allocated to store this register. Thus, we may have changed the offset 367352284Sobrien between the stack and frame pointers, so mark that something has changed. 367418334Speter 367552284Sobrien One might think that we need only set VAL to 1 if this is a call-used 367652284Sobrien register. However, the set of registers that must be saved by the 367752284Sobrien prologue is not identical to the call-used set. For example, the 367852284Sobrien register used by the call insn for the return PC is a call-used register, 367952284Sobrien but must be saved by the prologue. */ 368052284Sobrien 368152284Sobrien n_spills = 0; 368252284Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 368352284Sobrien if (TEST_HARD_REG_BIT (used_spill_regs, i)) 368452284Sobrien { 368552284Sobrien spill_reg_order[i] = n_spills; 368652284Sobrien spill_regs[n_spills++] = i; 368752284Sobrien if (num_eliminable && ! regs_ever_live[i]) 368852284Sobrien something_changed = 1; 368952284Sobrien regs_ever_live[i] = 1; 369052284Sobrien } 369152284Sobrien else 369252284Sobrien spill_reg_order[i] = -1; 369352284Sobrien 3694169689Skan EXECUTE_IF_SET_IN_REG_SET (&spilled_pseudos, FIRST_PSEUDO_REGISTER, i, rsi) 3695169689Skan { 3696169689Skan /* Record the current hard register the pseudo is allocated to in 3697169689Skan pseudo_previous_regs so we avoid reallocating it to the same 3698169689Skan hard reg in a later pass. */ 3699169689Skan gcc_assert (reg_renumber[i] >= 0); 370018334Speter 3701169689Skan SET_HARD_REG_BIT (pseudo_previous_regs[i], reg_renumber[i]); 3702169689Skan /* Mark it as no longer having a hard register home. */ 3703169689Skan reg_renumber[i] = -1; 3704169689Skan /* We will need to scan everything again. */ 3705169689Skan something_changed = 1; 3706169689Skan } 370790075Sobrien 370852284Sobrien /* Retry global register allocation if possible. */ 370952284Sobrien if (global) 371052284Sobrien { 3711132718Skan memset (pseudo_forbidden_regs, 0, max_regno * sizeof (HARD_REG_SET)); 371252284Sobrien /* For every insn that needs reloads, set the registers used as spill 371352284Sobrien regs in pseudo_forbidden_regs for every pseudo live across the 371452284Sobrien insn. */ 371552284Sobrien for (chain = insns_need_reload; chain; chain = chain->next_need_reload) 371652284Sobrien { 371752284Sobrien EXECUTE_IF_SET_IN_REG_SET 3718169689Skan (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi) 3719169689Skan { 3720169689Skan IOR_HARD_REG_SET (pseudo_forbidden_regs[i], 3721169689Skan chain->used_spill_regs); 3722169689Skan } 372352284Sobrien EXECUTE_IF_SET_IN_REG_SET 3724169689Skan (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi) 3725169689Skan { 3726169689Skan IOR_HARD_REG_SET (pseudo_forbidden_regs[i], 3727169689Skan chain->used_spill_regs); 3728169689Skan } 372952284Sobrien } 373052284Sobrien 373152284Sobrien /* Retry allocating the spilled pseudos. For each reg, merge the 373252284Sobrien various reg sets that indicate which hard regs can't be used, 373352284Sobrien and call retry_global_alloc. 373490075Sobrien We change spill_pseudos here to only contain pseudos that did not 373552284Sobrien get a new hard register. */ 3736169689Skan for (i = FIRST_PSEUDO_REGISTER; i < (unsigned)max_regno; i++) 373752284Sobrien if (reg_old_renumber[i] != reg_renumber[i]) 373818334Speter { 373952284Sobrien HARD_REG_SET forbidden; 374052284Sobrien COPY_HARD_REG_SET (forbidden, bad_spill_regs_global); 374152284Sobrien IOR_HARD_REG_SET (forbidden, pseudo_forbidden_regs[i]); 374252284Sobrien IOR_HARD_REG_SET (forbidden, pseudo_previous_regs[i]); 374352284Sobrien retry_global_alloc (i, forbidden); 374452284Sobrien if (reg_renumber[i] >= 0) 374590075Sobrien CLEAR_REGNO_REG_SET (&spilled_pseudos, i); 374618334Speter } 374752284Sobrien } 374852284Sobrien 374952284Sobrien /* Fix up the register information in the insn chain. 375052284Sobrien This involves deleting those of the spilled pseudos which did not get 375152284Sobrien a new hard register home from the live_{before,after} sets. */ 375252284Sobrien for (chain = reload_insn_chain; chain; chain = chain->next) 375318334Speter { 375452284Sobrien HARD_REG_SET used_by_pseudos; 375552284Sobrien HARD_REG_SET used_by_pseudos2; 375652284Sobrien 375790075Sobrien AND_COMPL_REG_SET (&chain->live_throughout, &spilled_pseudos); 375890075Sobrien AND_COMPL_REG_SET (&chain->dead_or_set, &spilled_pseudos); 375952284Sobrien 376052284Sobrien /* Mark any unallocated hard regs as available for spills. That 376152284Sobrien makes inheritance work somewhat better. */ 376252284Sobrien if (chain->need_reload) 376318334Speter { 376490075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout); 376590075Sobrien REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set); 376652284Sobrien IOR_HARD_REG_SET (used_by_pseudos, used_by_pseudos2); 376718334Speter 376852284Sobrien /* Save the old value for the sanity test below. */ 376952284Sobrien COPY_HARD_REG_SET (used_by_pseudos2, chain->used_spill_regs); 377018334Speter 377190075Sobrien compute_use_by_pseudos (&used_by_pseudos, &chain->live_throughout); 377290075Sobrien compute_use_by_pseudos (&used_by_pseudos, &chain->dead_or_set); 377352284Sobrien COMPL_HARD_REG_SET (chain->used_spill_regs, used_by_pseudos); 377452284Sobrien AND_HARD_REG_SET (chain->used_spill_regs, used_spill_regs); 377552284Sobrien 377652284Sobrien /* Make sure we only enlarge the set. */ 377752284Sobrien GO_IF_HARD_REG_SUBSET (used_by_pseudos2, chain->used_spill_regs, ok); 3778169689Skan gcc_unreachable (); 377952284Sobrien ok:; 378018334Speter } 378118334Speter } 378218334Speter 378352284Sobrien /* Let alter_reg modify the reg rtx's for the modified pseudos. */ 3784169689Skan for (i = FIRST_PSEUDO_REGISTER; i < (unsigned)max_regno; i++) 378552284Sobrien { 378652284Sobrien int regno = reg_renumber[i]; 378752284Sobrien if (reg_old_renumber[i] == regno) 378852284Sobrien continue; 378990075Sobrien 379052284Sobrien alter_reg (i, reg_old_renumber[i]); 379152284Sobrien reg_old_renumber[i] = regno; 3792169689Skan if (dump_file) 379352284Sobrien { 379452284Sobrien if (regno == -1) 3795169689Skan fprintf (dump_file, " Register %d now on stack.\n\n", i); 379652284Sobrien else 3797169689Skan fprintf (dump_file, " Register %d now in %d.\n\n", 379852284Sobrien i, reg_renumber[i]); 379952284Sobrien } 380052284Sobrien } 380152284Sobrien 380218334Speter return something_changed; 380318334Speter} 380418334Speter 3805169689Skan/* Find all paradoxical subregs within X and update reg_max_ref_width. */ 380618334Speter 380718334Speterstatic void 3808132718Skanscan_paradoxical_subregs (rtx x) 380918334Speter{ 381090075Sobrien int i; 381190075Sobrien const char *fmt; 381290075Sobrien enum rtx_code code = GET_CODE (x); 381318334Speter 381418334Speter switch (code) 381518334Speter { 381618334Speter case REG: 381718334Speter case CONST_INT: 381818334Speter case CONST: 381918334Speter case SYMBOL_REF: 382018334Speter case LABEL_REF: 382118334Speter case CONST_DOUBLE: 382296263Sobrien case CONST_VECTOR: /* shouldn't happen, but just in case. */ 382318334Speter case CC0: 382418334Speter case PC: 382518334Speter case USE: 382618334Speter case CLOBBER: 382718334Speter return; 382818334Speter 382918334Speter case SUBREG: 3830169689Skan if (REG_P (SUBREG_REG (x)) 3831169689Skan && (GET_MODE_SIZE (GET_MODE (x)) 3832169689Skan > reg_max_ref_width[REGNO (SUBREG_REG (x))])) 383318334Speter reg_max_ref_width[REGNO (SUBREG_REG (x))] 383418334Speter = GET_MODE_SIZE (GET_MODE (x)); 383518334Speter return; 383690075Sobrien 383750397Sobrien default: 383850397Sobrien break; 383918334Speter } 384018334Speter 384118334Speter fmt = GET_RTX_FORMAT (code); 384218334Speter for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 384318334Speter { 384418334Speter if (fmt[i] == 'e') 384518334Speter scan_paradoxical_subregs (XEXP (x, i)); 384618334Speter else if (fmt[i] == 'E') 384718334Speter { 384890075Sobrien int j; 384990075Sobrien for (j = XVECLEN (x, i) - 1; j >= 0; j--) 385018334Speter scan_paradoxical_subregs (XVECEXP (x, i, j)); 385118334Speter } 385218334Speter } 385318334Speter} 385418334Speter 3855169689Skan/* A subroutine of reload_as_needed. If INSN has a REG_EH_REGION note, 3856169689Skan examine all of the reload insns between PREV and NEXT exclusive, and 3857169689Skan annotate all that may trap. */ 3858169689Skan 3859169689Skanstatic void 3860169689Skanfixup_eh_region_note (rtx insn, rtx prev, rtx next) 3861169689Skan{ 3862169689Skan rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); 3863169689Skan unsigned int trap_count; 3864169689Skan rtx i; 3865169689Skan 3866169689Skan if (note == NULL) 3867169689Skan return; 3868169689Skan 3869169689Skan if (may_trap_p (PATTERN (insn))) 3870169689Skan trap_count = 1; 3871169689Skan else 3872169689Skan { 3873169689Skan remove_note (insn, note); 3874169689Skan trap_count = 0; 3875169689Skan } 3876169689Skan 3877169689Skan for (i = NEXT_INSN (prev); i != next; i = NEXT_INSN (i)) 3878169689Skan if (INSN_P (i) && i != insn && may_trap_p (PATTERN (i))) 3879169689Skan { 3880169689Skan trap_count++; 3881169689Skan REG_NOTES (i) 3882169689Skan = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0), REG_NOTES (i)); 3883169689Skan } 3884169689Skan} 3885169689Skan 388618334Speter/* Reload pseudo-registers into hard regs around each insn as needed. 388718334Speter Additional register load insns are output before the insn that needs it 388818334Speter and perhaps store insns after insns that modify the reloaded pseudo reg. 388918334Speter 389018334Speter reg_last_reload_reg and reg_reloaded_contents keep track of 389118334Speter which registers are already available in reload registers. 389218334Speter We update these for the reloads that we perform, 389318334Speter as the insns are scanned. */ 389418334Speter 389518334Speterstatic void 3896132718Skanreload_as_needed (int live_known) 389718334Speter{ 389852284Sobrien struct insn_chain *chain; 389990075Sobrien#if defined (AUTO_INC_DEC) 390090075Sobrien int i; 390152284Sobrien#endif 390218334Speter rtx x; 390318334Speter 3904132718Skan memset (spill_reg_rtx, 0, sizeof spill_reg_rtx); 3905132718Skan memset (spill_reg_store, 0, sizeof spill_reg_store); 3906169689Skan reg_last_reload_reg = XCNEWVEC (rtx, max_regno); 3907169689Skan INIT_REG_SET (®_has_output_reload); 390850397Sobrien CLEAR_HARD_REG_SET (reg_reloaded_valid); 3909132718Skan CLEAR_HARD_REG_SET (reg_reloaded_call_part_clobbered); 391018334Speter 391152284Sobrien set_initial_elim_offsets (); 391218334Speter 391352284Sobrien for (chain = reload_insn_chain; chain; chain = chain->next) 391418334Speter { 3915132718Skan rtx prev = 0; 391652284Sobrien rtx insn = chain->insn; 391752284Sobrien rtx old_next = NEXT_INSN (insn); 391818334Speter 391918334Speter /* If we pass a label, copy the offsets from the label information 392018334Speter into the current offsets of each elimination. */ 3921169689Skan if (LABEL_P (insn)) 392252284Sobrien set_offsets_for_label (insn); 392318334Speter 392490075Sobrien else if (INSN_P (insn)) 392518334Speter { 3926169689Skan regset_head regs_to_forget; 3927169689Skan INIT_REG_SET (®s_to_forget); 3928169689Skan note_stores (PATTERN (insn), forget_old_reloads_1, ®s_to_forget); 392918334Speter 393018334Speter /* If this is a USE and CLOBBER of a MEM, ensure that any 393118334Speter references to eliminable registers have been removed. */ 393218334Speter 393318334Speter if ((GET_CODE (PATTERN (insn)) == USE 393418334Speter || GET_CODE (PATTERN (insn)) == CLOBBER) 3935169689Skan && MEM_P (XEXP (PATTERN (insn), 0))) 393618334Speter XEXP (XEXP (PATTERN (insn), 0), 0) 393718334Speter = eliminate_regs (XEXP (XEXP (PATTERN (insn), 0), 0), 393850397Sobrien GET_MODE (XEXP (PATTERN (insn), 0)), 393950397Sobrien NULL_RTX); 394018334Speter 394118334Speter /* If we need to do register elimination processing, do so. 394218334Speter This might delete the insn, in which case we are done. */ 394352284Sobrien if ((num_eliminable || num_eliminable_invariants) && chain->need_elim) 394418334Speter { 394518334Speter eliminate_regs_in_insn (insn, 1); 3946169689Skan if (NOTE_P (insn)) 394718334Speter { 394852284Sobrien update_eliminable_offsets (); 3949169689Skan CLEAR_REG_SET (®s_to_forget); 395018334Speter continue; 395118334Speter } 395218334Speter } 395318334Speter 395452284Sobrien /* If need_elim is nonzero but need_reload is zero, one might think 395552284Sobrien that we could simply set n_reloads to 0. However, find_reloads 395652284Sobrien could have done some manipulation of the insn (such as swapping 395752284Sobrien commutative operands), and these manipulations are lost during 395852284Sobrien the first pass for every insn that needs register elimination. 395952284Sobrien So the actions of find_reloads must be redone here. */ 396052284Sobrien 396152284Sobrien if (! chain->need_elim && ! chain->need_reload 396252284Sobrien && ! chain->need_operand_change) 396318334Speter n_reloads = 0; 396418334Speter /* First find the pseudo regs that must be reloaded for this insn. 396518334Speter This info is returned in the tables reload_... (see reload.h). 396618334Speter Also modify the body of INSN by substituting RELOAD 396718334Speter rtx's for those pseudo regs. */ 396818334Speter else 396918334Speter { 3970169689Skan CLEAR_REG_SET (®_has_output_reload); 397118334Speter CLEAR_HARD_REG_SET (reg_is_output_reload); 397218334Speter 397318334Speter find_reloads (insn, 1, spill_indirect_levels, live_known, 397418334Speter spill_reg_order); 397518334Speter } 397618334Speter 397718334Speter if (n_reloads > 0) 397818334Speter { 397952284Sobrien rtx next = NEXT_INSN (insn); 398018334Speter rtx p; 398118334Speter 398252284Sobrien prev = PREV_INSN (insn); 398318334Speter 398418334Speter /* Now compute which reload regs to reload them into. Perhaps 398518334Speter reusing reload regs from previous insns, or else output 398618334Speter load insns to reload them. Maybe output store insns too. 398718334Speter Record the choices of reload reg in reload_reg_rtx. */ 398852284Sobrien choose_reload_regs (chain); 398918334Speter 399090075Sobrien /* Merge any reloads that we didn't combine for fear of 399118334Speter increasing the number of spill registers needed but now 399218334Speter discover can be safely merged. */ 399350397Sobrien if (SMALL_REGISTER_CLASSES) 399450397Sobrien merge_assigned_reloads (insn); 399518334Speter 399618334Speter /* Generate the insns to reload operands into or out of 399718334Speter their reload regs. */ 399852284Sobrien emit_reload_insns (chain); 399918334Speter 400018334Speter /* Substitute the chosen reload regs from reload_reg_rtx 400118334Speter into the insn's body (or perhaps into the bodies of other 400218334Speter load and store insn that we just made for reloading 400318334Speter and that we moved the structure into). */ 400490075Sobrien subst_reloads (insn); 400518334Speter 4006169689Skan /* Adjust the exception region notes for loads and stores. */ 4007169689Skan if (flag_non_call_exceptions && !CALL_P (insn)) 4008169689Skan fixup_eh_region_note (insn, prev, next); 4009169689Skan 401018334Speter /* If this was an ASM, make sure that all the reload insns 401118334Speter we have generated are valid. If not, give an error 401218334Speter and delete them. */ 401318334Speter if (asm_noperands (PATTERN (insn)) >= 0) 401418334Speter for (p = NEXT_INSN (prev); p != next; p = NEXT_INSN (p)) 401590075Sobrien if (p != insn && INSN_P (p) 4016117395Skan && GET_CODE (PATTERN (p)) != USE 401718334Speter && (recog_memoized (p) < 0 401852284Sobrien || (extract_insn (p), ! constrain_operands (1)))) 401918334Speter { 402018334Speter error_for_asm (insn, 4021169689Skan "%<asm%> operand requires " 4022169689Skan "impossible reload"); 402390075Sobrien delete_insn (p); 402418334Speter } 402518334Speter } 402690075Sobrien 402790075Sobrien if (num_eliminable && chain->need_elim) 402890075Sobrien update_eliminable_offsets (); 402990075Sobrien 403018334Speter /* Any previously reloaded spilled pseudo reg, stored in this insn, 403118334Speter is no longer validly lying around to save a future reload. 403218334Speter Note that this does not detect pseudos that were reloaded 403318334Speter for this insn in order to be stored in 403418334Speter (obeying register constraints). That is correct; such reload 403518334Speter registers ARE still valid. */ 4036169689Skan forget_marked_reloads (®s_to_forget); 4037169689Skan CLEAR_REG_SET (®s_to_forget); 403818334Speter 403918334Speter /* There may have been CLOBBER insns placed after INSN. So scan 404018334Speter between INSN and NEXT and use them to forget old reloads. */ 404152284Sobrien for (x = NEXT_INSN (insn); x != old_next; x = NEXT_INSN (x)) 4042169689Skan if (NONJUMP_INSN_P (x) && GET_CODE (PATTERN (x)) == CLOBBER) 404390075Sobrien note_stores (PATTERN (x), forget_old_reloads_1, NULL); 404418334Speter 404518334Speter#ifdef AUTO_INC_DEC 404618334Speter /* Likewise for regs altered by auto-increment in this insn. 404752284Sobrien REG_INC notes have been changed by reloading: 404852284Sobrien find_reloads_address_1 records substitutions for them, 404952284Sobrien which have been performed by subst_reloads above. */ 405052284Sobrien for (i = n_reloads - 1; i >= 0; i--) 405152284Sobrien { 405290075Sobrien rtx in_reg = rld[i].in_reg; 405352284Sobrien if (in_reg) 405452284Sobrien { 405552284Sobrien enum rtx_code code = GET_CODE (in_reg); 405652284Sobrien /* PRE_INC / PRE_DEC will have the reload register ending up 405752284Sobrien with the same value as the stack slot, but that doesn't 405852284Sobrien hold true for POST_INC / POST_DEC. Either we have to 405952284Sobrien convert the memory access to a true POST_INC / POST_DEC, 406052284Sobrien or we can't use the reload register for inheritance. */ 406152284Sobrien if ((code == POST_INC || code == POST_DEC) 406252284Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, 406390075Sobrien REGNO (rld[i].reg_rtx)) 406452284Sobrien /* Make sure it is the inc/dec pseudo, and not 406552284Sobrien some other (e.g. output operand) pseudo. */ 4066132718Skan && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)] 406752284Sobrien == REGNO (XEXP (in_reg, 0)))) 406890075Sobrien 406952284Sobrien { 407090075Sobrien rtx reload_reg = rld[i].reg_rtx; 407152284Sobrien enum machine_mode mode = GET_MODE (reload_reg); 407252284Sobrien int n = 0; 407352284Sobrien rtx p; 407452284Sobrien 407552284Sobrien for (p = PREV_INSN (old_next); p != prev; p = PREV_INSN (p)) 407652284Sobrien { 407752284Sobrien /* We really want to ignore REG_INC notes here, so 407852284Sobrien use PATTERN (p) as argument to reg_set_p . */ 407952284Sobrien if (reg_set_p (reload_reg, PATTERN (p))) 408052284Sobrien break; 408190075Sobrien n = count_occurrences (PATTERN (p), reload_reg, 0); 408252284Sobrien if (! n) 408352284Sobrien continue; 408452284Sobrien if (n == 1) 408552284Sobrien { 408652284Sobrien n = validate_replace_rtx (reload_reg, 4087169689Skan gen_rtx_fmt_e (code, 4088169689Skan mode, 4089169689Skan reload_reg), 409052284Sobrien p); 409152284Sobrien 409252284Sobrien /* We must also verify that the constraints 409352284Sobrien are met after the replacement. */ 409452284Sobrien extract_insn (p); 409552284Sobrien if (n) 409652284Sobrien n = constrain_operands (1); 409752284Sobrien else 409852284Sobrien break; 409952284Sobrien 410052284Sobrien /* If the constraints were not met, then 410152284Sobrien undo the replacement. */ 410252284Sobrien if (!n) 410352284Sobrien { 4104169689Skan validate_replace_rtx (gen_rtx_fmt_e (code, 4105169689Skan mode, 4106169689Skan reload_reg), 410752284Sobrien reload_reg, p); 410852284Sobrien break; 410952284Sobrien } 411090075Sobrien 411152284Sobrien } 411252284Sobrien break; 411352284Sobrien } 411452284Sobrien if (n == 1) 411552284Sobrien { 411652284Sobrien REG_NOTES (p) 411752284Sobrien = gen_rtx_EXPR_LIST (REG_INC, reload_reg, 411852284Sobrien REG_NOTES (p)); 411952284Sobrien /* Mark this as having an output reload so that the 412052284Sobrien REG_INC processing code below won't invalidate 412152284Sobrien the reload for inheritance. */ 412252284Sobrien SET_HARD_REG_BIT (reg_is_output_reload, 412352284Sobrien REGNO (reload_reg)); 4124169689Skan SET_REGNO_REG_SET (®_has_output_reload, 4125169689Skan REGNO (XEXP (in_reg, 0))); 412652284Sobrien } 412752284Sobrien else 412890075Sobrien forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX, 412990075Sobrien NULL); 413052284Sobrien } 413152284Sobrien else if ((code == PRE_INC || code == PRE_DEC) 413252284Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, 413390075Sobrien REGNO (rld[i].reg_rtx)) 413452284Sobrien /* Make sure it is the inc/dec pseudo, and not 413552284Sobrien some other (e.g. output operand) pseudo. */ 4136132718Skan && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)] 413752284Sobrien == REGNO (XEXP (in_reg, 0)))) 413852284Sobrien { 413952284Sobrien SET_HARD_REG_BIT (reg_is_output_reload, 414090075Sobrien REGNO (rld[i].reg_rtx)); 4141169689Skan SET_REGNO_REG_SET (®_has_output_reload, 4142169689Skan REGNO (XEXP (in_reg, 0))); 414352284Sobrien } 414452284Sobrien } 414552284Sobrien } 414652284Sobrien /* If a pseudo that got a hard register is auto-incremented, 414752284Sobrien we must purge records of copying it into pseudos without 414852284Sobrien hard registers. */ 414918334Speter for (x = REG_NOTES (insn); x; x = XEXP (x, 1)) 415018334Speter if (REG_NOTE_KIND (x) == REG_INC) 415118334Speter { 415218334Speter /* See if this pseudo reg was reloaded in this insn. 415318334Speter If so, its last-reload info is still valid 415418334Speter because it is based on this insn's reload. */ 415518334Speter for (i = 0; i < n_reloads; i++) 415690075Sobrien if (rld[i].out == XEXP (x, 0)) 415718334Speter break; 415818334Speter 415918334Speter if (i == n_reloads) 416090075Sobrien forget_old_reloads_1 (XEXP (x, 0), NULL_RTX, NULL); 416118334Speter } 416218334Speter#endif 416318334Speter } 416418334Speter /* A reload reg's contents are unknown after a label. */ 4165169689Skan if (LABEL_P (insn)) 416650397Sobrien CLEAR_HARD_REG_SET (reg_reloaded_valid); 416718334Speter 416818334Speter /* Don't assume a reload reg is still good after a call insn 4169132718Skan if it is a call-used reg, or if it contains a value that will 4170132718Skan be partially clobbered by the call. */ 4171169689Skan else if (CALL_P (insn)) 4172132718Skan { 417390075Sobrien AND_COMPL_HARD_REG_SET (reg_reloaded_valid, call_used_reg_set); 4174132718Skan AND_COMPL_HARD_REG_SET (reg_reloaded_valid, reg_reloaded_call_part_clobbered); 4175132718Skan } 417690075Sobrien } 417718334Speter 417890075Sobrien /* Clean up. */ 417990075Sobrien free (reg_last_reload_reg); 4180169689Skan CLEAR_REG_SET (®_has_output_reload); 418118334Speter} 418218334Speter 418318334Speter/* Discard all record of any value reloaded from X, 418418334Speter or reloaded in X from someplace else; 418518334Speter unless X is an output reload reg of the current insn. 418618334Speter 418718334Speter X may be a hard reg (the reload reg) 4188169689Skan or it may be a pseudo reg that was reloaded from. 418918334Speter 4190169689Skan When DATA is non-NULL just mark the registers in regset 4191169689Skan to be forgotten later. */ 4192169689Skan 419318334Speterstatic void 4194132718Skanforget_old_reloads_1 (rtx x, rtx ignored ATTRIBUTE_UNUSED, 4195169689Skan void *data) 419618334Speter{ 419790075Sobrien unsigned int regno; 419890075Sobrien unsigned int nr; 4199169689Skan regset regs = (regset) data; 420018334Speter 420190075Sobrien /* note_stores does give us subregs of hard regs, 4202169689Skan subreg_regno_offset requires a hard reg. */ 420318334Speter while (GET_CODE (x) == SUBREG) 420418334Speter { 4205117395Skan /* We ignore the subreg offset when calculating the regno, 4206117395Skan because we are using the entire underlying hard register 4207117395Skan below. */ 420818334Speter x = SUBREG_REG (x); 420918334Speter } 421018334Speter 4211169689Skan if (!REG_P (x)) 421218334Speter return; 421318334Speter 4214117395Skan regno = REGNO (x); 421518334Speter 421618334Speter if (regno >= FIRST_PSEUDO_REGISTER) 421718334Speter nr = 1; 421818334Speter else 421918334Speter { 422090075Sobrien unsigned int i; 422190075Sobrien 4222169689Skan nr = hard_regno_nregs[regno][GET_MODE (x)]; 422318334Speter /* Storing into a spilled-reg invalidates its contents. 422418334Speter This can happen if a block-local pseudo is allocated to that reg 422518334Speter and it wasn't spilled because this block's total need is 0. 422618334Speter Then some insn might have an optional reload and use this reg. */ 4227169689Skan if (!regs) 4228169689Skan for (i = 0; i < nr; i++) 4229169689Skan /* But don't do this if the reg actually serves as an output 4230169689Skan reload reg in the current instruction. */ 4231169689Skan if (n_reloads == 0 4232169689Skan || ! TEST_HARD_REG_BIT (reg_is_output_reload, regno + i)) 4233169689Skan { 4234169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_valid, regno + i); 4235169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered, regno + i); 4236169689Skan spill_reg_store[regno + i] = 0; 4237169689Skan } 4238169689Skan } 4239169689Skan 4240169689Skan if (regs) 4241169689Skan while (nr-- > 0) 4242169689Skan SET_REGNO_REG_SET (regs, regno + nr); 4243169689Skan else 4244169689Skan { 4245169689Skan /* Since value of X has changed, 4246169689Skan forget any value previously copied from it. */ 4247169689Skan 4248169689Skan while (nr-- > 0) 4249169689Skan /* But don't forget a copy if this is the output reload 4250169689Skan that establishes the copy's validity. */ 425150397Sobrien if (n_reloads == 0 4252169689Skan || !REGNO_REG_SET_P (®_has_output_reload, regno + nr)) 4253169689Skan reg_last_reload_reg[regno + nr] = 0; 4254169689Skan } 4255169689Skan} 4256169689Skan 4257169689Skan/* Forget the reloads marked in regset by previous function. */ 4258169689Skanstatic void 4259169689Skanforget_marked_reloads (regset regs) 4260169689Skan{ 4261169689Skan unsigned int reg; 4262169689Skan reg_set_iterator rsi; 4263169689Skan EXECUTE_IF_SET_IN_REG_SET (regs, 0, reg, rsi) 4264169689Skan { 4265169689Skan if (reg < FIRST_PSEUDO_REGISTER 4266169689Skan /* But don't do this if the reg actually serves as an output 4267169689Skan reload reg in the current instruction. */ 4268169689Skan && (n_reloads == 0 4269169689Skan || ! TEST_HARD_REG_BIT (reg_is_output_reload, reg))) 427070635Sobrien { 4271169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_valid, reg); 4272169689Skan CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered, reg); 4273169689Skan spill_reg_store[reg] = 0; 427470635Sobrien } 4275169689Skan if (n_reloads == 0 4276169689Skan || !REGNO_REG_SET_P (®_has_output_reload, reg)) 4277169689Skan reg_last_reload_reg[reg] = 0; 427818334Speter } 427918334Speter} 428018334Speter 428118334Speter/* The following HARD_REG_SETs indicate when each hard register is 428218334Speter used for a reload of various parts of the current insn. */ 428318334Speter 428470635Sobrien/* If reg is unavailable for all reloads. */ 428570635Sobrienstatic HARD_REG_SET reload_reg_unavailable; 428618334Speter/* If reg is in use as a reload reg for a RELOAD_OTHER reload. */ 428718334Speterstatic HARD_REG_SET reload_reg_used; 428818334Speter/* If reg is in use for a RELOAD_FOR_INPUT_ADDRESS reload for operand I. */ 428918334Speterstatic HARD_REG_SET reload_reg_used_in_input_addr[MAX_RECOG_OPERANDS]; 429050397Sobrien/* If reg is in use for a RELOAD_FOR_INPADDR_ADDRESS reload for operand I. */ 429150397Sobrienstatic HARD_REG_SET reload_reg_used_in_inpaddr_addr[MAX_RECOG_OPERANDS]; 429218334Speter/* If reg is in use for a RELOAD_FOR_OUTPUT_ADDRESS reload for operand I. */ 429318334Speterstatic HARD_REG_SET reload_reg_used_in_output_addr[MAX_RECOG_OPERANDS]; 429450397Sobrien/* If reg is in use for a RELOAD_FOR_OUTADDR_ADDRESS reload for operand I. */ 429550397Sobrienstatic HARD_REG_SET reload_reg_used_in_outaddr_addr[MAX_RECOG_OPERANDS]; 429618334Speter/* If reg is in use for a RELOAD_FOR_INPUT reload for operand I. */ 429718334Speterstatic HARD_REG_SET reload_reg_used_in_input[MAX_RECOG_OPERANDS]; 429818334Speter/* If reg is in use for a RELOAD_FOR_OUTPUT reload for operand I. */ 429918334Speterstatic HARD_REG_SET reload_reg_used_in_output[MAX_RECOG_OPERANDS]; 430018334Speter/* If reg is in use for a RELOAD_FOR_OPERAND_ADDRESS reload. */ 430118334Speterstatic HARD_REG_SET reload_reg_used_in_op_addr; 430218334Speter/* If reg is in use for a RELOAD_FOR_OPADDR_ADDR reload. */ 430318334Speterstatic HARD_REG_SET reload_reg_used_in_op_addr_reload; 430418334Speter/* If reg is in use for a RELOAD_FOR_INSN reload. */ 430518334Speterstatic HARD_REG_SET reload_reg_used_in_insn; 430618334Speter/* If reg is in use for a RELOAD_FOR_OTHER_ADDRESS reload. */ 430718334Speterstatic HARD_REG_SET reload_reg_used_in_other_addr; 430818334Speter 430918334Speter/* If reg is in use as a reload reg for any sort of reload. */ 431018334Speterstatic HARD_REG_SET reload_reg_used_at_all; 431118334Speter 431218334Speter/* If reg is use as an inherited reload. We just mark the first register 431318334Speter in the group. */ 431418334Speterstatic HARD_REG_SET reload_reg_used_for_inherit; 431518334Speter 431652284Sobrien/* Records which hard regs are used in any way, either as explicit use or 431752284Sobrien by being allocated to a pseudo during any point of the current insn. */ 431852284Sobrienstatic HARD_REG_SET reg_used_in_insn; 431952284Sobrien 432018334Speter/* Mark reg REGNO as in use for a reload of the sort spec'd by OPNUM and 432118334Speter TYPE. MODE is used to indicate how many consecutive regs are 432218334Speter actually used. */ 432318334Speter 432418334Speterstatic void 4325132718Skanmark_reload_reg_in_use (unsigned int regno, int opnum, enum reload_type type, 4326132718Skan enum machine_mode mode) 432718334Speter{ 4328169689Skan unsigned int nregs = hard_regno_nregs[regno][mode]; 432990075Sobrien unsigned int i; 433018334Speter 433118334Speter for (i = regno; i < nregs + regno; i++) 433218334Speter { 433318334Speter switch (type) 433418334Speter { 433518334Speter case RELOAD_OTHER: 433618334Speter SET_HARD_REG_BIT (reload_reg_used, i); 433718334Speter break; 433818334Speter 433918334Speter case RELOAD_FOR_INPUT_ADDRESS: 434018334Speter SET_HARD_REG_BIT (reload_reg_used_in_input_addr[opnum], i); 434118334Speter break; 434218334Speter 434350397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 434450397Sobrien SET_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], i); 434550397Sobrien break; 434650397Sobrien 434718334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 434818334Speter SET_HARD_REG_BIT (reload_reg_used_in_output_addr[opnum], i); 434918334Speter break; 435018334Speter 435150397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 435250397Sobrien SET_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[opnum], i); 435350397Sobrien break; 435450397Sobrien 435518334Speter case RELOAD_FOR_OPERAND_ADDRESS: 435618334Speter SET_HARD_REG_BIT (reload_reg_used_in_op_addr, i); 435718334Speter break; 435818334Speter 435918334Speter case RELOAD_FOR_OPADDR_ADDR: 436018334Speter SET_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, i); 436118334Speter break; 436218334Speter 436318334Speter case RELOAD_FOR_OTHER_ADDRESS: 436418334Speter SET_HARD_REG_BIT (reload_reg_used_in_other_addr, i); 436518334Speter break; 436618334Speter 436718334Speter case RELOAD_FOR_INPUT: 436818334Speter SET_HARD_REG_BIT (reload_reg_used_in_input[opnum], i); 436918334Speter break; 437018334Speter 437118334Speter case RELOAD_FOR_OUTPUT: 437218334Speter SET_HARD_REG_BIT (reload_reg_used_in_output[opnum], i); 437318334Speter break; 437418334Speter 437518334Speter case RELOAD_FOR_INSN: 437618334Speter SET_HARD_REG_BIT (reload_reg_used_in_insn, i); 437718334Speter break; 437818334Speter } 437918334Speter 438018334Speter SET_HARD_REG_BIT (reload_reg_used_at_all, i); 438118334Speter } 438218334Speter} 438318334Speter 438418334Speter/* Similarly, but show REGNO is no longer in use for a reload. */ 438518334Speter 438618334Speterstatic void 4387132718Skanclear_reload_reg_in_use (unsigned int regno, int opnum, 4388132718Skan enum reload_type type, enum machine_mode mode) 438918334Speter{ 4390169689Skan unsigned int nregs = hard_regno_nregs[regno][mode]; 439190075Sobrien unsigned int start_regno, end_regno, r; 439218334Speter int i; 439352284Sobrien /* A complication is that for some reload types, inheritance might 439452284Sobrien allow multiple reloads of the same types to share a reload register. 439552284Sobrien We set check_opnum if we have to check only reloads with the same 439652284Sobrien operand number, and check_any if we have to check all reloads. */ 439752284Sobrien int check_opnum = 0; 439852284Sobrien int check_any = 0; 439952284Sobrien HARD_REG_SET *used_in_set; 440018334Speter 440152284Sobrien switch (type) 440218334Speter { 440352284Sobrien case RELOAD_OTHER: 440452284Sobrien used_in_set = &reload_reg_used; 440552284Sobrien break; 440618334Speter 440752284Sobrien case RELOAD_FOR_INPUT_ADDRESS: 440852284Sobrien used_in_set = &reload_reg_used_in_input_addr[opnum]; 440952284Sobrien break; 441018334Speter 441152284Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 441252284Sobrien check_opnum = 1; 441352284Sobrien used_in_set = &reload_reg_used_in_inpaddr_addr[opnum]; 441452284Sobrien break; 441550397Sobrien 441652284Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 441752284Sobrien used_in_set = &reload_reg_used_in_output_addr[opnum]; 441852284Sobrien break; 441918334Speter 442052284Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 442152284Sobrien check_opnum = 1; 442252284Sobrien used_in_set = &reload_reg_used_in_outaddr_addr[opnum]; 442352284Sobrien break; 442450397Sobrien 442552284Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 442652284Sobrien used_in_set = &reload_reg_used_in_op_addr; 442752284Sobrien break; 442818334Speter 442952284Sobrien case RELOAD_FOR_OPADDR_ADDR: 443052284Sobrien check_any = 1; 443152284Sobrien used_in_set = &reload_reg_used_in_op_addr_reload; 443252284Sobrien break; 443318334Speter 443452284Sobrien case RELOAD_FOR_OTHER_ADDRESS: 443552284Sobrien used_in_set = &reload_reg_used_in_other_addr; 443652284Sobrien check_any = 1; 443752284Sobrien break; 443818334Speter 443952284Sobrien case RELOAD_FOR_INPUT: 444052284Sobrien used_in_set = &reload_reg_used_in_input[opnum]; 444152284Sobrien break; 444218334Speter 444352284Sobrien case RELOAD_FOR_OUTPUT: 444452284Sobrien used_in_set = &reload_reg_used_in_output[opnum]; 444552284Sobrien break; 444618334Speter 444752284Sobrien case RELOAD_FOR_INSN: 444852284Sobrien used_in_set = &reload_reg_used_in_insn; 444952284Sobrien break; 445052284Sobrien default: 4451169689Skan gcc_unreachable (); 445252284Sobrien } 445352284Sobrien /* We resolve conflicts with remaining reloads of the same type by 4454117395Skan excluding the intervals of reload registers by them from the 445552284Sobrien interval of freed reload registers. Since we only keep track of 445652284Sobrien one set of interval bounds, we might have to exclude somewhat 445790075Sobrien more than what would be necessary if we used a HARD_REG_SET here. 445852284Sobrien But this should only happen very infrequently, so there should 445952284Sobrien be no reason to worry about it. */ 446090075Sobrien 446152284Sobrien start_regno = regno; 446252284Sobrien end_regno = regno + nregs; 446352284Sobrien if (check_opnum || check_any) 446452284Sobrien { 446552284Sobrien for (i = n_reloads - 1; i >= 0; i--) 446652284Sobrien { 446790075Sobrien if (rld[i].when_needed == type 446890075Sobrien && (check_any || rld[i].opnum == opnum) 446990075Sobrien && rld[i].reg_rtx) 447052284Sobrien { 447190075Sobrien unsigned int conflict_start = true_regnum (rld[i].reg_rtx); 447290075Sobrien unsigned int conflict_end 447352284Sobrien = (conflict_start 4474169689Skan + hard_regno_nregs[conflict_start][rld[i].mode]); 447552284Sobrien 447652284Sobrien /* If there is an overlap with the first to-be-freed register, 447752284Sobrien adjust the interval start. */ 447852284Sobrien if (conflict_start <= start_regno && conflict_end > start_regno) 447952284Sobrien start_regno = conflict_end; 448052284Sobrien /* Otherwise, if there is a conflict with one of the other 448152284Sobrien to-be-freed registers, adjust the interval end. */ 448252284Sobrien if (conflict_start > start_regno && conflict_start < end_regno) 448352284Sobrien end_regno = conflict_start; 448452284Sobrien } 448518334Speter } 448618334Speter } 448790075Sobrien 448890075Sobrien for (r = start_regno; r < end_regno; r++) 448990075Sobrien CLEAR_HARD_REG_BIT (*used_in_set, r); 449018334Speter} 449118334Speter 449218334Speter/* 1 if reg REGNO is free as a reload reg for a reload of the sort 449318334Speter specified by OPNUM and TYPE. */ 449418334Speter 449518334Speterstatic int 4496132718Skanreload_reg_free_p (unsigned int regno, int opnum, enum reload_type type) 449718334Speter{ 449818334Speter int i; 449918334Speter 450090075Sobrien /* In use for a RELOAD_OTHER means it's not available for anything. */ 450170635Sobrien if (TEST_HARD_REG_BIT (reload_reg_used, regno) 450270635Sobrien || TEST_HARD_REG_BIT (reload_reg_unavailable, regno)) 450318334Speter return 0; 450418334Speter 450518334Speter switch (type) 450618334Speter { 450718334Speter case RELOAD_OTHER: 450850397Sobrien /* In use for anything means we can't use it for RELOAD_OTHER. */ 450950397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno) 451018334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 4511132718Skan || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno) 451218334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)) 451318334Speter return 0; 451418334Speter 451518334Speter for (i = 0; i < reload_n_operands; i++) 451618334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 451750397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno) 451818334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 451950397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 452018334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno) 452118334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 452218334Speter return 0; 452318334Speter 452418334Speter return 1; 452518334Speter 452618334Speter case RELOAD_FOR_INPUT: 452718334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 452818334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)) 452918334Speter return 0; 453018334Speter 453118334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)) 453218334Speter return 0; 453318334Speter 453418334Speter /* If it is used for some other input, can't use it. */ 453518334Speter for (i = 0; i < reload_n_operands; i++) 453618334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 453718334Speter return 0; 453818334Speter 453918334Speter /* If it is used in a later operand's address, can't use it. */ 454018334Speter for (i = opnum + 1; i < reload_n_operands; i++) 454150397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 454250397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)) 454318334Speter return 0; 454418334Speter 454518334Speter return 1; 454618334Speter 454718334Speter case RELOAD_FOR_INPUT_ADDRESS: 454818334Speter /* Can't use a register if it is used for an input address for this 454918334Speter operand or used as an input in an earlier one. */ 455050397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[opnum], regno) 455150397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], regno)) 455218334Speter return 0; 455318334Speter 455418334Speter for (i = 0; i < opnum; i++) 455518334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 455618334Speter return 0; 455718334Speter 455818334Speter return 1; 455918334Speter 456050397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 456150397Sobrien /* Can't use a register if it is used for an input address 456290075Sobrien for this operand or used as an input in an earlier 456390075Sobrien one. */ 456450397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], regno)) 456550397Sobrien return 0; 456650397Sobrien 456750397Sobrien for (i = 0; i < opnum; i++) 456850397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 456950397Sobrien return 0; 457050397Sobrien 457150397Sobrien return 1; 457250397Sobrien 457318334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 457418334Speter /* Can't use a register if it is used for an output address for this 457590075Sobrien operand or used as an output in this or a later operand. Note 457690075Sobrien that multiple output operands are emitted in reverse order, so 457790075Sobrien the conflicting ones are those with lower indices. */ 457818334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[opnum], regno)) 457918334Speter return 0; 458018334Speter 458190075Sobrien for (i = 0; i <= opnum; i++) 458218334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 458318334Speter return 0; 458418334Speter 458518334Speter return 1; 458618334Speter 458750397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 458850397Sobrien /* Can't use a register if it is used for an output address 458990075Sobrien for this operand or used as an output in this or a 459090075Sobrien later operand. Note that multiple output operands are 459190075Sobrien emitted in reverse order, so the conflicting ones are 459290075Sobrien those with lower indices. */ 459350397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[opnum], regno)) 459450397Sobrien return 0; 459550397Sobrien 459690075Sobrien for (i = 0; i <= opnum; i++) 459750397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 459850397Sobrien return 0; 459950397Sobrien 460050397Sobrien return 1; 460150397Sobrien 460218334Speter case RELOAD_FOR_OPERAND_ADDRESS: 460318334Speter for (i = 0; i < reload_n_operands; i++) 460418334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 460518334Speter return 0; 460618334Speter 460718334Speter return (! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 460818334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)); 460918334Speter 461018334Speter case RELOAD_FOR_OPADDR_ADDR: 461118334Speter for (i = 0; i < reload_n_operands; i++) 461290075Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 461390075Sobrien return 0; 461418334Speter 461518334Speter return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)); 461618334Speter 461718334Speter case RELOAD_FOR_OUTPUT: 461818334Speter /* This cannot share a register with RELOAD_FOR_INSN reloads, other 461990075Sobrien outputs, or an operand address for this or an earlier output. 462090075Sobrien Note that multiple output operands are emitted in reverse order, 462190075Sobrien so the conflicting ones are those with higher indices. */ 462218334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)) 462318334Speter return 0; 462418334Speter 462518334Speter for (i = 0; i < reload_n_operands; i++) 462618334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 462718334Speter return 0; 462818334Speter 462990075Sobrien for (i = opnum; i < reload_n_operands; i++) 463050397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 463150397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)) 463218334Speter return 0; 463318334Speter 463418334Speter return 1; 463518334Speter 463618334Speter case RELOAD_FOR_INSN: 463718334Speter for (i = 0; i < reload_n_operands; i++) 463818334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno) 463918334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 464018334Speter return 0; 464118334Speter 464218334Speter return (! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 464318334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)); 464418334Speter 464518334Speter case RELOAD_FOR_OTHER_ADDRESS: 464618334Speter return ! TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno); 4647169689Skan 4648169689Skan default: 4649169689Skan gcc_unreachable (); 465018334Speter } 465118334Speter} 465218334Speter 465318334Speter/* Return 1 if the value in reload reg REGNO, as used by a reload 465418334Speter needed for the part of the insn specified by OPNUM and TYPE, 465518334Speter is still available in REGNO at the end of the insn. 465618334Speter 465718334Speter We can assume that the reload reg was already tested for availability 465818334Speter at the time it is needed, and we should not check this again, 465918334Speter in case the reg has already been marked in use. */ 466018334Speter 466118334Speterstatic int 4662132718Skanreload_reg_reaches_end_p (unsigned int regno, int opnum, enum reload_type type) 466318334Speter{ 466418334Speter int i; 466518334Speter 466618334Speter switch (type) 466718334Speter { 466818334Speter case RELOAD_OTHER: 466918334Speter /* Since a RELOAD_OTHER reload claims the reg for the entire insn, 467018334Speter its value must reach the end. */ 467118334Speter return 1; 467218334Speter 467318334Speter /* If this use is for part of the insn, 467490075Sobrien its value reaches if no subsequent part uses the same register. 467518334Speter Just like the above function, don't try to do this with lots 467618334Speter of fallthroughs. */ 467718334Speter 467818334Speter case RELOAD_FOR_OTHER_ADDRESS: 467918334Speter /* Here we check for everything else, since these don't conflict 468018334Speter with anything else and everything comes later. */ 468118334Speter 468218334Speter for (i = 0; i < reload_n_operands; i++) 468318334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 468450397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 468518334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno) 468618334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 468750397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno) 468818334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 468918334Speter return 0; 469018334Speter 469118334Speter return (! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 4692132718Skan && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno) 469318334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 469418334Speter && ! TEST_HARD_REG_BIT (reload_reg_used, regno)); 469518334Speter 469618334Speter case RELOAD_FOR_INPUT_ADDRESS: 469750397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 469818334Speter /* Similar, except that we check only for this and subsequent inputs 469918334Speter and the address of only subsequent inputs and we do not need 470018334Speter to check for RELOAD_OTHER objects since they are known not to 470118334Speter conflict. */ 470218334Speter 470318334Speter for (i = opnum; i < reload_n_operands; i++) 470418334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 470518334Speter return 0; 470618334Speter 470718334Speter for (i = opnum + 1; i < reload_n_operands; i++) 470850397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 470950397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)) 471018334Speter return 0; 471118334Speter 471218334Speter for (i = 0; i < reload_n_operands; i++) 471318334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 471450397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 471518334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 471618334Speter return 0; 471718334Speter 471818334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)) 471918334Speter return 0; 472018334Speter 472190075Sobrien return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 472290075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 472390075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used, regno)); 472418334Speter 472518334Speter case RELOAD_FOR_INPUT: 472618334Speter /* Similar to input address, except we start at the next operand for 472790075Sobrien both input and input address and we do not check for 472818334Speter RELOAD_FOR_OPERAND_ADDRESS and RELOAD_FOR_INSN since these 472918334Speter would conflict. */ 473018334Speter 473118334Speter for (i = opnum + 1; i < reload_n_operands; i++) 473218334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno) 473350397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno) 473418334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)) 473518334Speter return 0; 473618334Speter 473750397Sobrien /* ... fall through ... */ 473818334Speter 473918334Speter case RELOAD_FOR_OPERAND_ADDRESS: 474018334Speter /* Check outputs and their addresses. */ 474118334Speter 474218334Speter for (i = 0; i < reload_n_operands; i++) 474318334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 474450397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 474518334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 474618334Speter return 0; 474718334Speter 474890075Sobrien return (!TEST_HARD_REG_BIT (reload_reg_used, regno)); 474918334Speter 475018334Speter case RELOAD_FOR_OPADDR_ADDR: 475118334Speter for (i = 0; i < reload_n_operands; i++) 475218334Speter if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 475350397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno) 475418334Speter || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)) 475518334Speter return 0; 475618334Speter 475790075Sobrien return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno) 475890075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) 475990075Sobrien && !TEST_HARD_REG_BIT (reload_reg_used, regno)); 476018334Speter 476118334Speter case RELOAD_FOR_INSN: 476218334Speter /* These conflict with other outputs with RELOAD_OTHER. So 476318334Speter we need only check for output addresses. */ 476418334Speter 476590075Sobrien opnum = reload_n_operands; 476618334Speter 476750397Sobrien /* ... fall through ... */ 476818334Speter 476918334Speter case RELOAD_FOR_OUTPUT: 477018334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 477150397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 477218334Speter /* We already know these can't conflict with a later output. So the 477390075Sobrien only thing to check are later output addresses. 477490075Sobrien Note that multiple output operands are emitted in reverse order, 477590075Sobrien so the conflicting ones are those with lower indices. */ 477690075Sobrien for (i = 0; i < opnum; i++) 477750397Sobrien if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno) 477850397Sobrien || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)) 477918334Speter return 0; 478018334Speter 478118334Speter return 1; 4782169689Skan 4783169689Skan default: 4784169689Skan gcc_unreachable (); 478518334Speter } 478618334Speter} 478718334Speter 478818334Speter/* Return 1 if the reloads denoted by R1 and R2 cannot share a register. 478918334Speter Return 0 otherwise. 479018334Speter 479118334Speter This function uses the same algorithm as reload_reg_free_p above. */ 479218334Speter 4793169689Skanstatic int 4794132718Skanreloads_conflict (int r1, int r2) 479518334Speter{ 479690075Sobrien enum reload_type r1_type = rld[r1].when_needed; 479790075Sobrien enum reload_type r2_type = rld[r2].when_needed; 479890075Sobrien int r1_opnum = rld[r1].opnum; 479990075Sobrien int r2_opnum = rld[r2].opnum; 480018334Speter 480150397Sobrien /* RELOAD_OTHER conflicts with everything. */ 480250397Sobrien if (r2_type == RELOAD_OTHER) 480318334Speter return 1; 480418334Speter 480518334Speter /* Otherwise, check conflicts differently for each type. */ 480618334Speter 480718334Speter switch (r1_type) 480818334Speter { 480918334Speter case RELOAD_FOR_INPUT: 481090075Sobrien return (r2_type == RELOAD_FOR_INSN 481118334Speter || r2_type == RELOAD_FOR_OPERAND_ADDRESS 481218334Speter || r2_type == RELOAD_FOR_OPADDR_ADDR 481318334Speter || r2_type == RELOAD_FOR_INPUT 481450397Sobrien || ((r2_type == RELOAD_FOR_INPUT_ADDRESS 481550397Sobrien || r2_type == RELOAD_FOR_INPADDR_ADDRESS) 481650397Sobrien && r2_opnum > r1_opnum)); 481718334Speter 481818334Speter case RELOAD_FOR_INPUT_ADDRESS: 481918334Speter return ((r2_type == RELOAD_FOR_INPUT_ADDRESS && r1_opnum == r2_opnum) 482018334Speter || (r2_type == RELOAD_FOR_INPUT && r2_opnum < r1_opnum)); 482118334Speter 482250397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 482350397Sobrien return ((r2_type == RELOAD_FOR_INPADDR_ADDRESS && r1_opnum == r2_opnum) 482450397Sobrien || (r2_type == RELOAD_FOR_INPUT && r2_opnum < r1_opnum)); 482550397Sobrien 482618334Speter case RELOAD_FOR_OUTPUT_ADDRESS: 482718334Speter return ((r2_type == RELOAD_FOR_OUTPUT_ADDRESS && r2_opnum == r1_opnum) 482890075Sobrien || (r2_type == RELOAD_FOR_OUTPUT && r2_opnum <= r1_opnum)); 482918334Speter 483050397Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 483150397Sobrien return ((r2_type == RELOAD_FOR_OUTADDR_ADDRESS && r2_opnum == r1_opnum) 483290075Sobrien || (r2_type == RELOAD_FOR_OUTPUT && r2_opnum <= r1_opnum)); 483350397Sobrien 483418334Speter case RELOAD_FOR_OPERAND_ADDRESS: 483518334Speter return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_INSN 483618334Speter || r2_type == RELOAD_FOR_OPERAND_ADDRESS); 483718334Speter 483818334Speter case RELOAD_FOR_OPADDR_ADDR: 483990075Sobrien return (r2_type == RELOAD_FOR_INPUT 484018334Speter || r2_type == RELOAD_FOR_OPADDR_ADDR); 484118334Speter 484218334Speter case RELOAD_FOR_OUTPUT: 484318334Speter return (r2_type == RELOAD_FOR_INSN || r2_type == RELOAD_FOR_OUTPUT 484450397Sobrien || ((r2_type == RELOAD_FOR_OUTPUT_ADDRESS 484550397Sobrien || r2_type == RELOAD_FOR_OUTADDR_ADDRESS) 484690075Sobrien && r2_opnum >= r1_opnum)); 484718334Speter 484818334Speter case RELOAD_FOR_INSN: 484918334Speter return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_OUTPUT 485018334Speter || r2_type == RELOAD_FOR_INSN 485118334Speter || r2_type == RELOAD_FOR_OPERAND_ADDRESS); 485218334Speter 485318334Speter case RELOAD_FOR_OTHER_ADDRESS: 485418334Speter return r2_type == RELOAD_FOR_OTHER_ADDRESS; 485518334Speter 485618334Speter case RELOAD_OTHER: 485750397Sobrien return 1; 485818334Speter 485918334Speter default: 4860169689Skan gcc_unreachable (); 486118334Speter } 486218334Speter} 486318334Speter 486418334Speter/* Indexed by reload number, 1 if incoming value 486518334Speter inherited from previous insns. */ 4866169689Skanstatic char reload_inherited[MAX_RELOADS]; 486718334Speter 486818334Speter/* For an inherited reload, this is the insn the reload was inherited from, 486918334Speter if we know it. Otherwise, this is 0. */ 4870169689Skanstatic rtx reload_inheritance_insn[MAX_RELOADS]; 487118334Speter 4872117395Skan/* If nonzero, this is a place to get the value of the reload, 487318334Speter rather than using reload_in. */ 4874169689Skanstatic rtx reload_override_in[MAX_RELOADS]; 487518334Speter 487650397Sobrien/* For each reload, the hard register number of the register used, 487750397Sobrien or -1 if we did not need a register for this reload. */ 4878169689Skanstatic int reload_spill_index[MAX_RELOADS]; 487918334Speter 488090075Sobrien/* Subroutine of free_for_value_p, used to check a single register. 488190075Sobrien START_REGNO is the starting regno of the full reload register 488290075Sobrien (possibly comprising multiple hard registers) that we are considering. */ 488350397Sobrien 488450397Sobrienstatic int 4885132718Skanreload_reg_free_for_value_p (int start_regno, int regno, int opnum, 4886132718Skan enum reload_type type, rtx value, rtx out, 4887132718Skan int reloadnum, int ignore_address_reloads) 488850397Sobrien{ 488950397Sobrien int time1; 489070635Sobrien /* Set if we see an input reload that must not share its reload register 489170635Sobrien with any new earlyclobber, but might otherwise share the reload 489270635Sobrien register with an output or input-output reload. */ 489370635Sobrien int check_earlyclobber = 0; 489450397Sobrien int i; 489552284Sobrien int copy = 0; 489650397Sobrien 489770635Sobrien if (TEST_HARD_REG_BIT (reload_reg_unavailable, regno)) 489857844Sobrien return 0; 489957844Sobrien 490052284Sobrien if (out == const0_rtx) 490152284Sobrien { 490252284Sobrien copy = 1; 490352284Sobrien out = NULL_RTX; 490452284Sobrien } 490552284Sobrien 490650397Sobrien /* We use some pseudo 'time' value to check if the lifetimes of the 490750397Sobrien new register use would overlap with the one of a previous reload 490850397Sobrien that is not read-only or uses a different value. 490950397Sobrien The 'time' used doesn't have to be linear in any shape or form, just 491050397Sobrien monotonic. 491150397Sobrien Some reload types use different 'buckets' for each operand. 491250397Sobrien So there are MAX_RECOG_OPERANDS different time values for each 491350397Sobrien such reload type. 491450397Sobrien We compute TIME1 as the time when the register for the prospective 491550397Sobrien new reload ceases to be live, and TIME2 for each existing 491650397Sobrien reload as the time when that the reload register of that reload 491750397Sobrien becomes live. 491850397Sobrien Where there is little to be gained by exact lifetime calculations, 491950397Sobrien we just make conservative assumptions, i.e. a longer lifetime; 492050397Sobrien this is done in the 'default:' cases. */ 492150397Sobrien switch (type) 492250397Sobrien { 492350397Sobrien case RELOAD_FOR_OTHER_ADDRESS: 492470635Sobrien /* RELOAD_FOR_OTHER_ADDRESS conflicts with RELOAD_OTHER reloads. */ 492570635Sobrien time1 = copy ? 0 : 1; 492650397Sobrien break; 492752284Sobrien case RELOAD_OTHER: 492852284Sobrien time1 = copy ? 1 : MAX_RECOG_OPERANDS * 5 + 5; 492952284Sobrien break; 493090075Sobrien /* For each input, we may have a sequence of RELOAD_FOR_INPADDR_ADDRESS, 493190075Sobrien RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT. By adding 0 / 1 / 2 , 493290075Sobrien respectively, to the time values for these, we get distinct time 493390075Sobrien values. To get distinct time values for each operand, we have to 493490075Sobrien multiply opnum by at least three. We round that up to four because 493590075Sobrien multiply by four is often cheaper. */ 493650397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 493752284Sobrien time1 = opnum * 4 + 2; 493850397Sobrien break; 493950397Sobrien case RELOAD_FOR_INPUT_ADDRESS: 494052284Sobrien time1 = opnum * 4 + 3; 494150397Sobrien break; 494250397Sobrien case RELOAD_FOR_INPUT: 494352284Sobrien /* All RELOAD_FOR_INPUT reloads remain live till the instruction 494452284Sobrien executes (inclusive). */ 494552284Sobrien time1 = copy ? opnum * 4 + 4 : MAX_RECOG_OPERANDS * 4 + 3; 494650397Sobrien break; 494752284Sobrien case RELOAD_FOR_OPADDR_ADDR: 494890075Sobrien /* opnum * 4 + 4 494990075Sobrien <= (MAX_RECOG_OPERANDS - 1) * 4 + 4 == MAX_RECOG_OPERANDS * 4 */ 495052284Sobrien time1 = MAX_RECOG_OPERANDS * 4 + 1; 495152284Sobrien break; 495252284Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 495352284Sobrien /* RELOAD_FOR_OPERAND_ADDRESS reloads are live even while the insn 495452284Sobrien is executed. */ 495552284Sobrien time1 = copy ? MAX_RECOG_OPERANDS * 4 + 2 : MAX_RECOG_OPERANDS * 4 + 3; 495652284Sobrien break; 495752284Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 495852284Sobrien time1 = MAX_RECOG_OPERANDS * 4 + 4 + opnum; 495952284Sobrien break; 496050397Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 496152284Sobrien time1 = MAX_RECOG_OPERANDS * 4 + 5 + opnum; 496250397Sobrien break; 496350397Sobrien default: 496452284Sobrien time1 = MAX_RECOG_OPERANDS * 5 + 5; 496550397Sobrien } 496650397Sobrien 496750397Sobrien for (i = 0; i < n_reloads; i++) 496850397Sobrien { 496990075Sobrien rtx reg = rld[i].reg_rtx; 4970169689Skan if (reg && REG_P (reg) 497150397Sobrien && ((unsigned) regno - true_regnum (reg) 4972169689Skan <= hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] - (unsigned) 1) 497350397Sobrien && i != reloadnum) 497450397Sobrien { 497590075Sobrien rtx other_input = rld[i].in; 497690075Sobrien 497790075Sobrien /* If the other reload loads the same input value, that 497890075Sobrien will not cause a conflict only if it's loading it into 497990075Sobrien the same register. */ 498090075Sobrien if (true_regnum (reg) != start_regno) 498190075Sobrien other_input = NULL_RTX; 498290075Sobrien if (! other_input || ! rtx_equal_p (other_input, value) 498390075Sobrien || rld[i].out || out) 498450397Sobrien { 498550397Sobrien int time2; 498690075Sobrien switch (rld[i].when_needed) 498750397Sobrien { 498850397Sobrien case RELOAD_FOR_OTHER_ADDRESS: 498950397Sobrien time2 = 0; 499050397Sobrien break; 499150397Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 499252284Sobrien /* find_reloads makes sure that a 499352284Sobrien RELOAD_FOR_{INP,OP,OUT}ADDR_ADDRESS reload is only used 499452284Sobrien by at most one - the first - 499552284Sobrien RELOAD_FOR_{INPUT,OPERAND,OUTPUT}_ADDRESS . If the 499652284Sobrien address reload is inherited, the address address reload 499752284Sobrien goes away, so we can ignore this conflict. */ 499852284Sobrien if (type == RELOAD_FOR_INPUT_ADDRESS && reloadnum == i + 1 499952284Sobrien && ignore_address_reloads 500052284Sobrien /* Unless the RELOAD_FOR_INPUT is an auto_inc expression. 500152284Sobrien Then the address address is still needed to store 500252284Sobrien back the new address. */ 500390075Sobrien && ! rld[reloadnum].out) 500452284Sobrien continue; 500552284Sobrien /* Likewise, if a RELOAD_FOR_INPUT can inherit a value, its 500652284Sobrien RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS 500752284Sobrien reloads go away. */ 500890075Sobrien if (type == RELOAD_FOR_INPUT && opnum == rld[i].opnum 500952284Sobrien && ignore_address_reloads 501052284Sobrien /* Unless we are reloading an auto_inc expression. */ 501190075Sobrien && ! rld[reloadnum].out) 501252284Sobrien continue; 501390075Sobrien time2 = rld[i].opnum * 4 + 2; 501450397Sobrien break; 501550397Sobrien case RELOAD_FOR_INPUT_ADDRESS: 501690075Sobrien if (type == RELOAD_FOR_INPUT && opnum == rld[i].opnum 501752284Sobrien && ignore_address_reloads 501890075Sobrien && ! rld[reloadnum].out) 501952284Sobrien continue; 502090075Sobrien time2 = rld[i].opnum * 4 + 3; 502150397Sobrien break; 502250397Sobrien case RELOAD_FOR_INPUT: 502390075Sobrien time2 = rld[i].opnum * 4 + 4; 502470635Sobrien check_earlyclobber = 1; 502550397Sobrien break; 502690075Sobrien /* rld[i].opnum * 4 + 4 <= (MAX_RECOG_OPERAND - 1) * 4 + 4 502790075Sobrien == MAX_RECOG_OPERAND * 4 */ 502852284Sobrien case RELOAD_FOR_OPADDR_ADDR: 502952284Sobrien if (type == RELOAD_FOR_OPERAND_ADDRESS && reloadnum == i + 1 503052284Sobrien && ignore_address_reloads 503190075Sobrien && ! rld[reloadnum].out) 503252284Sobrien continue; 503352284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 1; 503452284Sobrien break; 503552284Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 503652284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 2; 503770635Sobrien check_earlyclobber = 1; 503852284Sobrien break; 503952284Sobrien case RELOAD_FOR_INSN: 504052284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 3; 504152284Sobrien break; 504250397Sobrien case RELOAD_FOR_OUTPUT: 504390075Sobrien /* All RELOAD_FOR_OUTPUT reloads become live just after the 504490075Sobrien instruction is executed. */ 504552284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 4; 504650397Sobrien break; 504790075Sobrien /* The first RELOAD_FOR_OUTADDR_ADDRESS reload conflicts with 504890075Sobrien the RELOAD_FOR_OUTPUT reloads, so assign it the same time 504990075Sobrien value. */ 505052284Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 505152284Sobrien if (type == RELOAD_FOR_OUTPUT_ADDRESS && reloadnum == i + 1 505252284Sobrien && ignore_address_reloads 505390075Sobrien && ! rld[reloadnum].out) 505452284Sobrien continue; 505590075Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 4 + rld[i].opnum; 505652284Sobrien break; 505750397Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 505890075Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 5 + rld[i].opnum; 505950397Sobrien break; 506050397Sobrien case RELOAD_OTHER: 506152284Sobrien /* If there is no conflict in the input part, handle this 506252284Sobrien like an output reload. */ 506390075Sobrien if (! rld[i].in || rtx_equal_p (other_input, value)) 506450397Sobrien { 506552284Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 4; 506670635Sobrien /* Earlyclobbered outputs must conflict with inputs. */ 506790075Sobrien if (earlyclobber_operand_p (rld[i].out)) 506870635Sobrien time2 = MAX_RECOG_OPERANDS * 4 + 3; 506990075Sobrien 507050397Sobrien break; 507150397Sobrien } 507252284Sobrien time2 = 1; 507352284Sobrien /* RELOAD_OTHER might be live beyond instruction execution, 507452284Sobrien but this is not obvious when we set time2 = 1. So check 507552284Sobrien here if there might be a problem with the new reload 507652284Sobrien clobbering the register used by the RELOAD_OTHER. */ 507752284Sobrien if (out) 507852284Sobrien return 0; 507952284Sobrien break; 508050397Sobrien default: 508152284Sobrien return 0; 508250397Sobrien } 508352284Sobrien if ((time1 >= time2 508490075Sobrien && (! rld[i].in || rld[i].out 508590075Sobrien || ! rtx_equal_p (other_input, value))) 508690075Sobrien || (out && rld[reloadnum].out_reg 508752284Sobrien && time2 >= MAX_RECOG_OPERANDS * 4 + 3)) 508850397Sobrien return 0; 508950397Sobrien } 509050397Sobrien } 509150397Sobrien } 509270635Sobrien 509370635Sobrien /* Earlyclobbered outputs must conflict with inputs. */ 509470635Sobrien if (check_earlyclobber && out && earlyclobber_operand_p (out)) 509570635Sobrien return 0; 509670635Sobrien 509750397Sobrien return 1; 509850397Sobrien} 509950397Sobrien 510070635Sobrien/* Return 1 if the value in reload reg REGNO, as used by a reload 510170635Sobrien needed for the part of the insn specified by OPNUM and TYPE, 510270635Sobrien may be used to load VALUE into it. 510370635Sobrien 510470635Sobrien MODE is the mode in which the register is used, this is needed to 510570635Sobrien determine how many hard regs to test. 510670635Sobrien 510770635Sobrien Other read-only reloads with the same value do not conflict 5108117395Skan unless OUT is nonzero and these other reloads have to live while 510970635Sobrien output reloads live. 511070635Sobrien If OUT is CONST0_RTX, this is a special case: it means that the 511170635Sobrien test should not be for using register REGNO as reload register, but 511270635Sobrien for copying from register REGNO into the reload register. 511370635Sobrien 511470635Sobrien RELOADNUM is the number of the reload we want to load this value for; 511570635Sobrien a reload does not conflict with itself. 511670635Sobrien 511770635Sobrien When IGNORE_ADDRESS_RELOADS is set, we can not have conflicts with 511870635Sobrien reloads that load an address for the very reload we are considering. 511970635Sobrien 512070635Sobrien The caller has to make sure that there is no conflict with the return 512170635Sobrien register. */ 512270635Sobrien 512370635Sobrienstatic int 5124132718Skanfree_for_value_p (int regno, enum machine_mode mode, int opnum, 5125132718Skan enum reload_type type, rtx value, rtx out, int reloadnum, 5126132718Skan int ignore_address_reloads) 512770635Sobrien{ 5128169689Skan int nregs = hard_regno_nregs[regno][mode]; 512970635Sobrien while (nregs-- > 0) 513090075Sobrien if (! reload_reg_free_for_value_p (regno, regno + nregs, opnum, type, 513190075Sobrien value, out, reloadnum, 513290075Sobrien ignore_address_reloads)) 513370635Sobrien return 0; 513470635Sobrien return 1; 513570635Sobrien} 513670635Sobrien 5137169689Skan/* Return nonzero if the rtx X is invariant over the current function. */ 5138169689Skan/* ??? Actually, the places where we use this expect exactly what is 5139169689Skan tested here, and not everything that is function invariant. In 5140169689Skan particular, the frame pointer and arg pointer are special cased; 5141169689Skan pic_offset_table_rtx is not, and we must not spill these things to 5142169689Skan memory. */ 5143169689Skan 5144169689Skanint 5145169689Skanfunction_invariant_p (rtx x) 5146169689Skan{ 5147169689Skan if (CONSTANT_P (x)) 5148169689Skan return 1; 5149169689Skan if (x == frame_pointer_rtx || x == arg_pointer_rtx) 5150169689Skan return 1; 5151169689Skan if (GET_CODE (x) == PLUS 5152169689Skan && (XEXP (x, 0) == frame_pointer_rtx || XEXP (x, 0) == arg_pointer_rtx) 5153169689Skan && CONSTANT_P (XEXP (x, 1))) 5154169689Skan return 1; 5155169689Skan return 0; 5156169689Skan} 5157169689Skan 515870635Sobrien/* Determine whether the reload reg X overlaps any rtx'es used for 515970635Sobrien overriding inheritance. Return nonzero if so. */ 516070635Sobrien 516170635Sobrienstatic int 5162132718Skanconflicts_with_override (rtx x) 516370635Sobrien{ 516470635Sobrien int i; 516570635Sobrien for (i = 0; i < n_reloads; i++) 516670635Sobrien if (reload_override_in[i] 516770635Sobrien && reg_overlap_mentioned_p (x, reload_override_in[i])) 516870635Sobrien return 1; 516970635Sobrien return 0; 517070635Sobrien} 517190075Sobrien 517290075Sobrien/* Give an error message saying we failed to find a reload for INSN, 517390075Sobrien and clear out reload R. */ 517490075Sobrienstatic void 5175132718Skanfailed_reload (rtx insn, int r) 517690075Sobrien{ 517790075Sobrien if (asm_noperands (PATTERN (insn)) < 0) 517890075Sobrien /* It's the compiler's fault. */ 517990075Sobrien fatal_insn ("could not find a spill register", insn); 518070635Sobrien 518190075Sobrien /* It's the user's fault; the operand's mode and constraint 518290075Sobrien don't match. Disable this reload so we don't crash in final. */ 518390075Sobrien error_for_asm (insn, 5184169689Skan "%<asm%> operand constraint incompatible with operand size"); 518590075Sobrien rld[r].in = 0; 518690075Sobrien rld[r].out = 0; 518790075Sobrien rld[r].reg_rtx = 0; 518890075Sobrien rld[r].optional = 1; 518990075Sobrien rld[r].secondary_p = 1; 519090075Sobrien} 519190075Sobrien 519290075Sobrien/* I is the index in SPILL_REG_RTX of the reload register we are to allocate 519390075Sobrien for reload R. If it's valid, get an rtx for it. Return nonzero if 519490075Sobrien successful. */ 519590075Sobrienstatic int 5196132718Skanset_reload_reg (int i, int r) 519790075Sobrien{ 519890075Sobrien int regno; 519990075Sobrien rtx reg = spill_reg_rtx[i]; 520090075Sobrien 520190075Sobrien if (reg == 0 || GET_MODE (reg) != rld[r].mode) 520290075Sobrien spill_reg_rtx[i] = reg 520390075Sobrien = gen_rtx_REG (rld[r].mode, spill_regs[i]); 520490075Sobrien 520590075Sobrien regno = true_regnum (reg); 520690075Sobrien 520790075Sobrien /* Detect when the reload reg can't hold the reload mode. 520890075Sobrien This used to be one `if', but Sequent compiler can't handle that. */ 520990075Sobrien if (HARD_REGNO_MODE_OK (regno, rld[r].mode)) 521090075Sobrien { 521190075Sobrien enum machine_mode test_mode = VOIDmode; 521290075Sobrien if (rld[r].in) 521390075Sobrien test_mode = GET_MODE (rld[r].in); 521490075Sobrien /* If rld[r].in has VOIDmode, it means we will load it 521590075Sobrien in whatever mode the reload reg has: to wit, rld[r].mode. 521690075Sobrien We have already tested that for validity. */ 521790075Sobrien /* Aside from that, we need to test that the expressions 521890075Sobrien to reload from or into have modes which are valid for this 521990075Sobrien reload register. Otherwise the reload insns would be invalid. */ 522090075Sobrien if (! (rld[r].in != 0 && test_mode != VOIDmode 522190075Sobrien && ! HARD_REGNO_MODE_OK (regno, test_mode))) 522290075Sobrien if (! (rld[r].out != 0 522390075Sobrien && ! HARD_REGNO_MODE_OK (regno, GET_MODE (rld[r].out)))) 522490075Sobrien { 522590075Sobrien /* The reg is OK. */ 522690075Sobrien last_spill_reg = i; 522790075Sobrien 522890075Sobrien /* Mark as in use for this insn the reload regs we use 522990075Sobrien for this. */ 523090075Sobrien mark_reload_reg_in_use (spill_regs[i], rld[r].opnum, 523190075Sobrien rld[r].when_needed, rld[r].mode); 523290075Sobrien 523390075Sobrien rld[r].reg_rtx = reg; 523490075Sobrien reload_spill_index[r] = spill_regs[i]; 523590075Sobrien return 1; 523690075Sobrien } 523790075Sobrien } 523890075Sobrien return 0; 523990075Sobrien} 524090075Sobrien 524118334Speter/* Find a spill register to use as a reload register for reload R. 5242117395Skan LAST_RELOAD is nonzero if this is the last reload for the insn being 524318334Speter processed. 524418334Speter 524590075Sobrien Set rld[R].reg_rtx to the register allocated. 524618334Speter 524790075Sobrien We return 1 if successful, or 0 if we couldn't find a spill reg and 524890075Sobrien we didn't change anything. */ 524918334Speter 525018334Speterstatic int 5251132718Skanallocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r, 5252132718Skan int last_reload) 525318334Speter{ 525490075Sobrien int i, pass, count; 525518334Speter 525618334Speter /* If we put this reload ahead, thinking it is a group, 525718334Speter then insist on finding a group. Otherwise we can grab a 525818334Speter reg that some other reload needs. 525918334Speter (That can happen when we have a 68000 DATA_OR_FP_REG 526018334Speter which is a group of data regs or one fp reg.) 526118334Speter We need not be so restrictive if there are no more reloads 526218334Speter for this insn. 526318334Speter 526418334Speter ??? Really it would be nicer to have smarter handling 526518334Speter for that kind of reg class, where a problem like this is normal. 526618334Speter Perhaps those classes should be avoided for reloading 526718334Speter by use of more alternatives. */ 526818334Speter 526990075Sobrien int force_group = rld[r].nregs > 1 && ! last_reload; 527018334Speter 527118334Speter /* If we want a single register and haven't yet found one, 527218334Speter take any reg in the right class and not in use. 527318334Speter If we want a consecutive group, here is where we look for it. 527418334Speter 527518334Speter We use two passes so we can first look for reload regs to 527618334Speter reuse, which are already in use for other reloads in this insn, 527718334Speter and only then use additional registers. 527818334Speter I think that maximizing reuse is needed to make sure we don't 527918334Speter run out of reload regs. Suppose we have three reloads, and 528018334Speter reloads A and B can share regs. These need two regs. 528118334Speter Suppose A and B are given different regs. 528218334Speter That leaves none for C. */ 528318334Speter for (pass = 0; pass < 2; pass++) 528418334Speter { 528518334Speter /* I is the index in spill_regs. 528618334Speter We advance it round-robin between insns to use all spill regs 528718334Speter equally, so that inherited reloads have a chance 528890075Sobrien of leapfrogging each other. */ 528918334Speter 529090075Sobrien i = last_spill_reg; 529190075Sobrien 529218334Speter for (count = 0; count < n_spills; count++) 529318334Speter { 529490075Sobrien int class = (int) rld[r].class; 529552284Sobrien int regnum; 529618334Speter 529752284Sobrien i++; 529852284Sobrien if (i >= n_spills) 529952284Sobrien i -= n_spills; 530052284Sobrien regnum = spill_regs[i]; 530118334Speter 530290075Sobrien if ((reload_reg_free_p (regnum, rld[r].opnum, 530390075Sobrien rld[r].when_needed) 530490075Sobrien || (rld[r].in 530590075Sobrien /* We check reload_reg_used to make sure we 530690075Sobrien don't clobber the return register. */ 530752284Sobrien && ! TEST_HARD_REG_BIT (reload_reg_used, regnum) 530890075Sobrien && free_for_value_p (regnum, rld[r].mode, rld[r].opnum, 530990075Sobrien rld[r].when_needed, rld[r].in, 531090075Sobrien rld[r].out, r, 1))) 531152284Sobrien && TEST_HARD_REG_BIT (reg_class_contents[class], regnum) 531290075Sobrien && HARD_REGNO_MODE_OK (regnum, rld[r].mode) 531318334Speter /* Look first for regs to share, then for unshared. But 531418334Speter don't share regs used for inherited reloads; they are 531518334Speter the ones we want to preserve. */ 531618334Speter && (pass 531718334Speter || (TEST_HARD_REG_BIT (reload_reg_used_at_all, 531852284Sobrien regnum) 531918334Speter && ! TEST_HARD_REG_BIT (reload_reg_used_for_inherit, 532052284Sobrien regnum)))) 532118334Speter { 5322169689Skan int nr = hard_regno_nregs[regnum][rld[r].mode]; 532318334Speter /* Avoid the problem where spilling a GENERAL_OR_FP_REG 532418334Speter (on 68000) got us two FP regs. If NR is 1, 532518334Speter we would reject both of them. */ 532618334Speter if (force_group) 532790075Sobrien nr = rld[r].nregs; 532818334Speter /* If we need only one reg, we have already won. */ 532918334Speter if (nr == 1) 533018334Speter { 533118334Speter /* But reject a single reg if we demand a group. */ 533218334Speter if (force_group) 533318334Speter continue; 533418334Speter break; 533518334Speter } 533618334Speter /* Otherwise check that as many consecutive regs as we need 533790075Sobrien are available here. */ 533890075Sobrien while (nr > 1) 533990075Sobrien { 534090075Sobrien int regno = regnum + nr - 1; 534190075Sobrien if (!(TEST_HARD_REG_BIT (reg_class_contents[class], regno) 534290075Sobrien && spill_reg_order[regno] >= 0 534390075Sobrien && reload_reg_free_p (regno, rld[r].opnum, 534490075Sobrien rld[r].when_needed))) 534590075Sobrien break; 534690075Sobrien nr--; 534790075Sobrien } 534818334Speter if (nr == 1) 534918334Speter break; 535018334Speter } 535118334Speter } 535218334Speter 535318334Speter /* If we found something on pass 1, omit pass 2. */ 535418334Speter if (count < n_spills) 535518334Speter break; 535618334Speter } 535718334Speter 535818334Speter /* We should have found a spill register by now. */ 535990075Sobrien if (count >= n_spills) 536090075Sobrien return 0; 536118334Speter 536218334Speter /* I is the index in SPILL_REG_RTX of the reload register we are to 536318334Speter allocate. Get an rtx for it and find its register number. */ 536418334Speter 536590075Sobrien return set_reload_reg (i, r); 536618334Speter} 536718334Speter 536890075Sobrien/* Initialize all the tables needed to allocate reload registers. 536990075Sobrien CHAIN is the insn currently being processed; SAVE_RELOAD_REG_RTX 537090075Sobrien is the array we use to restore the reg_rtx field for every reload. */ 537118334Speter 537218334Speterstatic void 5373132718Skanchoose_reload_regs_init (struct insn_chain *chain, rtx *save_reload_reg_rtx) 537418334Speter{ 537590075Sobrien int i; 537618334Speter 537790075Sobrien for (i = 0; i < n_reloads; i++) 537890075Sobrien rld[i].reg_rtx = save_reload_reg_rtx[i]; 537918334Speter 538090075Sobrien memset (reload_inherited, 0, MAX_RELOADS); 5381132718Skan memset (reload_inheritance_insn, 0, MAX_RELOADS * sizeof (rtx)); 5382132718Skan memset (reload_override_in, 0, MAX_RELOADS * sizeof (rtx)); 538318334Speter 538418334Speter CLEAR_HARD_REG_SET (reload_reg_used); 538518334Speter CLEAR_HARD_REG_SET (reload_reg_used_at_all); 538618334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_op_addr); 538718334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_op_addr_reload); 538818334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_insn); 538918334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_other_addr); 539018334Speter 539152284Sobrien CLEAR_HARD_REG_SET (reg_used_in_insn); 539252284Sobrien { 539352284Sobrien HARD_REG_SET tmp; 539490075Sobrien REG_SET_TO_HARD_REG_SET (tmp, &chain->live_throughout); 539552284Sobrien IOR_HARD_REG_SET (reg_used_in_insn, tmp); 539690075Sobrien REG_SET_TO_HARD_REG_SET (tmp, &chain->dead_or_set); 539752284Sobrien IOR_HARD_REG_SET (reg_used_in_insn, tmp); 539890075Sobrien compute_use_by_pseudos (®_used_in_insn, &chain->live_throughout); 539990075Sobrien compute_use_by_pseudos (®_used_in_insn, &chain->dead_or_set); 540052284Sobrien } 540190075Sobrien 540218334Speter for (i = 0; i < reload_n_operands; i++) 540318334Speter { 540418334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_output[i]); 540518334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_input[i]); 540618334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_input_addr[i]); 540750397Sobrien CLEAR_HARD_REG_SET (reload_reg_used_in_inpaddr_addr[i]); 540818334Speter CLEAR_HARD_REG_SET (reload_reg_used_in_output_addr[i]); 540950397Sobrien CLEAR_HARD_REG_SET (reload_reg_used_in_outaddr_addr[i]); 541018334Speter } 541118334Speter 541270635Sobrien COMPL_HARD_REG_SET (reload_reg_unavailable, chain->used_spill_regs); 541318334Speter 541490075Sobrien CLEAR_HARD_REG_SET (reload_reg_used_for_inherit); 541518334Speter 541690075Sobrien for (i = 0; i < n_reloads; i++) 541790075Sobrien /* If we have already decided to use a certain register, 541890075Sobrien don't use it in another way. */ 541990075Sobrien if (rld[i].reg_rtx) 542090075Sobrien mark_reload_reg_in_use (REGNO (rld[i].reg_rtx), rld[i].opnum, 542190075Sobrien rld[i].when_needed, rld[i].mode); 542290075Sobrien} 542318334Speter 542490075Sobrien/* Assign hard reg targets for the pseudo-registers we must reload 542590075Sobrien into hard regs for this insn. 542690075Sobrien Also output the instructions to copy them in and out of the hard regs. 542790075Sobrien 542890075Sobrien For machines with register classes, we are responsible for 542990075Sobrien finding a reload reg in the proper class. */ 543090075Sobrien 543190075Sobrienstatic void 5432132718Skanchoose_reload_regs (struct insn_chain *chain) 543390075Sobrien{ 543490075Sobrien rtx insn = chain->insn; 543590075Sobrien int i, j; 543690075Sobrien unsigned int max_group_size = 1; 543790075Sobrien enum reg_class group_class = NO_REGS; 543890075Sobrien int pass, win, inheritance; 543990075Sobrien 544090075Sobrien rtx save_reload_reg_rtx[MAX_RELOADS]; 544190075Sobrien 544218334Speter /* In order to be certain of getting the registers we need, 544318334Speter we must sort the reloads into order of increasing register class. 544418334Speter Then our grabbing of reload registers will parallel the process 544518334Speter that provided the reload registers. 544618334Speter 544718334Speter Also note whether any of the reloads wants a consecutive group of regs. 544818334Speter If so, record the maximum size of the group desired and what 544918334Speter register class contains all the groups needed by this insn. */ 545018334Speter 545118334Speter for (j = 0; j < n_reloads; j++) 545218334Speter { 545318334Speter reload_order[j] = j; 5454220150Smm if (rld[j].reg_rtx != NULL_RTX) 5455220150Smm { 5456220150Smm gcc_assert (REG_P (rld[j].reg_rtx) 5457220150Smm && HARD_REGISTER_P (rld[j].reg_rtx)); 5458220150Smm reload_spill_index[j] = REGNO (rld[j].reg_rtx); 5459220150Smm } 5460220150Smm else 5461220150Smm reload_spill_index[j] = -1; 546218334Speter 546390075Sobrien if (rld[j].nregs > 1) 546418334Speter { 546590075Sobrien max_group_size = MAX (rld[j].nregs, max_group_size); 546690075Sobrien group_class 546790075Sobrien = reg_class_superunion[(int) rld[j].class][(int) group_class]; 546818334Speter } 546918334Speter 547090075Sobrien save_reload_reg_rtx[j] = rld[j].reg_rtx; 547118334Speter } 547218334Speter 547318334Speter if (n_reloads > 1) 547418334Speter qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower); 547518334Speter 547618334Speter /* If -O, try first with inheritance, then turning it off. 547718334Speter If not -O, don't do inheritance. 547818334Speter Using inheritance when not optimizing leads to paradoxes 547918334Speter with fp on the 68k: fp numbers (not NaNs) fail to be equal to themselves 548018334Speter because one side of the comparison might be inherited. */ 548190075Sobrien win = 0; 548218334Speter for (inheritance = optimize > 0; inheritance >= 0; inheritance--) 548318334Speter { 548490075Sobrien choose_reload_regs_init (chain, save_reload_reg_rtx); 548590075Sobrien 548618334Speter /* Process the reloads in order of preference just found. 548718334Speter Beyond this point, subregs can be found in reload_reg_rtx. 548818334Speter 548990075Sobrien This used to look for an existing reloaded home for all of the 549090075Sobrien reloads, and only then perform any new reloads. But that could lose 549190075Sobrien if the reloads were done out of reg-class order because a later 549290075Sobrien reload with a looser constraint might have an old home in a register 549390075Sobrien needed by an earlier reload with a tighter constraint. 549418334Speter 549518334Speter To solve this, we make two passes over the reloads, in the order 549618334Speter described above. In the first pass we try to inherit a reload 549718334Speter from a previous insn. If there is a later reload that needs a 549818334Speter class that is a proper subset of the class being processed, we must 549918334Speter also allocate a spill register during the first pass. 550018334Speter 550118334Speter Then make a second pass over the reloads to allocate any reloads 550218334Speter that haven't been given registers yet. */ 550318334Speter 550418334Speter for (j = 0; j < n_reloads; j++) 550518334Speter { 550690075Sobrien int r = reload_order[j]; 550752284Sobrien rtx search_equiv = NULL_RTX; 550818334Speter 550918334Speter /* Ignore reloads that got marked inoperative. */ 551090075Sobrien if (rld[r].out == 0 && rld[r].in == 0 551190075Sobrien && ! rld[r].secondary_p) 551218334Speter continue; 551318334Speter 551452284Sobrien /* If find_reloads chose to use reload_in or reload_out as a reload 551550397Sobrien register, we don't need to chose one. Otherwise, try even if it 551650397Sobrien found one since we might save an insn if we find the value lying 551752284Sobrien around. 551852284Sobrien Try also when reload_in is a pseudo without a hard reg. */ 551990075Sobrien if (rld[r].in != 0 && rld[r].reg_rtx != 0 552090075Sobrien && (rtx_equal_p (rld[r].in, rld[r].reg_rtx) 552190075Sobrien || (rtx_equal_p (rld[r].out, rld[r].reg_rtx) 5522169689Skan && !MEM_P (rld[r].in) 552390075Sobrien && true_regnum (rld[r].in) < FIRST_PSEUDO_REGISTER))) 552418334Speter continue; 552518334Speter 552618334Speter#if 0 /* No longer needed for correct operation. 552718334Speter It might give better code, or might not; worth an experiment? */ 552818334Speter /* If this is an optional reload, we can't inherit from earlier insns 552918334Speter until we are sure that any non-optional reloads have been allocated. 553018334Speter The following code takes advantage of the fact that optional reloads 553118334Speter are at the end of reload_order. */ 553290075Sobrien if (rld[r].optional != 0) 553318334Speter for (i = 0; i < j; i++) 553490075Sobrien if ((rld[reload_order[i]].out != 0 553590075Sobrien || rld[reload_order[i]].in != 0 553690075Sobrien || rld[reload_order[i]].secondary_p) 553790075Sobrien && ! rld[reload_order[i]].optional 553890075Sobrien && rld[reload_order[i]].reg_rtx == 0) 553990075Sobrien allocate_reload_reg (chain, reload_order[i], 0); 554018334Speter#endif 554118334Speter 554218334Speter /* First see if this pseudo is already available as reloaded 554318334Speter for a previous insn. We cannot try to inherit for reloads 554418334Speter that are smaller than the maximum number of registers needed 554518334Speter for groups unless the register we would allocate cannot be used 554618334Speter for the groups. 554718334Speter 554818334Speter We could check here to see if this is a secondary reload for 554918334Speter an object that is already in a register of the desired class. 555018334Speter This would avoid the need for the secondary reload register. 555118334Speter But this is complex because we can't easily determine what 555250397Sobrien objects might want to be loaded via this reload. So let a 555350397Sobrien register be allocated here. In `emit_reload_insns' we suppress 555450397Sobrien one of the loads in the case described above. */ 555518334Speter 555618334Speter if (inheritance) 555718334Speter { 555890075Sobrien int byte = 0; 555990075Sobrien int regno = -1; 556090075Sobrien enum machine_mode mode = VOIDmode; 556118334Speter 556290075Sobrien if (rld[r].in == 0) 556318334Speter ; 5564169689Skan else if (REG_P (rld[r].in)) 556518334Speter { 556690075Sobrien regno = REGNO (rld[r].in); 556790075Sobrien mode = GET_MODE (rld[r].in); 556818334Speter } 5569169689Skan else if (REG_P (rld[r].in_reg)) 557018334Speter { 557190075Sobrien regno = REGNO (rld[r].in_reg); 557290075Sobrien mode = GET_MODE (rld[r].in_reg); 557318334Speter } 557490075Sobrien else if (GET_CODE (rld[r].in_reg) == SUBREG 5575169689Skan && REG_P (SUBREG_REG (rld[r].in_reg))) 557650397Sobrien { 557790075Sobrien byte = SUBREG_BYTE (rld[r].in_reg); 557890075Sobrien regno = REGNO (SUBREG_REG (rld[r].in_reg)); 557952284Sobrien if (regno < FIRST_PSEUDO_REGISTER) 558090075Sobrien regno = subreg_regno (rld[r].in_reg); 558190075Sobrien mode = GET_MODE (rld[r].in_reg); 558250397Sobrien } 558352284Sobrien#ifdef AUTO_INC_DEC 5584169689Skan else if (GET_RTX_CLASS (GET_CODE (rld[r].in_reg)) == RTX_AUTOINC 5585169689Skan && REG_P (XEXP (rld[r].in_reg, 0))) 558652284Sobrien { 558790075Sobrien regno = REGNO (XEXP (rld[r].in_reg, 0)); 558890075Sobrien mode = GET_MODE (XEXP (rld[r].in_reg, 0)); 558990075Sobrien rld[r].out = rld[r].in; 559052284Sobrien } 559152284Sobrien#endif 559218334Speter#if 0 559318334Speter /* This won't work, since REGNO can be a pseudo reg number. 559418334Speter Also, it takes much more hair to keep track of all the things 559518334Speter that can invalidate an inherited reload of part of a pseudoreg. */ 559690075Sobrien else if (GET_CODE (rld[r].in) == SUBREG 5597169689Skan && REG_P (SUBREG_REG (rld[r].in))) 559890075Sobrien regno = subreg_regno (rld[r].in); 559918334Speter#endif 560018334Speter 560118334Speter if (regno >= 0 && reg_last_reload_reg[regno] != 0) 560218334Speter { 560390075Sobrien enum reg_class class = rld[r].class, last_class; 560452284Sobrien rtx last_reg = reg_last_reload_reg[regno]; 560590075Sobrien enum machine_mode need_mode; 560690075Sobrien 560790075Sobrien i = REGNO (last_reg); 560890075Sobrien i += subreg_regno_offset (i, GET_MODE (last_reg), byte, mode); 560952284Sobrien last_class = REGNO_REG_CLASS (i); 561090075Sobrien 561190075Sobrien if (byte == 0) 561290075Sobrien need_mode = mode; 561390075Sobrien else 561490075Sobrien need_mode 5615146895Skan = smallest_mode_for_size (GET_MODE_BITSIZE (mode) 5616146895Skan + byte * BITS_PER_UNIT, 561790075Sobrien GET_MODE_CLASS (mode)); 561890075Sobrien 5619146895Skan if ((GET_MODE_SIZE (GET_MODE (last_reg)) 562090075Sobrien >= GET_MODE_SIZE (need_mode)) 5621117395Skan#ifdef CANNOT_CHANGE_MODE_CLASS 5622146895Skan /* Verify that the register in "i" can be obtained 5623146895Skan from LAST_REG. */ 5624146895Skan && !REG_CANNOT_CHANGE_MODE_P (REGNO (last_reg), 5625146895Skan GET_MODE (last_reg), 5626146895Skan mode) 562790075Sobrien#endif 562852284Sobrien && reg_reloaded_contents[i] == regno 562950397Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, i) 563090075Sobrien && HARD_REGNO_MODE_OK (i, rld[r].mode) 563152284Sobrien && (TEST_HARD_REG_BIT (reg_class_contents[(int) class], i) 563252284Sobrien /* Even if we can't use this register as a reload 563352284Sobrien register, we might use it for reload_override_in, 563452284Sobrien if copying it to the desired class is cheap 563552284Sobrien enough. */ 563690075Sobrien || ((REGISTER_MOVE_COST (mode, last_class, class) 563752284Sobrien < MEMORY_MOVE_COST (mode, class, 1)) 5638169689Skan && (secondary_reload_class (1, class, mode, 5639169689Skan last_reg) 564052284Sobrien == NO_REGS) 564152284Sobrien#ifdef SECONDARY_MEMORY_NEEDED 564252284Sobrien && ! SECONDARY_MEMORY_NEEDED (last_class, class, 564352284Sobrien mode) 564452284Sobrien#endif 564552284Sobrien )) 564652284Sobrien 564790075Sobrien && (rld[r].nregs == max_group_size 564818334Speter || ! TEST_HARD_REG_BIT (reg_class_contents[(int) group_class], 564950397Sobrien i)) 565090075Sobrien && free_for_value_p (i, rld[r].mode, rld[r].opnum, 565190075Sobrien rld[r].when_needed, rld[r].in, 565270635Sobrien const0_rtx, r, 1)) 565318334Speter { 565418334Speter /* If a group is needed, verify that all the subsequent 565550397Sobrien registers still have their values intact. */ 5656169689Skan int nr = hard_regno_nregs[i][rld[r].mode]; 565718334Speter int k; 565818334Speter 565918334Speter for (k = 1; k < nr; k++) 566050397Sobrien if (reg_reloaded_contents[i + k] != regno 566150397Sobrien || ! TEST_HARD_REG_BIT (reg_reloaded_valid, i + k)) 566218334Speter break; 566318334Speter 566418334Speter if (k == nr) 566518334Speter { 566618334Speter int i1; 566790075Sobrien int bad_for_class; 566818334Speter 566952284Sobrien last_reg = (GET_MODE (last_reg) == mode 567052284Sobrien ? last_reg : gen_rtx_REG (mode, i)); 567152284Sobrien 567290075Sobrien bad_for_class = 0; 567390075Sobrien for (k = 0; k < nr; k++) 567490075Sobrien bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class], 567590075Sobrien i+k); 567690075Sobrien 567718334Speter /* We found a register that contains the 567818334Speter value we need. If this register is the 567918334Speter same as an `earlyclobber' operand of the 568018334Speter current insn, just mark it as a place to 568118334Speter reload from since we can't use it as the 568218334Speter reload register itself. */ 568318334Speter 568418334Speter for (i1 = 0; i1 < n_earlyclobbers; i1++) 568518334Speter if (reg_overlap_mentioned_for_reload_p 568618334Speter (reg_last_reload_reg[regno], 568718334Speter reload_earlyclobbers[i1])) 568818334Speter break; 568918334Speter 569018334Speter if (i1 != n_earlyclobbers 569190075Sobrien || ! (free_for_value_p (i, rld[r].mode, 569290075Sobrien rld[r].opnum, 569390075Sobrien rld[r].when_needed, rld[r].in, 569490075Sobrien rld[r].out, r, 1)) 569550397Sobrien /* Don't use it if we'd clobber a pseudo reg. */ 569652284Sobrien || (TEST_HARD_REG_BIT (reg_used_in_insn, i) 569790075Sobrien && rld[r].out 569850397Sobrien && ! TEST_HARD_REG_BIT (reg_reloaded_dead, i)) 569952284Sobrien /* Don't clobber the frame pointer. */ 570052284Sobrien || (i == HARD_FRAME_POINTER_REGNUM 570196263Sobrien && frame_pointer_needed 570290075Sobrien && rld[r].out) 570318334Speter /* Don't really use the inherited spill reg 570418334Speter if we need it wider than we've got it. */ 570590075Sobrien || (GET_MODE_SIZE (rld[r].mode) 570652284Sobrien > GET_MODE_SIZE (mode)) 570790075Sobrien || bad_for_class 570852284Sobrien 570952284Sobrien /* If find_reloads chose reload_out as reload 571052284Sobrien register, stay with it - that leaves the 571152284Sobrien inherited register for subsequent reloads. */ 571290075Sobrien || (rld[r].out && rld[r].reg_rtx 571390075Sobrien && rtx_equal_p (rld[r].out, rld[r].reg_rtx))) 571452284Sobrien { 571590075Sobrien if (! rld[r].optional) 571670635Sobrien { 571770635Sobrien reload_override_in[r] = last_reg; 571870635Sobrien reload_inheritance_insn[r] 571970635Sobrien = reg_reloaded_insn[i]; 572070635Sobrien } 572152284Sobrien } 572218334Speter else 572318334Speter { 572418334Speter int k; 572518334Speter /* We can use this as a reload reg. */ 572618334Speter /* Mark the register as in use for this part of 572718334Speter the insn. */ 572850397Sobrien mark_reload_reg_in_use (i, 572990075Sobrien rld[r].opnum, 573090075Sobrien rld[r].when_needed, 573190075Sobrien rld[r].mode); 573290075Sobrien rld[r].reg_rtx = last_reg; 573318334Speter reload_inherited[r] = 1; 573418334Speter reload_inheritance_insn[r] 573518334Speter = reg_reloaded_insn[i]; 573618334Speter reload_spill_index[r] = i; 573718334Speter for (k = 0; k < nr; k++) 573818334Speter SET_HARD_REG_BIT (reload_reg_used_for_inherit, 573950397Sobrien i + k); 574018334Speter } 574118334Speter } 574218334Speter } 574318334Speter } 574418334Speter } 574518334Speter 574618334Speter /* Here's another way to see if the value is already lying around. */ 574718334Speter if (inheritance 574890075Sobrien && rld[r].in != 0 574918334Speter && ! reload_inherited[r] 575090075Sobrien && rld[r].out == 0 575190075Sobrien && (CONSTANT_P (rld[r].in) 575290075Sobrien || GET_CODE (rld[r].in) == PLUS 5753169689Skan || REG_P (rld[r].in) 5754169689Skan || MEM_P (rld[r].in)) 575590075Sobrien && (rld[r].nregs == max_group_size 575690075Sobrien || ! reg_classes_intersect_p (rld[r].class, group_class))) 575790075Sobrien search_equiv = rld[r].in; 575852284Sobrien /* If this is an output reload from a simple move insn, look 575952284Sobrien if an equivalence for the input is available. */ 576090075Sobrien else if (inheritance && rld[r].in == 0 && rld[r].out != 0) 576118334Speter { 576252284Sobrien rtx set = single_set (insn); 576352284Sobrien 576452284Sobrien if (set 576590075Sobrien && rtx_equal_p (rld[r].out, SET_DEST (set)) 576652284Sobrien && CONSTANT_P (SET_SRC (set))) 576752284Sobrien search_equiv = SET_SRC (set); 576852284Sobrien } 576952284Sobrien 577052284Sobrien if (search_equiv) 577152284Sobrien { 577290075Sobrien rtx equiv 577390075Sobrien = find_equiv_reg (search_equiv, insn, rld[r].class, 577490075Sobrien -1, NULL, 0, rld[r].mode); 577590075Sobrien int regno = 0; 577618334Speter 577718334Speter if (equiv != 0) 577818334Speter { 5779169689Skan if (REG_P (equiv)) 578018334Speter regno = REGNO (equiv); 5781169689Skan else 578218334Speter { 578318334Speter /* This must be a SUBREG of a hard register. 578418334Speter Make a new REG since this might be used in an 578518334Speter address and not all machines support SUBREGs 578618334Speter there. */ 5787169689Skan gcc_assert (GET_CODE (equiv) == SUBREG); 578890075Sobrien regno = subreg_regno (equiv); 578990075Sobrien equiv = gen_rtx_REG (rld[r].mode, regno); 5790169689Skan /* If we choose EQUIV as the reload register, but the 5791169689Skan loop below decides to cancel the inheritance, we'll 5792169689Skan end up reloading EQUIV in rld[r].mode, not the mode 5793169689Skan it had originally. That isn't safe when EQUIV isn't 5794169689Skan available as a spill register since its value might 5795169689Skan still be live at this point. */ 5796169689Skan for (i = regno; i < regno + (int) rld[r].nregs; i++) 5797169689Skan if (TEST_HARD_REG_BIT (reload_reg_unavailable, i)) 5798169689Skan equiv = 0; 579918334Speter } 580018334Speter } 580118334Speter 580218334Speter /* If we found a spill reg, reject it unless it is free 580318334Speter and of the desired class. */ 5804132718Skan if (equiv != 0) 5805132718Skan { 5806132718Skan int regs_used = 0; 5807132718Skan int bad_for_class = 0; 5808132718Skan int max_regno = regno + rld[r].nregs; 5809132718Skan 5810132718Skan for (i = regno; i < max_regno; i++) 5811132718Skan { 5812132718Skan regs_used |= TEST_HARD_REG_BIT (reload_reg_used_at_all, 5813132718Skan i); 5814132718Skan bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class], 5815132718Skan i); 5816132718Skan } 5817132718Skan 5818132718Skan if ((regs_used 581990075Sobrien && ! free_for_value_p (regno, rld[r].mode, 582090075Sobrien rld[r].opnum, rld[r].when_needed, 582190075Sobrien rld[r].in, rld[r].out, r, 1)) 5822132718Skan || bad_for_class) 5823132718Skan equiv = 0; 5824132718Skan } 582518334Speter 582690075Sobrien if (equiv != 0 && ! HARD_REGNO_MODE_OK (regno, rld[r].mode)) 582718334Speter equiv = 0; 582818334Speter 582918334Speter /* We found a register that contains the value we need. 583018334Speter If this register is the same as an `earlyclobber' operand 583118334Speter of the current insn, just mark it as a place to reload from 583218334Speter since we can't use it as the reload register itself. */ 583318334Speter 583418334Speter if (equiv != 0) 583518334Speter for (i = 0; i < n_earlyclobbers; i++) 583618334Speter if (reg_overlap_mentioned_for_reload_p (equiv, 583718334Speter reload_earlyclobbers[i])) 583818334Speter { 583990075Sobrien if (! rld[r].optional) 584070635Sobrien reload_override_in[r] = equiv; 584118334Speter equiv = 0; 584218334Speter break; 584318334Speter } 584418334Speter 584550397Sobrien /* If the equiv register we have found is explicitly clobbered 584650397Sobrien in the current insn, it depends on the reload type if we 584750397Sobrien can use it, use it for reload_override_in, or not at all. 584850397Sobrien In particular, we then can't use EQUIV for a 584950397Sobrien RELOAD_FOR_OUTPUT_ADDRESS reload. */ 585018334Speter 585190075Sobrien if (equiv != 0) 585218334Speter { 5853169689Skan if (regno_clobbered_p (regno, insn, rld[r].mode, 2)) 585490075Sobrien switch (rld[r].when_needed) 585590075Sobrien { 585690075Sobrien case RELOAD_FOR_OTHER_ADDRESS: 585790075Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 585890075Sobrien case RELOAD_FOR_INPUT_ADDRESS: 585990075Sobrien case RELOAD_FOR_OPADDR_ADDR: 586090075Sobrien break; 586190075Sobrien case RELOAD_OTHER: 586290075Sobrien case RELOAD_FOR_INPUT: 586390075Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 586490075Sobrien if (! rld[r].optional) 586590075Sobrien reload_override_in[r] = equiv; 586690075Sobrien /* Fall through. */ 586790075Sobrien default: 586890075Sobrien equiv = 0; 586990075Sobrien break; 587090075Sobrien } 587190075Sobrien else if (regno_clobbered_p (regno, insn, rld[r].mode, 1)) 587290075Sobrien switch (rld[r].when_needed) 587390075Sobrien { 587490075Sobrien case RELOAD_FOR_OTHER_ADDRESS: 587590075Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 587690075Sobrien case RELOAD_FOR_INPUT_ADDRESS: 587790075Sobrien case RELOAD_FOR_OPADDR_ADDR: 587890075Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 587990075Sobrien case RELOAD_FOR_INPUT: 588090075Sobrien break; 588190075Sobrien case RELOAD_OTHER: 588290075Sobrien if (! rld[r].optional) 588390075Sobrien reload_override_in[r] = equiv; 588490075Sobrien /* Fall through. */ 588590075Sobrien default: 588690075Sobrien equiv = 0; 588790075Sobrien break; 588890075Sobrien } 588918334Speter } 589018334Speter 589118334Speter /* If we found an equivalent reg, say no code need be generated 589218334Speter to load it, and use it as our reload reg. */ 5893117395Skan if (equiv != 0 5894117395Skan && (regno != HARD_FRAME_POINTER_REGNUM 589596263Sobrien || !frame_pointer_needed)) 589618334Speter { 5897169689Skan int nr = hard_regno_nregs[regno][rld[r].mode]; 589850397Sobrien int k; 589990075Sobrien rld[r].reg_rtx = equiv; 590018334Speter reload_inherited[r] = 1; 590150397Sobrien 590250397Sobrien /* If reg_reloaded_valid is not set for this register, 590350397Sobrien there might be a stale spill_reg_store lying around. 590450397Sobrien We must clear it, since otherwise emit_reload_insns 590550397Sobrien might delete the store. */ 590650397Sobrien if (! TEST_HARD_REG_BIT (reg_reloaded_valid, regno)) 590750397Sobrien spill_reg_store[regno] = NULL_RTX; 590850397Sobrien /* If any of the hard registers in EQUIV are spill 590950397Sobrien registers, mark them as in use for this insn. */ 591050397Sobrien for (k = 0; k < nr; k++) 591118334Speter { 591250397Sobrien i = spill_reg_order[regno + k]; 591350397Sobrien if (i >= 0) 591450397Sobrien { 591590075Sobrien mark_reload_reg_in_use (regno, rld[r].opnum, 591690075Sobrien rld[r].when_needed, 591790075Sobrien rld[r].mode); 591850397Sobrien SET_HARD_REG_BIT (reload_reg_used_for_inherit, 591950397Sobrien regno + k); 592050397Sobrien } 592118334Speter } 592218334Speter } 592318334Speter } 592418334Speter 592518334Speter /* If we found a register to use already, or if this is an optional 592618334Speter reload, we are done. */ 592790075Sobrien if (rld[r].reg_rtx != 0 || rld[r].optional != 0) 592818334Speter continue; 592918334Speter 593090075Sobrien#if 0 593190075Sobrien /* No longer needed for correct operation. Might or might 593290075Sobrien not give better code on the average. Want to experiment? */ 593318334Speter 593418334Speter /* See if there is a later reload that has a class different from our 593518334Speter class that intersects our class or that requires less register 593618334Speter than our reload. If so, we must allocate a register to this 593718334Speter reload now, since that reload might inherit a previous reload 593818334Speter and take the only available register in our class. Don't do this 593918334Speter for optional reloads since they will force all previous reloads 594018334Speter to be allocated. Also don't do this for reloads that have been 594118334Speter turned off. */ 594218334Speter 594318334Speter for (i = j + 1; i < n_reloads; i++) 594418334Speter { 594518334Speter int s = reload_order[i]; 594618334Speter 594790075Sobrien if ((rld[s].in == 0 && rld[s].out == 0 594890075Sobrien && ! rld[s].secondary_p) 594990075Sobrien || rld[s].optional) 595018334Speter continue; 595118334Speter 595290075Sobrien if ((rld[s].class != rld[r].class 595390075Sobrien && reg_classes_intersect_p (rld[r].class, 595490075Sobrien rld[s].class)) 595590075Sobrien || rld[s].nregs < rld[r].nregs) 595690075Sobrien break; 595718334Speter } 595818334Speter 595918334Speter if (i == n_reloads) 596018334Speter continue; 596118334Speter 596290075Sobrien allocate_reload_reg (chain, r, j == n_reloads - 1); 596318334Speter#endif 596418334Speter } 596518334Speter 596618334Speter /* Now allocate reload registers for anything non-optional that 596718334Speter didn't get one yet. */ 596818334Speter for (j = 0; j < n_reloads; j++) 596918334Speter { 597090075Sobrien int r = reload_order[j]; 597118334Speter 597218334Speter /* Ignore reloads that got marked inoperative. */ 597390075Sobrien if (rld[r].out == 0 && rld[r].in == 0 && ! rld[r].secondary_p) 597418334Speter continue; 597518334Speter 597618334Speter /* Skip reloads that already have a register allocated or are 597750397Sobrien optional. */ 597890075Sobrien if (rld[r].reg_rtx != 0 || rld[r].optional) 597918334Speter continue; 598018334Speter 598190075Sobrien if (! allocate_reload_reg (chain, r, j == n_reloads - 1)) 598218334Speter break; 598318334Speter } 598418334Speter 598518334Speter /* If that loop got all the way, we have won. */ 598618334Speter if (j == n_reloads) 598790075Sobrien { 598890075Sobrien win = 1; 598990075Sobrien break; 599090075Sobrien } 599118334Speter 599218334Speter /* Loop around and try without any inheritance. */ 599390075Sobrien } 599490075Sobrien 599590075Sobrien if (! win) 599690075Sobrien { 599718334Speter /* First undo everything done by the failed attempt 599818334Speter to allocate with inheritance. */ 599990075Sobrien choose_reload_regs_init (chain, save_reload_reg_rtx); 600018334Speter 600190075Sobrien /* Some sanity tests to verify that the reloads found in the first 600290075Sobrien pass are identical to the ones we have now. */ 6003169689Skan gcc_assert (chain->n_reloads == n_reloads); 600490075Sobrien 600590075Sobrien for (i = 0; i < n_reloads; i++) 600618334Speter { 600790075Sobrien if (chain->rld[i].regno < 0 || chain->rld[i].reg_rtx != 0) 600890075Sobrien continue; 6009169689Skan gcc_assert (chain->rld[i].when_needed == rld[i].when_needed); 601090075Sobrien for (j = 0; j < n_spills; j++) 601190075Sobrien if (spill_regs[j] == chain->rld[i].regno) 601290075Sobrien if (! set_reload_reg (j, i)) 601390075Sobrien failed_reload (chain->insn, i); 601418334Speter } 601518334Speter } 601618334Speter 601718334Speter /* If we thought we could inherit a reload, because it seemed that 601818334Speter nothing else wanted the same reload register earlier in the insn, 601952284Sobrien verify that assumption, now that all reloads have been assigned. 602052284Sobrien Likewise for reloads where reload_override_in has been set. */ 602118334Speter 602252284Sobrien /* If doing expensive optimizations, do one preliminary pass that doesn't 602352284Sobrien cancel any inheritance, but removes reloads that have been needed only 602452284Sobrien for reloads that we know can be inherited. */ 602552284Sobrien for (pass = flag_expensive_optimizations; pass >= 0; pass--) 602618334Speter { 602752284Sobrien for (j = 0; j < n_reloads; j++) 602850397Sobrien { 602990075Sobrien int r = reload_order[j]; 603052284Sobrien rtx check_reg; 603190075Sobrien if (reload_inherited[r] && rld[r].reg_rtx) 603290075Sobrien check_reg = rld[r].reg_rtx; 603352284Sobrien else if (reload_override_in[r] 6034169689Skan && (REG_P (reload_override_in[r]) 603590075Sobrien || GET_CODE (reload_override_in[r]) == SUBREG)) 603652284Sobrien check_reg = reload_override_in[r]; 603752284Sobrien else 603852284Sobrien continue; 603990075Sobrien if (! free_for_value_p (true_regnum (check_reg), rld[r].mode, 604090075Sobrien rld[r].opnum, rld[r].when_needed, rld[r].in, 604170635Sobrien (reload_inherited[r] 604290075Sobrien ? rld[r].out : const0_rtx), 604370635Sobrien r, 1)) 604450397Sobrien { 604552284Sobrien if (pass) 604652284Sobrien continue; 604752284Sobrien reload_inherited[r] = 0; 604852284Sobrien reload_override_in[r] = 0; 604950397Sobrien } 605052284Sobrien /* If we can inherit a RELOAD_FOR_INPUT, or can use a 605152284Sobrien reload_override_in, then we do not need its related 605252284Sobrien RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS reloads; 605352284Sobrien likewise for other reload types. 605452284Sobrien We handle this by removing a reload when its only replacement 605552284Sobrien is mentioned in reload_in of the reload we are going to inherit. 605652284Sobrien A special case are auto_inc expressions; even if the input is 605752284Sobrien inherited, we still need the address for the output. We can 605890075Sobrien recognize them because they have RELOAD_OUT set to RELOAD_IN. 605990075Sobrien If we succeeded removing some reload and we are doing a preliminary 606052284Sobrien pass just to remove such reloads, make another pass, since the 606152284Sobrien removal of one reload might allow us to inherit another one. */ 606290075Sobrien else if (rld[r].in 606390075Sobrien && rld[r].out != rld[r].in 606490075Sobrien && remove_address_replacements (rld[r].in) && pass) 606552284Sobrien pass = 2; 606650397Sobrien } 606718334Speter } 606818334Speter 606918334Speter /* Now that reload_override_in is known valid, 607018334Speter actually override reload_in. */ 607118334Speter for (j = 0; j < n_reloads; j++) 607218334Speter if (reload_override_in[j]) 607390075Sobrien rld[j].in = reload_override_in[j]; 607418334Speter 6075132718Skan /* If this reload won't be done because it has been canceled or is 607618334Speter optional and not inherited, clear reload_reg_rtx so other 607718334Speter routines (such as subst_reloads) don't get confused. */ 607818334Speter for (j = 0; j < n_reloads; j++) 607990075Sobrien if (rld[j].reg_rtx != 0 608090075Sobrien && ((rld[j].optional && ! reload_inherited[j]) 608190075Sobrien || (rld[j].in == 0 && rld[j].out == 0 608290075Sobrien && ! rld[j].secondary_p))) 608318334Speter { 608490075Sobrien int regno = true_regnum (rld[j].reg_rtx); 608518334Speter 608618334Speter if (spill_reg_order[regno] >= 0) 608790075Sobrien clear_reload_reg_in_use (regno, rld[j].opnum, 608890075Sobrien rld[j].when_needed, rld[j].mode); 608990075Sobrien rld[j].reg_rtx = 0; 609057844Sobrien reload_spill_index[j] = -1; 609118334Speter } 609218334Speter 609318334Speter /* Record which pseudos and which spill regs have output reloads. */ 609418334Speter for (j = 0; j < n_reloads; j++) 609518334Speter { 609690075Sobrien int r = reload_order[j]; 609718334Speter 609818334Speter i = reload_spill_index[r]; 609918334Speter 610050397Sobrien /* I is nonneg if this reload uses a register. 610190075Sobrien If rld[r].reg_rtx is 0, this is an optional reload 610218334Speter that we opted to ignore. */ 6103169689Skan if (rld[r].out_reg != 0 && REG_P (rld[r].out_reg) 610490075Sobrien && rld[r].reg_rtx != 0) 610518334Speter { 610690075Sobrien int nregno = REGNO (rld[r].out_reg); 610718334Speter int nr = 1; 610818334Speter 610918334Speter if (nregno < FIRST_PSEUDO_REGISTER) 6110169689Skan nr = hard_regno_nregs[nregno][rld[r].mode]; 611118334Speter 611218334Speter while (--nr >= 0) 6113169689Skan SET_REGNO_REG_SET (®_has_output_reload, 6114169689Skan nregno + nr); 611518334Speter 611618334Speter if (i >= 0) 611718334Speter { 6118169689Skan nr = hard_regno_nregs[i][rld[r].mode]; 611918334Speter while (--nr >= 0) 612050397Sobrien SET_HARD_REG_BIT (reg_is_output_reload, i + nr); 612118334Speter } 612218334Speter 6123169689Skan gcc_assert (rld[r].when_needed == RELOAD_OTHER 6124169689Skan || rld[r].when_needed == RELOAD_FOR_OUTPUT 6125169689Skan || rld[r].when_needed == RELOAD_FOR_INSN); 612618334Speter } 612718334Speter } 612818334Speter} 612952284Sobrien 613052284Sobrien/* Deallocate the reload register for reload R. This is called from 613152284Sobrien remove_address_replacements. */ 613290075Sobrien 613352284Sobrienvoid 6134132718Skandeallocate_reload_reg (int r) 613552284Sobrien{ 613652284Sobrien int regno; 613752284Sobrien 613890075Sobrien if (! rld[r].reg_rtx) 613952284Sobrien return; 614090075Sobrien regno = true_regnum (rld[r].reg_rtx); 614190075Sobrien rld[r].reg_rtx = 0; 614252284Sobrien if (spill_reg_order[regno] >= 0) 614390075Sobrien clear_reload_reg_in_use (regno, rld[r].opnum, rld[r].when_needed, 614490075Sobrien rld[r].mode); 614552284Sobrien reload_spill_index[r] = -1; 614652284Sobrien} 614718334Speter 6148117395Skan/* If SMALL_REGISTER_CLASSES is nonzero, we may not have merged two 614918334Speter reloads of the same item for fear that we might not have enough reload 615018334Speter registers. However, normally they will get the same reload register 615190075Sobrien and hence actually need not be loaded twice. 615218334Speter 615318334Speter Here we check for the most common case of this phenomenon: when we have 615418334Speter a number of reloads for the same object, each of which were allocated 615518334Speter the same reload_reg_rtx, that reload_reg_rtx is not used for any other 615618334Speter reload, and is not modified in the insn itself. If we find such, 615718334Speter merge all the reloads and set the resulting reload to RELOAD_OTHER. 615818334Speter This will not increase the number of spill registers needed and will 615918334Speter prevent redundant code. */ 616018334Speter 616118334Speterstatic void 6162132718Skanmerge_assigned_reloads (rtx insn) 616318334Speter{ 616418334Speter int i, j; 616518334Speter 616618334Speter /* Scan all the reloads looking for ones that only load values and 616718334Speter are not already RELOAD_OTHER and ones whose reload_reg_rtx are 616818334Speter assigned and not modified by INSN. */ 616918334Speter 617018334Speter for (i = 0; i < n_reloads; i++) 617118334Speter { 617250397Sobrien int conflicting_input = 0; 617350397Sobrien int max_input_address_opnum = -1; 617450397Sobrien int min_conflicting_input_opnum = MAX_RECOG_OPERANDS; 617550397Sobrien 617690075Sobrien if (rld[i].in == 0 || rld[i].when_needed == RELOAD_OTHER 617790075Sobrien || rld[i].out != 0 || rld[i].reg_rtx == 0 617890075Sobrien || reg_set_p (rld[i].reg_rtx, insn)) 617918334Speter continue; 618018334Speter 618118334Speter /* Look at all other reloads. Ensure that the only use of this 618218334Speter reload_reg_rtx is in a reload that just loads the same value 618318334Speter as we do. Note that any secondary reloads must be of the identical 618418334Speter class since the values, modes, and result registers are the 618518334Speter same, so we need not do anything with any secondary reloads. */ 618618334Speter 618718334Speter for (j = 0; j < n_reloads; j++) 618818334Speter { 618990075Sobrien if (i == j || rld[j].reg_rtx == 0 619090075Sobrien || ! reg_overlap_mentioned_p (rld[j].reg_rtx, 619190075Sobrien rld[i].reg_rtx)) 619218334Speter continue; 619318334Speter 619490075Sobrien if (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 619590075Sobrien && rld[j].opnum > max_input_address_opnum) 619690075Sobrien max_input_address_opnum = rld[j].opnum; 619750397Sobrien 619818334Speter /* If the reload regs aren't exactly the same (e.g, different modes) 619950397Sobrien or if the values are different, we can't merge this reload. 620050397Sobrien But if it is an input reload, we might still merge 620150397Sobrien RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_OTHER_ADDRESS reloads. */ 620218334Speter 620390075Sobrien if (! rtx_equal_p (rld[i].reg_rtx, rld[j].reg_rtx) 620490075Sobrien || rld[j].out != 0 || rld[j].in == 0 620590075Sobrien || ! rtx_equal_p (rld[i].in, rld[j].in)) 620650397Sobrien { 620790075Sobrien if (rld[j].when_needed != RELOAD_FOR_INPUT 620890075Sobrien || ((rld[i].when_needed != RELOAD_FOR_INPUT_ADDRESS 620990075Sobrien || rld[i].opnum > rld[j].opnum) 621090075Sobrien && rld[i].when_needed != RELOAD_FOR_OTHER_ADDRESS)) 621150397Sobrien break; 621250397Sobrien conflicting_input = 1; 621390075Sobrien if (min_conflicting_input_opnum > rld[j].opnum) 621490075Sobrien min_conflicting_input_opnum = rld[j].opnum; 621550397Sobrien } 621618334Speter } 621718334Speter 621818334Speter /* If all is OK, merge the reloads. Only set this to RELOAD_OTHER if 621918334Speter we, in fact, found any matching reloads. */ 622018334Speter 622150397Sobrien if (j == n_reloads 622250397Sobrien && max_input_address_opnum <= min_conflicting_input_opnum) 622318334Speter { 6224169689Skan gcc_assert (rld[i].when_needed != RELOAD_FOR_OUTPUT); 6225169689Skan 622618334Speter for (j = 0; j < n_reloads; j++) 622790075Sobrien if (i != j && rld[j].reg_rtx != 0 622890075Sobrien && rtx_equal_p (rld[i].reg_rtx, rld[j].reg_rtx) 622950397Sobrien && (! conflicting_input 623090075Sobrien || rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 623190075Sobrien || rld[j].when_needed == RELOAD_FOR_OTHER_ADDRESS)) 623218334Speter { 623390075Sobrien rld[i].when_needed = RELOAD_OTHER; 623490075Sobrien rld[j].in = 0; 623550397Sobrien reload_spill_index[j] = -1; 623618334Speter transfer_replacements (i, j); 623718334Speter } 623818334Speter 623918334Speter /* If this is now RELOAD_OTHER, look for any reloads that load 624018334Speter parts of this operand and set them to RELOAD_FOR_OTHER_ADDRESS 624118334Speter if they were for inputs, RELOAD_OTHER for outputs. Note that 624218334Speter this test is equivalent to looking for reloads for this operand 624318334Speter number. */ 6244169689Skan /* We must take special care with RELOAD_FOR_OUTPUT_ADDRESS; it may 6245169689Skan share registers with a RELOAD_FOR_INPUT, so we can not change it 6246169689Skan to RELOAD_FOR_OTHER_ADDRESS. We should never need to, since we 6247169689Skan do not modify RELOAD_FOR_OUTPUT. */ 624818334Speter 624990075Sobrien if (rld[i].when_needed == RELOAD_OTHER) 625018334Speter for (j = 0; j < n_reloads; j++) 625190075Sobrien if (rld[j].in != 0 625290075Sobrien && rld[j].when_needed != RELOAD_OTHER 6253117395Skan && rld[j].when_needed != RELOAD_FOR_OTHER_ADDRESS 6254169689Skan && rld[j].when_needed != RELOAD_FOR_OUTPUT_ADDRESS 6255117395Skan && (! conflicting_input 6256117395Skan || rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 6257117395Skan || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 625890075Sobrien && reg_overlap_mentioned_for_reload_p (rld[j].in, 625990075Sobrien rld[i].in)) 6260117395Skan { 6261117395Skan int k; 6262117395Skan 6263117395Skan rld[j].when_needed 6264117395Skan = ((rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 6265117395Skan || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 6266117395Skan ? RELOAD_FOR_OTHER_ADDRESS : RELOAD_OTHER); 6267117395Skan 6268169689Skan /* Check to see if we accidentally converted two 6269169689Skan reloads that use the same reload register with 6270169689Skan different inputs to the same type. If so, the 6271169689Skan resulting code won't work. */ 6272117395Skan if (rld[j].reg_rtx) 6273117395Skan for (k = 0; k < j; k++) 6274169689Skan gcc_assert (rld[k].in == 0 || rld[k].reg_rtx == 0 6275169689Skan || rld[k].when_needed != rld[j].when_needed 6276169689Skan || !rtx_equal_p (rld[k].reg_rtx, 6277169689Skan rld[j].reg_rtx) 6278169689Skan || rtx_equal_p (rld[k].in, 6279169689Skan rld[j].in)); 6280117395Skan } 628118334Speter } 628218334Speter } 628390075Sobrien} 628418334Speter 628590075Sobrien/* These arrays are filled by emit_reload_insns and its subroutines. */ 628690075Sobrienstatic rtx input_reload_insns[MAX_RECOG_OPERANDS]; 628790075Sobrienstatic rtx other_input_address_reload_insns = 0; 628890075Sobrienstatic rtx other_input_reload_insns = 0; 628990075Sobrienstatic rtx input_address_reload_insns[MAX_RECOG_OPERANDS]; 629090075Sobrienstatic rtx inpaddr_address_reload_insns[MAX_RECOG_OPERANDS]; 629190075Sobrienstatic rtx output_reload_insns[MAX_RECOG_OPERANDS]; 629290075Sobrienstatic rtx output_address_reload_insns[MAX_RECOG_OPERANDS]; 629390075Sobrienstatic rtx outaddr_address_reload_insns[MAX_RECOG_OPERANDS]; 629490075Sobrienstatic rtx operand_reload_insns = 0; 629590075Sobrienstatic rtx other_operand_reload_insns = 0; 629690075Sobrienstatic rtx other_output_reload_insns[MAX_RECOG_OPERANDS]; 629718334Speter 629890075Sobrien/* Values to be put in spill_reg_store are put here first. */ 629990075Sobrienstatic rtx new_spill_reg_store[FIRST_PSEUDO_REGISTER]; 630090075Sobrienstatic HARD_REG_SET reg_reloaded_died; 630190075Sobrien 6302169689Skan/* Check if *RELOAD_REG is suitable as an intermediate or scratch register 6303169689Skan of class NEW_CLASS with mode NEW_MODE. Or alternatively, if alt_reload_reg 6304169689Skan is nonzero, if that is suitable. On success, change *RELOAD_REG to the 6305169689Skan adjusted register, and return true. Otherwise, return false. */ 6306169689Skanstatic bool 6307169689Skanreload_adjust_reg_for_temp (rtx *reload_reg, rtx alt_reload_reg, 6308169689Skan enum reg_class new_class, 6309169689Skan enum machine_mode new_mode) 6310169689Skan 6311169689Skan{ 6312169689Skan rtx reg; 6313169689Skan 6314169689Skan for (reg = *reload_reg; reg; reg = alt_reload_reg, alt_reload_reg = 0) 6315169689Skan { 6316169689Skan unsigned regno = REGNO (reg); 6317169689Skan 6318169689Skan if (!TEST_HARD_REG_BIT (reg_class_contents[(int) new_class], regno)) 6319169689Skan continue; 6320169689Skan if (GET_MODE (reg) != new_mode) 6321169689Skan { 6322169689Skan if (!HARD_REGNO_MODE_OK (regno, new_mode)) 6323169689Skan continue; 6324169689Skan if (hard_regno_nregs[regno][new_mode] 6325169689Skan > hard_regno_nregs[regno][GET_MODE (reg)]) 6326169689Skan continue; 6327169689Skan reg = reload_adjust_reg_for_mode (reg, new_mode); 6328169689Skan } 6329169689Skan *reload_reg = reg; 6330169689Skan return true; 6331169689Skan } 6332169689Skan return false; 6333169689Skan} 6334169689Skan 6335169689Skan/* Check if *RELOAD_REG is suitable as a scratch register for the reload 6336169689Skan pattern with insn_code ICODE, or alternatively, if alt_reload_reg is 6337169689Skan nonzero, if that is suitable. On success, change *RELOAD_REG to the 6338169689Skan adjusted register, and return true. Otherwise, return false. */ 6339169689Skanstatic bool 6340169689Skanreload_adjust_reg_for_icode (rtx *reload_reg, rtx alt_reload_reg, 6341169689Skan enum insn_code icode) 6342169689Skan 6343169689Skan{ 6344169689Skan enum reg_class new_class = scratch_reload_class (icode); 6345169689Skan enum machine_mode new_mode = insn_data[(int) icode].operand[2].mode; 6346169689Skan 6347169689Skan return reload_adjust_reg_for_temp (reload_reg, alt_reload_reg, 6348169689Skan new_class, new_mode); 6349169689Skan} 6350169689Skan 635190075Sobrien/* Generate insns to perform reload RL, which is for the insn in CHAIN and 635290075Sobrien has the number J. OLD contains the value to be used as input. */ 635390075Sobrien 635418334Speterstatic void 6355132718Skanemit_input_reload_insns (struct insn_chain *chain, struct reload *rl, 6356132718Skan rtx old, int j) 635718334Speter{ 635852284Sobrien rtx insn = chain->insn; 635990075Sobrien rtx reloadreg = rl->reg_rtx; 636090075Sobrien rtx oldequiv_reg = 0; 636190075Sobrien rtx oldequiv = 0; 636290075Sobrien int special = 0; 636390075Sobrien enum machine_mode mode; 636490075Sobrien rtx *where; 636552284Sobrien 636690075Sobrien /* Determine the mode to reload in. 636790075Sobrien This is very tricky because we have three to choose from. 636890075Sobrien There is the mode the insn operand wants (rl->inmode). 636990075Sobrien There is the mode of the reload register RELOADREG. 637090075Sobrien There is the intrinsic mode of the operand, which we could find 637190075Sobrien by stripping some SUBREGs. 637290075Sobrien It turns out that RELOADREG's mode is irrelevant: 637390075Sobrien we can change that arbitrarily. 637418334Speter 637590075Sobrien Consider (SUBREG:SI foo:QI) as an operand that must be SImode; 637690075Sobrien then the reload reg may not support QImode moves, so use SImode. 637790075Sobrien If foo is in memory due to spilling a pseudo reg, this is safe, 637890075Sobrien because the QImode value is in the least significant part of a 637990075Sobrien slot big enough for a SImode. If foo is some other sort of 638090075Sobrien memory reference, then it is impossible to reload this case, 638190075Sobrien so previous passes had better make sure this never happens. 638250397Sobrien 638390075Sobrien Then consider a one-word union which has SImode and one of its 638490075Sobrien members is a float, being fetched as (SUBREG:SF union:SI). 638590075Sobrien We must fetch that as SFmode because we could be loading into 638690075Sobrien a float-only register. In this case OLD's mode is correct. 638718334Speter 638890075Sobrien Consider an immediate integer: it has VOIDmode. Here we need 638990075Sobrien to get a mode from something else. 639018334Speter 639190075Sobrien In some cases, there is a fourth mode, the operand's 639290075Sobrien containing mode. If the insn specifies a containing mode for 639390075Sobrien this operand, it overrides all others. 639418334Speter 639590075Sobrien I am not sure whether the algorithm here is always right, 639690075Sobrien but it does the right things in those cases. */ 639718334Speter 639890075Sobrien mode = GET_MODE (old); 639990075Sobrien if (mode == VOIDmode) 640090075Sobrien mode = rl->inmode; 640152284Sobrien 640290075Sobrien /* delete_output_reload is only invoked properly if old contains 640390075Sobrien the original pseudo register. Since this is replaced with a 640490075Sobrien hard reg when RELOAD_OVERRIDE_IN is set, see if we can 640590075Sobrien find the pseudo in RELOAD_IN_REG. */ 6406169689Skan if (reload_override_in[j] 6407169689Skan && REG_P (rl->in_reg)) 640890075Sobrien { 640990075Sobrien oldequiv = old; 641090075Sobrien old = rl->in_reg; 641190075Sobrien } 641290075Sobrien if (oldequiv == 0) 641390075Sobrien oldequiv = old; 6414169689Skan else if (REG_P (oldequiv)) 641590075Sobrien oldequiv_reg = oldequiv; 641690075Sobrien else if (GET_CODE (oldequiv) == SUBREG) 641790075Sobrien oldequiv_reg = SUBREG_REG (oldequiv); 641818334Speter 641990075Sobrien /* If we are reloading from a register that was recently stored in 642090075Sobrien with an output-reload, see if we can prove there was 642190075Sobrien actually no need to store the old value in it. */ 642218334Speter 6423169689Skan if (optimize && REG_P (oldequiv) 642490075Sobrien && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER 642590075Sobrien && spill_reg_store[REGNO (oldequiv)] 6426169689Skan && REG_P (old) 642790075Sobrien && (dead_or_set_p (insn, spill_reg_stored_to[REGNO (oldequiv)]) 642890075Sobrien || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)], 642990075Sobrien rl->out_reg))) 643090075Sobrien delete_output_reload (insn, j, REGNO (oldequiv)); 643118334Speter 643290075Sobrien /* Encapsulate both RELOADREG and OLDEQUIV into that mode, 643390075Sobrien then load RELOADREG from OLDEQUIV. Note that we cannot use 643490075Sobrien gen_lowpart_common since it can do the wrong thing when 643590075Sobrien RELOADREG has a multi-word mode. Note that RELOADREG 643690075Sobrien must always be a REG here. */ 643718334Speter 643890075Sobrien if (GET_MODE (reloadreg) != mode) 6439132718Skan reloadreg = reload_adjust_reg_for_mode (reloadreg, mode); 644090075Sobrien while (GET_CODE (oldequiv) == SUBREG && GET_MODE (oldequiv) != mode) 644190075Sobrien oldequiv = SUBREG_REG (oldequiv); 644290075Sobrien if (GET_MODE (oldequiv) != VOIDmode 644390075Sobrien && mode != GET_MODE (oldequiv)) 644490075Sobrien oldequiv = gen_lowpart_SUBREG (mode, oldequiv); 644518334Speter 644690075Sobrien /* Switch to the right place to emit the reload insns. */ 644790075Sobrien switch (rl->when_needed) 644890075Sobrien { 644990075Sobrien case RELOAD_OTHER: 645090075Sobrien where = &other_input_reload_insns; 645190075Sobrien break; 645290075Sobrien case RELOAD_FOR_INPUT: 645390075Sobrien where = &input_reload_insns[rl->opnum]; 645490075Sobrien break; 645590075Sobrien case RELOAD_FOR_INPUT_ADDRESS: 645690075Sobrien where = &input_address_reload_insns[rl->opnum]; 645790075Sobrien break; 645890075Sobrien case RELOAD_FOR_INPADDR_ADDRESS: 645990075Sobrien where = &inpaddr_address_reload_insns[rl->opnum]; 646090075Sobrien break; 646190075Sobrien case RELOAD_FOR_OUTPUT_ADDRESS: 646290075Sobrien where = &output_address_reload_insns[rl->opnum]; 646390075Sobrien break; 646490075Sobrien case RELOAD_FOR_OUTADDR_ADDRESS: 646590075Sobrien where = &outaddr_address_reload_insns[rl->opnum]; 646690075Sobrien break; 646790075Sobrien case RELOAD_FOR_OPERAND_ADDRESS: 646890075Sobrien where = &operand_reload_insns; 646990075Sobrien break; 647090075Sobrien case RELOAD_FOR_OPADDR_ADDR: 647190075Sobrien where = &other_operand_reload_insns; 647290075Sobrien break; 647390075Sobrien case RELOAD_FOR_OTHER_ADDRESS: 647490075Sobrien where = &other_input_address_reload_insns; 647590075Sobrien break; 647690075Sobrien default: 6477169689Skan gcc_unreachable (); 647890075Sobrien } 647918334Speter 648090075Sobrien push_to_sequence (*where); 648118334Speter 648290075Sobrien /* Auto-increment addresses must be reloaded in a special way. */ 648390075Sobrien if (rl->out && ! rl->out_reg) 648490075Sobrien { 648590075Sobrien /* We are not going to bother supporting the case where a 648690075Sobrien incremented register can't be copied directly from 648790075Sobrien OLDEQUIV since this seems highly unlikely. */ 6488169689Skan gcc_assert (rl->secondary_in_reload < 0); 648918334Speter 649090075Sobrien if (reload_inherited[j]) 649190075Sobrien oldequiv = reloadreg; 649218334Speter 649390075Sobrien old = XEXP (rl->in_reg, 0); 649418334Speter 6495169689Skan if (optimize && REG_P (oldequiv) 649690075Sobrien && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER 649790075Sobrien && spill_reg_store[REGNO (oldequiv)] 6498169689Skan && REG_P (old) 649990075Sobrien && (dead_or_set_p (insn, 650090075Sobrien spill_reg_stored_to[REGNO (oldequiv)]) 650190075Sobrien || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)], 650290075Sobrien old))) 650390075Sobrien delete_output_reload (insn, j, REGNO (oldequiv)); 650418334Speter 650590075Sobrien /* Prevent normal processing of this reload. */ 650690075Sobrien special = 1; 650790075Sobrien /* Output a special code sequence for this case. */ 650890075Sobrien new_spill_reg_store[REGNO (reloadreg)] 650990075Sobrien = inc_for_reload (reloadreg, oldequiv, rl->out, 651090075Sobrien rl->inc); 651190075Sobrien } 651290075Sobrien 651390075Sobrien /* If we are reloading a pseudo-register that was set by the previous 651490075Sobrien insn, see if we can get rid of that pseudo-register entirely 651590075Sobrien by redirecting the previous insn into our reload register. */ 651690075Sobrien 6517169689Skan else if (optimize && REG_P (old) 651890075Sobrien && REGNO (old) >= FIRST_PSEUDO_REGISTER 651990075Sobrien && dead_or_set_p (insn, old) 652090075Sobrien /* This is unsafe if some other reload 652190075Sobrien uses the same reg first. */ 652290075Sobrien && ! conflicts_with_override (reloadreg) 652390075Sobrien && free_for_value_p (REGNO (reloadreg), rl->mode, rl->opnum, 652490075Sobrien rl->when_needed, old, rl->out, j, 0)) 652590075Sobrien { 652690075Sobrien rtx temp = PREV_INSN (insn); 6527169689Skan while (temp && NOTE_P (temp)) 652890075Sobrien temp = PREV_INSN (temp); 652990075Sobrien if (temp 6530169689Skan && NONJUMP_INSN_P (temp) 653190075Sobrien && GET_CODE (PATTERN (temp)) == SET 653290075Sobrien && SET_DEST (PATTERN (temp)) == old 653390075Sobrien /* Make sure we can access insn_operand_constraint. */ 653490075Sobrien && asm_noperands (PATTERN (temp)) < 0 653590075Sobrien /* This is unsafe if operand occurs more than once in current 653690075Sobrien insn. Perhaps some occurrences aren't reloaded. */ 6537107590Sobrien && count_occurrences (PATTERN (insn), old, 0) == 1) 653890075Sobrien { 6539107590Sobrien rtx old = SET_DEST (PATTERN (temp)); 654090075Sobrien /* Store into the reload register instead of the pseudo. */ 654190075Sobrien SET_DEST (PATTERN (temp)) = reloadreg; 654290075Sobrien 6543107590Sobrien /* Verify that resulting insn is valid. */ 6544107590Sobrien extract_insn (temp); 6545107590Sobrien if (constrain_operands (1)) 654618334Speter { 6547107590Sobrien /* If the previous insn is an output reload, the source is 6548107590Sobrien a reload register, and its spill_reg_store entry will 6549107590Sobrien contain the previous destination. This is now 6550107590Sobrien invalid. */ 6551169689Skan if (REG_P (SET_SRC (PATTERN (temp))) 6552107590Sobrien && REGNO (SET_SRC (PATTERN (temp))) < FIRST_PSEUDO_REGISTER) 6553107590Sobrien { 6554107590Sobrien spill_reg_store[REGNO (SET_SRC (PATTERN (temp)))] = 0; 6555107590Sobrien spill_reg_stored_to[REGNO (SET_SRC (PATTERN (temp)))] = 0; 6556107590Sobrien } 6557107590Sobrien 6558107590Sobrien /* If these are the only uses of the pseudo reg, 6559107590Sobrien pretend for GDB it lives in the reload reg we used. */ 6560107590Sobrien if (REG_N_DEATHS (REGNO (old)) == 1 6561107590Sobrien && REG_N_SETS (REGNO (old)) == 1) 6562107590Sobrien { 6563107590Sobrien reg_renumber[REGNO (old)] = REGNO (rl->reg_rtx); 6564107590Sobrien alter_reg (REGNO (old), -1); 6565107590Sobrien } 6566107590Sobrien special = 1; 656718334Speter } 6568107590Sobrien else 656918334Speter { 6570107590Sobrien SET_DEST (PATTERN (temp)) = old; 657190075Sobrien } 657290075Sobrien } 657390075Sobrien } 657452284Sobrien 657590075Sobrien /* We can't do that, so output an insn to load RELOADREG. */ 657652284Sobrien 657790075Sobrien /* If we have a secondary reload, pick up the secondary register 657890075Sobrien and icode, if any. If OLDEQUIV and OLD are different or 657990075Sobrien if this is an in-out reload, recompute whether or not we 658090075Sobrien still need a secondary register and what the icode should 658190075Sobrien be. If we still need a secondary register and the class or 658290075Sobrien icode is different, go back to reloading from OLD if using 658390075Sobrien OLDEQUIV means that we got the wrong type of register. We 658490075Sobrien cannot have different class or icode due to an in-out reload 658590075Sobrien because we don't make such reloads when both the input and 658690075Sobrien output need secondary reload registers. */ 658752284Sobrien 658890075Sobrien if (! special && rl->secondary_in_reload >= 0) 658990075Sobrien { 659090075Sobrien rtx second_reload_reg = 0; 6591169689Skan rtx third_reload_reg = 0; 659290075Sobrien int secondary_reload = rl->secondary_in_reload; 659390075Sobrien rtx real_oldequiv = oldequiv; 659490075Sobrien rtx real_old = old; 659590075Sobrien rtx tmp; 659690075Sobrien enum insn_code icode; 6597169689Skan enum insn_code tertiary_icode = CODE_FOR_nothing; 659852284Sobrien 659990075Sobrien /* If OLDEQUIV is a pseudo with a MEM, get the real MEM 660090075Sobrien and similarly for OLD. 660190075Sobrien See comments in get_secondary_reload in reload.c. */ 660290075Sobrien /* If it is a pseudo that cannot be replaced with its 660390075Sobrien equivalent MEM, we must fall back to reload_in, which 660490075Sobrien will have all the necessary substitutions registered. 660590075Sobrien Likewise for a pseudo that can't be replaced with its 660690075Sobrien equivalent constant. 660718334Speter 660890075Sobrien Take extra care for subregs of such pseudos. Note that 660990075Sobrien we cannot use reg_equiv_mem in this case because it is 661090075Sobrien not in the right mode. */ 661118334Speter 661290075Sobrien tmp = oldequiv; 661390075Sobrien if (GET_CODE (tmp) == SUBREG) 661490075Sobrien tmp = SUBREG_REG (tmp); 6615169689Skan if (REG_P (tmp) 661690075Sobrien && REGNO (tmp) >= FIRST_PSEUDO_REGISTER 661790075Sobrien && (reg_equiv_memory_loc[REGNO (tmp)] != 0 661890075Sobrien || reg_equiv_constant[REGNO (tmp)] != 0)) 661990075Sobrien { 662090075Sobrien if (! reg_equiv_mem[REGNO (tmp)] 662190075Sobrien || num_not_at_initial_offset 662290075Sobrien || GET_CODE (oldequiv) == SUBREG) 662390075Sobrien real_oldequiv = rl->in; 662490075Sobrien else 662590075Sobrien real_oldequiv = reg_equiv_mem[REGNO (tmp)]; 662690075Sobrien } 662790075Sobrien 662890075Sobrien tmp = old; 662990075Sobrien if (GET_CODE (tmp) == SUBREG) 663090075Sobrien tmp = SUBREG_REG (tmp); 6631169689Skan if (REG_P (tmp) 663290075Sobrien && REGNO (tmp) >= FIRST_PSEUDO_REGISTER 663390075Sobrien && (reg_equiv_memory_loc[REGNO (tmp)] != 0 663490075Sobrien || reg_equiv_constant[REGNO (tmp)] != 0)) 663590075Sobrien { 663690075Sobrien if (! reg_equiv_mem[REGNO (tmp)] 663790075Sobrien || num_not_at_initial_offset 663890075Sobrien || GET_CODE (old) == SUBREG) 663990075Sobrien real_old = rl->in; 664090075Sobrien else 664190075Sobrien real_old = reg_equiv_mem[REGNO (tmp)]; 664290075Sobrien } 664390075Sobrien 664490075Sobrien second_reload_reg = rld[secondary_reload].reg_rtx; 6645169689Skan if (rld[secondary_reload].secondary_in_reload >= 0) 6646169689Skan { 6647169689Skan int tertiary_reload = rld[secondary_reload].secondary_in_reload; 6648169689Skan 6649169689Skan third_reload_reg = rld[tertiary_reload].reg_rtx; 6650169689Skan tertiary_icode = rld[secondary_reload].secondary_in_icode; 6651169689Skan /* We'd have to add more code for quartary reloads. */ 6652169689Skan gcc_assert (rld[tertiary_reload].secondary_in_reload < 0); 6653169689Skan } 665490075Sobrien icode = rl->secondary_in_icode; 665590075Sobrien 665690075Sobrien if ((old != oldequiv && ! rtx_equal_p (old, oldequiv)) 665790075Sobrien || (rl->in != 0 && rl->out != 0)) 665890075Sobrien { 6659169689Skan secondary_reload_info sri, sri2; 6660169689Skan enum reg_class new_class, new_t_class; 666190075Sobrien 6662169689Skan sri.icode = CODE_FOR_nothing; 6663169689Skan sri.prev_sri = NULL; 6664169689Skan new_class = targetm.secondary_reload (1, real_oldequiv, rl->class, 6665169689Skan mode, &sri); 6666169689Skan 6667169689Skan if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing) 666890075Sobrien second_reload_reg = 0; 6669169689Skan else if (new_class == NO_REGS) 6670169689Skan { 6671169689Skan if (reload_adjust_reg_for_icode (&second_reload_reg, 6672169689Skan third_reload_reg, sri.icode)) 6673169689Skan icode = sri.icode, third_reload_reg = 0; 6674169689Skan else 6675169689Skan oldequiv = old, real_oldequiv = real_old; 6676169689Skan } 6677169689Skan else if (sri.icode != CODE_FOR_nothing) 6678169689Skan /* We currently lack a way to express this in reloads. */ 6679169689Skan gcc_unreachable (); 668090075Sobrien else 668118334Speter { 6682169689Skan sri2.icode = CODE_FOR_nothing; 6683169689Skan sri2.prev_sri = &sri; 6684169689Skan new_t_class = targetm.secondary_reload (1, real_oldequiv, 6685169689Skan new_class, mode, &sri); 6686169689Skan if (new_t_class == NO_REGS && sri2.icode == CODE_FOR_nothing) 668718334Speter { 6688169689Skan if (reload_adjust_reg_for_temp (&second_reload_reg, 6689169689Skan third_reload_reg, 6690169689Skan new_class, mode)) 6691169689Skan third_reload_reg = 0, tertiary_icode = sri2.icode; 6692169689Skan else 6693169689Skan oldequiv = old, real_oldequiv = real_old; 6694169689Skan } 6695169689Skan else if (new_t_class == NO_REGS && sri2.icode != CODE_FOR_nothing) 6696169689Skan { 6697169689Skan rtx intermediate = second_reload_reg; 669852284Sobrien 6699169689Skan if (reload_adjust_reg_for_temp (&intermediate, NULL, 6700169689Skan new_class, mode) 6701169689Skan && reload_adjust_reg_for_icode (&third_reload_reg, NULL, 6702169689Skan sri2.icode)) 6703169689Skan { 6704169689Skan second_reload_reg = intermediate; 6705169689Skan tertiary_icode = sri2.icode; 6706169689Skan } 670790075Sobrien else 6708169689Skan oldequiv = old, real_oldequiv = real_old; 6709169689Skan } 6710169689Skan else if (new_t_class != NO_REGS && sri2.icode == CODE_FOR_nothing) 6711169689Skan { 6712169689Skan rtx intermediate = second_reload_reg; 671352284Sobrien 6714169689Skan if (reload_adjust_reg_for_temp (&intermediate, NULL, 6715169689Skan new_class, mode) 6716169689Skan && reload_adjust_reg_for_temp (&third_reload_reg, NULL, 6717169689Skan new_t_class, mode)) 671818334Speter { 6719169689Skan second_reload_reg = intermediate; 6720169689Skan tertiary_icode = sri2.icode; 672118334Speter } 6722169689Skan else 6723169689Skan oldequiv = old, real_oldequiv = real_old; 672418334Speter } 6725169689Skan else 6726169689Skan /* This could be handled more intelligently too. */ 6727169689Skan oldequiv = old, real_oldequiv = real_old; 672818334Speter } 672990075Sobrien } 673018334Speter 673190075Sobrien /* If we still need a secondary reload register, check 673290075Sobrien to see if it is being used as a scratch or intermediate 673390075Sobrien register and generate code appropriately. If we need 673490075Sobrien a scratch register, use REAL_OLDEQUIV since the form of 673590075Sobrien the insn may depend on the actual address if it is 673690075Sobrien a MEM. */ 673718334Speter 673890075Sobrien if (second_reload_reg) 673990075Sobrien { 674090075Sobrien if (icode != CODE_FOR_nothing) 674118334Speter { 6742169689Skan /* We'd have to add extra code to handle this case. */ 6743169689Skan gcc_assert (!third_reload_reg); 6744169689Skan 674590075Sobrien emit_insn (GEN_FCN (icode) (reloadreg, real_oldequiv, 674690075Sobrien second_reload_reg)); 674790075Sobrien special = 1; 674890075Sobrien } 674990075Sobrien else 675090075Sobrien { 675190075Sobrien /* See if we need a scratch register to load the 675290075Sobrien intermediate register (a tertiary reload). */ 675390075Sobrien if (tertiary_icode != CODE_FOR_nothing) 675418334Speter { 675590075Sobrien emit_insn ((GEN_FCN (tertiary_icode) 675690075Sobrien (second_reload_reg, real_oldequiv, 675790075Sobrien third_reload_reg))); 675890075Sobrien } 6759169689Skan else if (third_reload_reg) 6760169689Skan { 6761169689Skan gen_reload (third_reload_reg, real_oldequiv, 6762169689Skan rl->opnum, 6763169689Skan rl->when_needed); 6764169689Skan gen_reload (second_reload_reg, third_reload_reg, 6765169689Skan rl->opnum, 6766169689Skan rl->when_needed); 6767169689Skan } 676890075Sobrien else 676990075Sobrien gen_reload (second_reload_reg, real_oldequiv, 677090075Sobrien rl->opnum, 677190075Sobrien rl->when_needed); 677218334Speter 677390075Sobrien oldequiv = second_reload_reg; 677490075Sobrien } 677590075Sobrien } 677690075Sobrien } 677718334Speter 677890075Sobrien if (! special && ! rtx_equal_p (reloadreg, oldequiv)) 677990075Sobrien { 678090075Sobrien rtx real_oldequiv = oldequiv; 678152284Sobrien 6782169689Skan if ((REG_P (oldequiv) 678390075Sobrien && REGNO (oldequiv) >= FIRST_PSEUDO_REGISTER 678490075Sobrien && (reg_equiv_memory_loc[REGNO (oldequiv)] != 0 678590075Sobrien || reg_equiv_constant[REGNO (oldequiv)] != 0)) 678690075Sobrien || (GET_CODE (oldequiv) == SUBREG 6787169689Skan && REG_P (SUBREG_REG (oldequiv)) 678890075Sobrien && (REGNO (SUBREG_REG (oldequiv)) 678990075Sobrien >= FIRST_PSEUDO_REGISTER) 679090075Sobrien && ((reg_equiv_memory_loc 679190075Sobrien [REGNO (SUBREG_REG (oldequiv))] != 0) 679290075Sobrien || (reg_equiv_constant 679390075Sobrien [REGNO (SUBREG_REG (oldequiv))] != 0))) 679490075Sobrien || (CONSTANT_P (oldequiv) 679590075Sobrien && (PREFERRED_RELOAD_CLASS (oldequiv, 679690075Sobrien REGNO_REG_CLASS (REGNO (reloadreg))) 679790075Sobrien == NO_REGS))) 679890075Sobrien real_oldequiv = rl->in; 679990075Sobrien gen_reload (reloadreg, real_oldequiv, rl->opnum, 680090075Sobrien rl->when_needed); 680190075Sobrien } 680218334Speter 680390075Sobrien if (flag_non_call_exceptions) 680490075Sobrien copy_eh_notes (insn, get_insns ()); 680518334Speter 680690075Sobrien /* End this sequence. */ 680790075Sobrien *where = get_insns (); 680890075Sobrien end_sequence (); 6809117395Skan 681090075Sobrien /* Update reload_override_in so that delete_address_reloads_1 681190075Sobrien can see the actual register usage. */ 681290075Sobrien if (oldequiv_reg) 681390075Sobrien reload_override_in[j] = oldequiv; 681490075Sobrien} 681518334Speter 681690075Sobrien/* Generate insns to for the output reload RL, which is for the insn described 681790075Sobrien by CHAIN and has the number J. */ 681890075Sobrienstatic void 6819132718Skanemit_output_reload_insns (struct insn_chain *chain, struct reload *rl, 6820132718Skan int j) 682190075Sobrien{ 682290075Sobrien rtx reloadreg = rl->reg_rtx; 682390075Sobrien rtx insn = chain->insn; 682490075Sobrien int special = 0; 682590075Sobrien rtx old = rl->out; 682690075Sobrien enum machine_mode mode = GET_MODE (old); 682790075Sobrien rtx p; 682818334Speter 682990075Sobrien if (rl->when_needed == RELOAD_OTHER) 683090075Sobrien start_sequence (); 683190075Sobrien else 683290075Sobrien push_to_sequence (output_reload_insns[rl->opnum]); 683318334Speter 683490075Sobrien /* Determine the mode to reload in. 683590075Sobrien See comments above (for input reloading). */ 683618334Speter 683790075Sobrien if (mode == VOIDmode) 683890075Sobrien { 683990075Sobrien /* VOIDmode should never happen for an output. */ 684090075Sobrien if (asm_noperands (PATTERN (insn)) < 0) 684190075Sobrien /* It's the compiler's fault. */ 684290075Sobrien fatal_insn ("VOIDmode on an output", insn); 6843169689Skan error_for_asm (insn, "output operand is constant in %<asm%>"); 684490075Sobrien /* Prevent crash--use something we know is valid. */ 684590075Sobrien mode = word_mode; 684690075Sobrien old = gen_rtx_REG (mode, REGNO (reloadreg)); 684790075Sobrien } 684818334Speter 684990075Sobrien if (GET_MODE (reloadreg) != mode) 6850132718Skan reloadreg = reload_adjust_reg_for_mode (reloadreg, mode); 685118334Speter 685290075Sobrien /* If we need two reload regs, set RELOADREG to the intermediate 685390075Sobrien one, since it will be stored into OLD. We might need a secondary 685490075Sobrien register only for an input reload, so check again here. */ 685518334Speter 685690075Sobrien if (rl->secondary_out_reload >= 0) 685790075Sobrien { 685890075Sobrien rtx real_old = old; 6859169689Skan int secondary_reload = rl->secondary_out_reload; 6860169689Skan int tertiary_reload = rld[secondary_reload].secondary_out_reload; 686118334Speter 6862169689Skan if (REG_P (old) && REGNO (old) >= FIRST_PSEUDO_REGISTER 686390075Sobrien && reg_equiv_mem[REGNO (old)] != 0) 686490075Sobrien real_old = reg_equiv_mem[REGNO (old)]; 686518334Speter 6866169689Skan if (secondary_reload_class (0, rl->class, mode, real_old) != NO_REGS) 686790075Sobrien { 686890075Sobrien rtx second_reloadreg = reloadreg; 6869169689Skan reloadreg = rld[secondary_reload].reg_rtx; 687052284Sobrien 687190075Sobrien /* See if RELOADREG is to be used as a scratch register 687290075Sobrien or as an intermediate register. */ 687390075Sobrien if (rl->secondary_out_icode != CODE_FOR_nothing) 687490075Sobrien { 6875169689Skan /* We'd have to add extra code to handle this case. */ 6876169689Skan gcc_assert (tertiary_reload < 0); 6877169689Skan 687890075Sobrien emit_insn ((GEN_FCN (rl->secondary_out_icode) 687990075Sobrien (real_old, second_reloadreg, reloadreg))); 688090075Sobrien special = 1; 688118334Speter } 688290075Sobrien else 688390075Sobrien { 688490075Sobrien /* See if we need both a scratch and intermediate reload 688590075Sobrien register. */ 688618334Speter 688790075Sobrien enum insn_code tertiary_icode 688890075Sobrien = rld[secondary_reload].secondary_out_icode; 688952284Sobrien 6890169689Skan /* We'd have to add more code for quartary reloads. */ 6891169689Skan gcc_assert (tertiary_reload < 0 6892169689Skan || rld[tertiary_reload].secondary_out_reload < 0); 6893169689Skan 689490075Sobrien if (GET_MODE (reloadreg) != mode) 6895132718Skan reloadreg = reload_adjust_reg_for_mode (reloadreg, mode); 689618334Speter 689790075Sobrien if (tertiary_icode != CODE_FOR_nothing) 689890075Sobrien { 6899169689Skan rtx third_reloadreg = rld[tertiary_reload].reg_rtx; 690090075Sobrien rtx tem; 690118334Speter 690290075Sobrien /* Copy primary reload reg to secondary reload reg. 690390075Sobrien (Note that these have been swapped above, then 690490075Sobrien secondary reload reg to OLD using our insn.) */ 690518334Speter 690690075Sobrien /* If REAL_OLD is a paradoxical SUBREG, remove it 690790075Sobrien and try to put the opposite SUBREG on 690890075Sobrien RELOADREG. */ 690990075Sobrien if (GET_CODE (real_old) == SUBREG 691090075Sobrien && (GET_MODE_SIZE (GET_MODE (real_old)) 691190075Sobrien > GET_MODE_SIZE (GET_MODE (SUBREG_REG (real_old)))) 691290075Sobrien && 0 != (tem = gen_lowpart_common 691390075Sobrien (GET_MODE (SUBREG_REG (real_old)), 691490075Sobrien reloadreg))) 691590075Sobrien real_old = SUBREG_REG (real_old), reloadreg = tem; 691618334Speter 691790075Sobrien gen_reload (reloadreg, second_reloadreg, 691890075Sobrien rl->opnum, rl->when_needed); 691990075Sobrien emit_insn ((GEN_FCN (tertiary_icode) 692090075Sobrien (real_old, reloadreg, third_reloadreg))); 692190075Sobrien special = 1; 692290075Sobrien } 692318334Speter 692490075Sobrien else 6925169689Skan { 6926169689Skan /* Copy between the reload regs here and then to 6927169689Skan OUT later. */ 692852284Sobrien 6929169689Skan gen_reload (reloadreg, second_reloadreg, 6930169689Skan rl->opnum, rl->when_needed); 6931169689Skan if (tertiary_reload >= 0) 6932169689Skan { 6933169689Skan rtx third_reloadreg = rld[tertiary_reload].reg_rtx; 6934169689Skan 6935169689Skan gen_reload (third_reloadreg, reloadreg, 6936169689Skan rl->opnum, rl->when_needed); 6937169689Skan reloadreg = third_reloadreg; 6938169689Skan } 6939169689Skan } 694090075Sobrien } 694190075Sobrien } 694290075Sobrien } 694318334Speter 694490075Sobrien /* Output the last reload insn. */ 694590075Sobrien if (! special) 694690075Sobrien { 694790075Sobrien rtx set; 694818334Speter 694990075Sobrien /* Don't output the last reload if OLD is not the dest of 695090075Sobrien INSN and is in the src and is clobbered by INSN. */ 695190075Sobrien if (! flag_expensive_optimizations 6952169689Skan || !REG_P (old) 695390075Sobrien || !(set = single_set (insn)) 695490075Sobrien || rtx_equal_p (old, SET_DEST (set)) 695590075Sobrien || !reg_mentioned_p (old, SET_SRC (set)) 6956169689Skan || !((REGNO (old) < FIRST_PSEUDO_REGISTER) 6957169689Skan && regno_clobbered_p (REGNO (old), insn, rl->mode, 0))) 695890075Sobrien gen_reload (old, reloadreg, rl->opnum, 695990075Sobrien rl->when_needed); 696090075Sobrien } 696118334Speter 696290075Sobrien /* Look at all insns we emitted, just to be safe. */ 696390075Sobrien for (p = get_insns (); p; p = NEXT_INSN (p)) 696490075Sobrien if (INSN_P (p)) 696590075Sobrien { 696690075Sobrien rtx pat = PATTERN (p); 696718334Speter 696890075Sobrien /* If this output reload doesn't come from a spill reg, 696990075Sobrien clear any memory of reloaded copies of the pseudo reg. 697090075Sobrien If this output reload comes from a spill reg, 697190075Sobrien reg_has_output_reload will make this do nothing. */ 697290075Sobrien note_stores (pat, forget_old_reloads_1, NULL); 697318334Speter 697490075Sobrien if (reg_mentioned_p (rl->reg_rtx, pat)) 697590075Sobrien { 697690075Sobrien rtx set = single_set (insn); 697790075Sobrien if (reload_spill_index[j] < 0 697890075Sobrien && set 697990075Sobrien && SET_SRC (set) == rl->reg_rtx) 698090075Sobrien { 698190075Sobrien int src = REGNO (SET_SRC (set)); 698218334Speter 698390075Sobrien reload_spill_index[j] = src; 698490075Sobrien SET_HARD_REG_BIT (reg_is_output_reload, src); 698590075Sobrien if (find_regno_note (insn, REG_DEAD, src)) 698690075Sobrien SET_HARD_REG_BIT (reg_reloaded_died, src); 698790075Sobrien } 698890075Sobrien if (REGNO (rl->reg_rtx) < FIRST_PSEUDO_REGISTER) 698990075Sobrien { 699090075Sobrien int s = rl->secondary_out_reload; 699190075Sobrien set = single_set (p); 699290075Sobrien /* If this reload copies only to the secondary reload 699390075Sobrien register, the secondary reload does the actual 699490075Sobrien store. */ 699590075Sobrien if (s >= 0 && set == NULL_RTX) 699690075Sobrien /* We can't tell what function the secondary reload 699790075Sobrien has and where the actual store to the pseudo is 699890075Sobrien made; leave new_spill_reg_store alone. */ 699990075Sobrien ; 700090075Sobrien else if (s >= 0 700190075Sobrien && SET_SRC (set) == rl->reg_rtx 700290075Sobrien && SET_DEST (set) == rld[s].reg_rtx) 700390075Sobrien { 700490075Sobrien /* Usually the next instruction will be the 700590075Sobrien secondary reload insn; if we can confirm 700690075Sobrien that it is, setting new_spill_reg_store to 700790075Sobrien that insn will allow an extra optimization. */ 700890075Sobrien rtx s_reg = rld[s].reg_rtx; 700990075Sobrien rtx next = NEXT_INSN (p); 701090075Sobrien rld[s].out = rl->out; 701190075Sobrien rld[s].out_reg = rl->out_reg; 701290075Sobrien set = single_set (next); 701390075Sobrien if (set && SET_SRC (set) == s_reg 701490075Sobrien && ! new_spill_reg_store[REGNO (s_reg)]) 701590075Sobrien { 701690075Sobrien SET_HARD_REG_BIT (reg_is_output_reload, 701790075Sobrien REGNO (s_reg)); 701890075Sobrien new_spill_reg_store[REGNO (s_reg)] = next; 701990075Sobrien } 702090075Sobrien } 702190075Sobrien else 702290075Sobrien new_spill_reg_store[REGNO (rl->reg_rtx)] = p; 702390075Sobrien } 702490075Sobrien } 702590075Sobrien } 702652284Sobrien 702790075Sobrien if (rl->when_needed == RELOAD_OTHER) 702890075Sobrien { 7029117395Skan emit_insn (other_output_reload_insns[rl->opnum]); 703090075Sobrien other_output_reload_insns[rl->opnum] = get_insns (); 703190075Sobrien } 703290075Sobrien else 703390075Sobrien output_reload_insns[rl->opnum] = get_insns (); 703418334Speter 703590075Sobrien if (flag_non_call_exceptions) 703690075Sobrien copy_eh_notes (insn, get_insns ()); 703718334Speter 703890075Sobrien end_sequence (); 703990075Sobrien} 704018334Speter 704190075Sobrien/* Do input reloading for reload RL, which is for the insn described by CHAIN 704290075Sobrien and has the number J. */ 704390075Sobrienstatic void 7044132718Skando_input_reload (struct insn_chain *chain, struct reload *rl, int j) 704590075Sobrien{ 704690075Sobrien rtx insn = chain->insn; 7047169689Skan rtx old = (rl->in && MEM_P (rl->in) 704890075Sobrien ? rl->in_reg : rl->in); 704918334Speter 705090075Sobrien if (old != 0 705190075Sobrien /* AUTO_INC reloads need to be handled even if inherited. We got an 705290075Sobrien AUTO_INC reload if reload_out is set but reload_out_reg isn't. */ 705390075Sobrien && (! reload_inherited[j] || (rl->out && ! rl->out_reg)) 705490075Sobrien && ! rtx_equal_p (rl->reg_rtx, old) 705590075Sobrien && rl->reg_rtx != 0) 705690075Sobrien emit_input_reload_insns (chain, rld + j, old, j); 705718334Speter 705890075Sobrien /* When inheriting a wider reload, we have a MEM in rl->in, 705990075Sobrien e.g. inheriting a SImode output reload for 706090075Sobrien (mem:HI (plus:SI (reg:SI 14 fp) (const_int 10))) */ 706190075Sobrien if (optimize && reload_inherited[j] && rl->in 7062169689Skan && MEM_P (rl->in) 7063169689Skan && MEM_P (rl->in_reg) 706490075Sobrien && reload_spill_index[j] >= 0 706590075Sobrien && TEST_HARD_REG_BIT (reg_reloaded_valid, reload_spill_index[j])) 7066132718Skan rl->in = regno_reg_rtx[reg_reloaded_contents[reload_spill_index[j]]]; 706718334Speter 706890075Sobrien /* If we are reloading a register that was recently stored in with an 706990075Sobrien output-reload, see if we can prove there was 707090075Sobrien actually no need to store the old value in it. */ 707118334Speter 707290075Sobrien if (optimize 7073146895Skan /* Only attempt this for input reloads; for RELOAD_OTHER we miss 7074146895Skan that there may be multiple uses of the previous output reload. 7075146895Skan Restricting to RELOAD_FOR_INPUT is mostly paranoia. */ 7076146895Skan && rl->when_needed == RELOAD_FOR_INPUT 707790075Sobrien && (reload_inherited[j] || reload_override_in[j]) 707890075Sobrien && rl->reg_rtx 7079169689Skan && REG_P (rl->reg_rtx) 708090075Sobrien && spill_reg_store[REGNO (rl->reg_rtx)] != 0 708190075Sobrien#if 0 708290075Sobrien /* There doesn't seem to be any reason to restrict this to pseudos 708390075Sobrien and doing so loses in the case where we are copying from a 708490075Sobrien register of the wrong class. */ 708590075Sobrien && (REGNO (spill_reg_stored_to[REGNO (rl->reg_rtx)]) 708690075Sobrien >= FIRST_PSEUDO_REGISTER) 708790075Sobrien#endif 708890075Sobrien /* The insn might have already some references to stackslots 708990075Sobrien replaced by MEMs, while reload_out_reg still names the 709090075Sobrien original pseudo. */ 709190075Sobrien && (dead_or_set_p (insn, 709290075Sobrien spill_reg_stored_to[REGNO (rl->reg_rtx)]) 709390075Sobrien || rtx_equal_p (spill_reg_stored_to[REGNO (rl->reg_rtx)], 709490075Sobrien rl->out_reg))) 709590075Sobrien delete_output_reload (insn, j, REGNO (rl->reg_rtx)); 709690075Sobrien} 709718334Speter 709890075Sobrien/* Do output reloading for reload RL, which is for the insn described by 709990075Sobrien CHAIN and has the number J. 710090075Sobrien ??? At some point we need to support handling output reloads of 710190075Sobrien JUMP_INSNs or insns that set cc0. */ 710290075Sobrienstatic void 7103132718Skando_output_reload (struct insn_chain *chain, struct reload *rl, int j) 710490075Sobrien{ 710590075Sobrien rtx note, old; 710690075Sobrien rtx insn = chain->insn; 710790075Sobrien /* If this is an output reload that stores something that is 710890075Sobrien not loaded in this same reload, see if we can eliminate a previous 710990075Sobrien store. */ 711090075Sobrien rtx pseudo = rl->out_reg; 711118334Speter 711290075Sobrien if (pseudo 7113102780Skan && optimize 7114169689Skan && REG_P (pseudo) 711590075Sobrien && ! rtx_equal_p (rl->in_reg, pseudo) 711690075Sobrien && REGNO (pseudo) >= FIRST_PSEUDO_REGISTER 711790075Sobrien && reg_last_reload_reg[REGNO (pseudo)]) 711890075Sobrien { 711990075Sobrien int pseudo_no = REGNO (pseudo); 712090075Sobrien int last_regno = REGNO (reg_last_reload_reg[pseudo_no]); 712118334Speter 712290075Sobrien /* We don't need to test full validity of last_regno for 712390075Sobrien inherit here; we only want to know if the store actually 712490075Sobrien matches the pseudo. */ 712590075Sobrien if (TEST_HARD_REG_BIT (reg_reloaded_valid, last_regno) 712690075Sobrien && reg_reloaded_contents[last_regno] == pseudo_no 712790075Sobrien && spill_reg_store[last_regno] 712890075Sobrien && rtx_equal_p (pseudo, spill_reg_stored_to[last_regno])) 712990075Sobrien delete_output_reload (insn, j, last_regno); 713090075Sobrien } 713118334Speter 713290075Sobrien old = rl->out_reg; 713390075Sobrien if (old == 0 713490075Sobrien || rl->reg_rtx == old 713590075Sobrien || rl->reg_rtx == 0) 713690075Sobrien return; 713718334Speter 713890075Sobrien /* An output operand that dies right away does need a reload, 713990075Sobrien but need not be copied from it. Show the new location in the 714090075Sobrien REG_UNUSED note. */ 7141169689Skan if ((REG_P (old) || GET_CODE (old) == SCRATCH) 714290075Sobrien && (note = find_reg_note (insn, REG_UNUSED, old)) != 0) 714390075Sobrien { 714490075Sobrien XEXP (note, 0) = rl->reg_rtx; 714590075Sobrien return; 714690075Sobrien } 714790075Sobrien /* Likewise for a SUBREG of an operand that dies. */ 714890075Sobrien else if (GET_CODE (old) == SUBREG 7149169689Skan && REG_P (SUBREG_REG (old)) 715090075Sobrien && 0 != (note = find_reg_note (insn, REG_UNUSED, 715190075Sobrien SUBREG_REG (old)))) 715290075Sobrien { 715390075Sobrien XEXP (note, 0) = gen_lowpart_common (GET_MODE (old), 715490075Sobrien rl->reg_rtx); 715590075Sobrien return; 715690075Sobrien } 715790075Sobrien else if (GET_CODE (old) == SCRATCH) 715890075Sobrien /* If we aren't optimizing, there won't be a REG_UNUSED note, 715990075Sobrien but we don't want to make an output reload. */ 716090075Sobrien return; 716118334Speter 716290075Sobrien /* If is a JUMP_INSN, we can't support output reloads yet. */ 7163169689Skan gcc_assert (NONJUMP_INSN_P (insn)); 716418334Speter 716590075Sobrien emit_output_reload_insns (chain, rld + j, j); 716690075Sobrien} 716718334Speter 7168169689Skan/* Reload number R reloads from or to a group of hard registers starting at 7169169689Skan register REGNO. Return true if it can be treated for inheritance purposes 7170169689Skan like a group of reloads, each one reloading a single hard register. 7171169689Skan The caller has already checked that the spill register and REGNO use 7172169689Skan the same number of registers to store the reload value. */ 7173169689Skan 7174169689Skanstatic bool 7175169689Skaninherit_piecemeal_p (int r ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED) 7176169689Skan{ 7177169689Skan#ifdef CANNOT_CHANGE_MODE_CLASS 7178169689Skan return (!REG_CANNOT_CHANGE_MODE_P (reload_spill_index[r], 7179169689Skan GET_MODE (rld[r].reg_rtx), 7180169689Skan reg_raw_mode[reload_spill_index[r]]) 7181169689Skan && !REG_CANNOT_CHANGE_MODE_P (regno, 7182169689Skan GET_MODE (rld[r].reg_rtx), 7183169689Skan reg_raw_mode[regno])); 7184169689Skan#else 7185169689Skan return true; 7186169689Skan#endif 7187169689Skan} 7188169689Skan 718990075Sobrien/* Output insns to reload values in and out of the chosen reload regs. */ 719018334Speter 719190075Sobrienstatic void 7192132718Skanemit_reload_insns (struct insn_chain *chain) 719390075Sobrien{ 719490075Sobrien rtx insn = chain->insn; 719518334Speter 719690075Sobrien int j; 719718334Speter 719890075Sobrien CLEAR_HARD_REG_SET (reg_reloaded_died); 719950397Sobrien 720090075Sobrien for (j = 0; j < reload_n_operands; j++) 720190075Sobrien input_reload_insns[j] = input_address_reload_insns[j] 720290075Sobrien = inpaddr_address_reload_insns[j] 720390075Sobrien = output_reload_insns[j] = output_address_reload_insns[j] 720490075Sobrien = outaddr_address_reload_insns[j] 720590075Sobrien = other_output_reload_insns[j] = 0; 720690075Sobrien other_input_address_reload_insns = 0; 720790075Sobrien other_input_reload_insns = 0; 720890075Sobrien operand_reload_insns = 0; 720990075Sobrien other_operand_reload_insns = 0; 721050397Sobrien 721190075Sobrien /* Dump reloads into the dump file. */ 7212169689Skan if (dump_file) 721390075Sobrien { 7214169689Skan fprintf (dump_file, "\nReloads for insn # %d\n", INSN_UID (insn)); 7215169689Skan debug_reload_to_stream (dump_file); 721690075Sobrien } 721718334Speter 721890075Sobrien /* Now output the instructions to copy the data into and out of the 721990075Sobrien reload registers. Do these in the order that the reloads were reported, 722090075Sobrien since reloads of base and index registers precede reloads of operands 722190075Sobrien and the operands may need the base and index registers reloaded. */ 722250397Sobrien 722390075Sobrien for (j = 0; j < n_reloads; j++) 722490075Sobrien { 722590075Sobrien if (rld[j].reg_rtx 722690075Sobrien && REGNO (rld[j].reg_rtx) < FIRST_PSEUDO_REGISTER) 722790075Sobrien new_spill_reg_store[REGNO (rld[j].reg_rtx)] = 0; 722818334Speter 722990075Sobrien do_input_reload (chain, rld + j, j); 723090075Sobrien do_output_reload (chain, rld + j, j); 723118334Speter } 723218334Speter 723318334Speter /* Now write all the insns we made for reloads in the order expected by 723418334Speter the allocation functions. Prior to the insn being reloaded, we write 723518334Speter the following reloads: 723618334Speter 723718334Speter RELOAD_FOR_OTHER_ADDRESS reloads for input addresses. 723818334Speter 723950397Sobrien RELOAD_OTHER reloads. 724018334Speter 724150397Sobrien For each operand, any RELOAD_FOR_INPADDR_ADDRESS reloads followed 724250397Sobrien by any RELOAD_FOR_INPUT_ADDRESS reloads followed by the 724350397Sobrien RELOAD_FOR_INPUT reload for the operand. 724418334Speter 724518334Speter RELOAD_FOR_OPADDR_ADDRS reloads. 724618334Speter 724718334Speter RELOAD_FOR_OPERAND_ADDRESS reloads. 724818334Speter 724918334Speter After the insn being reloaded, we write the following: 725018334Speter 725150397Sobrien For each operand, any RELOAD_FOR_OUTADDR_ADDRESS reloads followed 725250397Sobrien by any RELOAD_FOR_OUTPUT_ADDRESS reload followed by the 725350397Sobrien RELOAD_FOR_OUTPUT reload, followed by any RELOAD_OTHER output 725450397Sobrien reloads for the operand. The RELOAD_OTHER output reloads are 725550397Sobrien output in descending order by reload number. */ 725618334Speter 7257117395Skan emit_insn_before (other_input_address_reload_insns, insn); 7258117395Skan emit_insn_before (other_input_reload_insns, insn); 725918334Speter 726018334Speter for (j = 0; j < reload_n_operands; j++) 726118334Speter { 7262117395Skan emit_insn_before (inpaddr_address_reload_insns[j], insn); 7263117395Skan emit_insn_before (input_address_reload_insns[j], insn); 7264117395Skan emit_insn_before (input_reload_insns[j], insn); 726518334Speter } 726618334Speter 7267117395Skan emit_insn_before (other_operand_reload_insns, insn); 7268117395Skan emit_insn_before (operand_reload_insns, insn); 726918334Speter 727018334Speter for (j = 0; j < reload_n_operands; j++) 727118334Speter { 7272117395Skan rtx x = emit_insn_after (outaddr_address_reload_insns[j], insn); 7273117395Skan x = emit_insn_after (output_address_reload_insns[j], x); 7274117395Skan x = emit_insn_after (output_reload_insns[j], x); 7275117395Skan emit_insn_after (other_output_reload_insns[j], x); 727618334Speter } 727718334Speter 727818334Speter /* For all the spill regs newly reloaded in this instruction, 727918334Speter record what they were reloaded from, so subsequent instructions 728018334Speter can inherit the reloads. 728118334Speter 728218334Speter Update spill_reg_store for the reloads of this insn. 728318334Speter Copy the elements that were updated in the loop above. */ 728418334Speter 728518334Speter for (j = 0; j < n_reloads; j++) 728618334Speter { 728790075Sobrien int r = reload_order[j]; 728890075Sobrien int i = reload_spill_index[r]; 728918334Speter 729052284Sobrien /* If this is a non-inherited input reload from a pseudo, we must 729190075Sobrien clear any memory of a previous store to the same pseudo. Only do 729290075Sobrien something if there will not be an output reload for the pseudo 729390075Sobrien being reloaded. */ 729490075Sobrien if (rld[r].in_reg != 0 729590075Sobrien && ! (reload_inherited[r] || reload_override_in[r])) 729690075Sobrien { 729790075Sobrien rtx reg = rld[r].in_reg; 729852284Sobrien 729990075Sobrien if (GET_CODE (reg) == SUBREG) 730052284Sobrien reg = SUBREG_REG (reg); 730190075Sobrien 7302169689Skan if (REG_P (reg) 730352284Sobrien && REGNO (reg) >= FIRST_PSEUDO_REGISTER 7304169689Skan && !REGNO_REG_SET_P (®_has_output_reload, REGNO (reg))) 730552284Sobrien { 730652284Sobrien int nregno = REGNO (reg); 730752284Sobrien 730852284Sobrien if (reg_last_reload_reg[nregno]) 730990075Sobrien { 731090075Sobrien int last_regno = REGNO (reg_last_reload_reg[nregno]); 731152284Sobrien 731290075Sobrien if (reg_reloaded_contents[last_regno] == nregno) 731352284Sobrien spill_reg_store[last_regno] = 0; 731490075Sobrien } 731552284Sobrien } 731652284Sobrien } 731790075Sobrien 731850397Sobrien /* I is nonneg if this reload used a register. 731990075Sobrien If rld[r].reg_rtx is 0, this is an optional reload 732050397Sobrien that we opted to ignore. */ 732118334Speter 732290075Sobrien if (i >= 0 && rld[r].reg_rtx != 0) 732318334Speter { 7324169689Skan int nr = hard_regno_nregs[i][GET_MODE (rld[r].reg_rtx)]; 732518334Speter int k; 732650397Sobrien int part_reaches_end = 0; 732750397Sobrien int all_reaches_end = 1; 732818334Speter 732950397Sobrien /* For a multi register reload, we need to check if all or part 733050397Sobrien of the value lives to the end. */ 733118334Speter for (k = 0; k < nr; k++) 733218334Speter { 733390075Sobrien if (reload_reg_reaches_end_p (i + k, rld[r].opnum, 733490075Sobrien rld[r].when_needed)) 733550397Sobrien part_reaches_end = 1; 733650397Sobrien else 733750397Sobrien all_reaches_end = 0; 733818334Speter } 733918334Speter 734050397Sobrien /* Ignore reloads that don't reach the end of the insn in 734150397Sobrien entirety. */ 734250397Sobrien if (all_reaches_end) 734318334Speter { 734450397Sobrien /* First, clear out memory of what used to be in this spill reg. 734550397Sobrien If consecutive registers are used, clear them all. */ 734618334Speter 734750397Sobrien for (k = 0; k < nr; k++) 7348132718Skan { 734950397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_valid, i + k); 7350132718Skan CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered, i + k); 7351132718Skan } 735218334Speter 735350397Sobrien /* Maybe the spill reg contains a copy of reload_out. */ 735490075Sobrien if (rld[r].out != 0 7355169689Skan && (REG_P (rld[r].out) 735652284Sobrien#ifdef AUTO_INC_DEC 735790075Sobrien || ! rld[r].out_reg 735852284Sobrien#endif 7359169689Skan || REG_P (rld[r].out_reg))) 736050397Sobrien { 7361169689Skan rtx out = (REG_P (rld[r].out) 736290075Sobrien ? rld[r].out 736390075Sobrien : rld[r].out_reg 736490075Sobrien ? rld[r].out_reg 736590075Sobrien/* AUTO_INC */ : XEXP (rld[r].in_reg, 0)); 736690075Sobrien int nregno = REGNO (out); 736750397Sobrien int nnr = (nregno >= FIRST_PSEUDO_REGISTER ? 1 7368169689Skan : hard_regno_nregs[nregno] 7369169689Skan [GET_MODE (rld[r].reg_rtx)]); 7370169689Skan bool piecemeal; 737118334Speter 737250397Sobrien spill_reg_store[i] = new_spill_reg_store[i]; 737352284Sobrien spill_reg_stored_to[i] = out; 737490075Sobrien reg_last_reload_reg[nregno] = rld[r].reg_rtx; 737518334Speter 7376169689Skan piecemeal = (nregno < FIRST_PSEUDO_REGISTER 7377169689Skan && nr == nnr 7378169689Skan && inherit_piecemeal_p (r, nregno)); 7379169689Skan 738050397Sobrien /* If NREGNO is a hard register, it may occupy more than 738190075Sobrien one register. If it does, say what is in the 738250397Sobrien rest of the registers assuming that both registers 738350397Sobrien agree on how many words the object takes. If not, 738450397Sobrien invalidate the subsequent registers. */ 738550397Sobrien 738650397Sobrien if (nregno < FIRST_PSEUDO_REGISTER) 738750397Sobrien for (k = 1; k < nnr; k++) 738850397Sobrien reg_last_reload_reg[nregno + k] 7389169689Skan = (piecemeal 7390117395Skan ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k] 739150397Sobrien : 0); 739250397Sobrien 739350397Sobrien /* Now do the inverse operation. */ 739450397Sobrien for (k = 0; k < nr; k++) 739550397Sobrien { 739650397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_dead, i + k); 739750397Sobrien reg_reloaded_contents[i + k] 7398169689Skan = (nregno >= FIRST_PSEUDO_REGISTER || !piecemeal 739950397Sobrien ? nregno 740050397Sobrien : nregno + k); 740150397Sobrien reg_reloaded_insn[i + k] = insn; 740250397Sobrien SET_HARD_REG_BIT (reg_reloaded_valid, i + k); 7403132718Skan if (HARD_REGNO_CALL_PART_CLOBBERED (i + k, GET_MODE (out))) 7404132718Skan SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered, i + k); 740550397Sobrien } 740618334Speter } 740718334Speter 740850397Sobrien /* Maybe the spill reg contains a copy of reload_in. Only do 740950397Sobrien something if there will not be an output reload for 741050397Sobrien the register being reloaded. */ 741190075Sobrien else if (rld[r].out_reg == 0 741290075Sobrien && rld[r].in != 0 7413169689Skan && ((REG_P (rld[r].in) 741490075Sobrien && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER 7415169689Skan && !REGNO_REG_SET_P (®_has_output_reload, 7416169689Skan REGNO (rld[r].in))) 7417169689Skan || (REG_P (rld[r].in_reg) 7418169689Skan && !REGNO_REG_SET_P (®_has_output_reload, 7419169689Skan REGNO (rld[r].in_reg)))) 742090075Sobrien && ! reg_set_p (rld[r].reg_rtx, PATTERN (insn))) 742150397Sobrien { 742290075Sobrien int nregno; 742350397Sobrien int nnr; 7424132718Skan rtx in; 7425169689Skan bool piecemeal; 742618334Speter 7427169689Skan if (REG_P (rld[r].in) 742890075Sobrien && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER) 7429132718Skan in = rld[r].in; 7430169689Skan else if (REG_P (rld[r].in_reg)) 7431132718Skan in = rld[r].in_reg; 743250397Sobrien else 7433132718Skan in = XEXP (rld[r].in_reg, 0); 7434132718Skan nregno = REGNO (in); 743518334Speter 743650397Sobrien nnr = (nregno >= FIRST_PSEUDO_REGISTER ? 1 7437169689Skan : hard_regno_nregs[nregno] 7438169689Skan [GET_MODE (rld[r].reg_rtx)]); 743918334Speter 744090075Sobrien reg_last_reload_reg[nregno] = rld[r].reg_rtx; 744190075Sobrien 7442169689Skan piecemeal = (nregno < FIRST_PSEUDO_REGISTER 7443169689Skan && nr == nnr 7444169689Skan && inherit_piecemeal_p (r, nregno)); 7445169689Skan 744650397Sobrien if (nregno < FIRST_PSEUDO_REGISTER) 744750397Sobrien for (k = 1; k < nnr; k++) 744850397Sobrien reg_last_reload_reg[nregno + k] 7449169689Skan = (piecemeal 7450117395Skan ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k] 745150397Sobrien : 0); 745218334Speter 745350397Sobrien /* Unless we inherited this reload, show we haven't 745452284Sobrien recently done a store. 745552284Sobrien Previous stores of inherited auto_inc expressions 745652284Sobrien also have to be discarded. */ 745752284Sobrien if (! reload_inherited[r] 745890075Sobrien || (rld[r].out && ! rld[r].out_reg)) 745950397Sobrien spill_reg_store[i] = 0; 746018334Speter 746150397Sobrien for (k = 0; k < nr; k++) 746250397Sobrien { 746350397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_dead, i + k); 746450397Sobrien reg_reloaded_contents[i + k] 7465169689Skan = (nregno >= FIRST_PSEUDO_REGISTER || !piecemeal 746650397Sobrien ? nregno 746750397Sobrien : nregno + k); 746850397Sobrien reg_reloaded_insn[i + k] = insn; 746950397Sobrien SET_HARD_REG_BIT (reg_reloaded_valid, i + k); 7470132718Skan if (HARD_REGNO_CALL_PART_CLOBBERED (i + k, GET_MODE (in))) 7471132718Skan SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered, i + k); 747250397Sobrien } 747350397Sobrien } 747450397Sobrien } 747518334Speter 747650397Sobrien /* However, if part of the reload reaches the end, then we must 747750397Sobrien invalidate the old info for the part that survives to the end. */ 747850397Sobrien else if (part_reaches_end) 747950397Sobrien { 748018334Speter for (k = 0; k < nr; k++) 748150397Sobrien if (reload_reg_reaches_end_p (i + k, 748290075Sobrien rld[r].opnum, 748390075Sobrien rld[r].when_needed)) 748450397Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_valid, i + k); 748518334Speter } 748618334Speter } 748718334Speter 748818334Speter /* The following if-statement was #if 0'd in 1.34 (or before...). 748918334Speter It's reenabled in 1.35 because supposedly nothing else 749018334Speter deals with this problem. */ 749118334Speter 749218334Speter /* If a register gets output-reloaded from a non-spill register, 749318334Speter that invalidates any previous reloaded copy of it. 749418334Speter But forget_old_reloads_1 won't get to see it, because 7495169689Skan it thinks only about the original insn. So invalidate it here. 7496169689Skan Also do the same thing for RELOAD_OTHER constraints where the 7497169689Skan output is discarded. */ 7498169689Skan if (i < 0 7499169689Skan && ((rld[r].out != 0 7500169689Skan && (REG_P (rld[r].out) 7501169689Skan || (MEM_P (rld[r].out) 7502169689Skan && REG_P (rld[r].out_reg)))) 7503169689Skan || (rld[r].out == 0 && rld[r].out_reg 7504169689Skan && REG_P (rld[r].out_reg)))) 750518334Speter { 7506169689Skan rtx out = ((rld[r].out && REG_P (rld[r].out)) 750790075Sobrien ? rld[r].out : rld[r].out_reg); 750890075Sobrien int nregno = REGNO (out); 750918334Speter if (nregno >= FIRST_PSEUDO_REGISTER) 751052284Sobrien { 751190075Sobrien rtx src_reg, store_insn = NULL_RTX; 751252284Sobrien 751352284Sobrien reg_last_reload_reg[nregno] = 0; 751452284Sobrien 751552284Sobrien /* If we can find a hard register that is stored, record 751652284Sobrien the storing insn so that we may delete this insn with 751752284Sobrien delete_output_reload. */ 751890075Sobrien src_reg = rld[r].reg_rtx; 751952284Sobrien 752052284Sobrien /* If this is an optional reload, try to find the source reg 752152284Sobrien from an input reload. */ 752252284Sobrien if (! src_reg) 752352284Sobrien { 752452284Sobrien rtx set = single_set (insn); 752590075Sobrien if (set && SET_DEST (set) == rld[r].out) 752652284Sobrien { 752752284Sobrien int k; 752852284Sobrien 752952284Sobrien src_reg = SET_SRC (set); 753052284Sobrien store_insn = insn; 753152284Sobrien for (k = 0; k < n_reloads; k++) 753252284Sobrien { 753390075Sobrien if (rld[k].in == src_reg) 753452284Sobrien { 753590075Sobrien src_reg = rld[k].reg_rtx; 753652284Sobrien break; 753752284Sobrien } 753852284Sobrien } 753952284Sobrien } 754052284Sobrien } 754152284Sobrien else 754252284Sobrien store_insn = new_spill_reg_store[REGNO (src_reg)]; 7543169689Skan if (src_reg && REG_P (src_reg) 754452284Sobrien && REGNO (src_reg) < FIRST_PSEUDO_REGISTER) 754552284Sobrien { 754652284Sobrien int src_regno = REGNO (src_reg); 7547169689Skan int nr = hard_regno_nregs[src_regno][rld[r].mode]; 754852284Sobrien /* The place where to find a death note varies with 754952284Sobrien PRESERVE_DEATH_INFO_REGNO_P . The condition is not 755052284Sobrien necessarily checked exactly in the code that moves 755152284Sobrien notes, so just check both locations. */ 755252284Sobrien rtx note = find_regno_note (insn, REG_DEAD, src_regno); 755390075Sobrien if (! note && store_insn) 755452284Sobrien note = find_regno_note (store_insn, REG_DEAD, src_regno); 755552284Sobrien while (nr-- > 0) 755652284Sobrien { 755752284Sobrien spill_reg_store[src_regno + nr] = store_insn; 755852284Sobrien spill_reg_stored_to[src_regno + nr] = out; 755952284Sobrien reg_reloaded_contents[src_regno + nr] = nregno; 756052284Sobrien reg_reloaded_insn[src_regno + nr] = store_insn; 756152284Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_dead, src_regno + nr); 756252284Sobrien SET_HARD_REG_BIT (reg_reloaded_valid, src_regno + nr); 7563132718Skan if (HARD_REGNO_CALL_PART_CLOBBERED (src_regno + nr, 7564132718Skan GET_MODE (src_reg))) 7565132718Skan SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered, 7566132718Skan src_regno + nr); 756752284Sobrien SET_HARD_REG_BIT (reg_is_output_reload, src_regno + nr); 756852284Sobrien if (note) 756952284Sobrien SET_HARD_REG_BIT (reg_reloaded_died, src_regno); 757052284Sobrien else 757152284Sobrien CLEAR_HARD_REG_BIT (reg_reloaded_died, src_regno); 757252284Sobrien } 757352284Sobrien reg_last_reload_reg[nregno] = src_reg; 7574132718Skan /* We have to set reg_has_output_reload here, or else 7575132718Skan forget_old_reloads_1 will clear reg_last_reload_reg 7576132718Skan right away. */ 7577169689Skan SET_REGNO_REG_SET (®_has_output_reload, 7578169689Skan nregno); 757952284Sobrien } 758052284Sobrien } 758118334Speter else 758218334Speter { 7583169689Skan int num_regs = hard_regno_nregs[nregno][GET_MODE (out)]; 758418334Speter 758518334Speter while (num_regs-- > 0) 758618334Speter reg_last_reload_reg[nregno + num_regs] = 0; 758718334Speter } 758818334Speter } 758918334Speter } 759050397Sobrien IOR_HARD_REG_SET (reg_reloaded_dead, reg_reloaded_died); 759118334Speter} 759218334Speter 7593169689Skan/* Go through the motions to emit INSN and test if it is strictly valid. 7594169689Skan Return the emitted insn if valid, else return NULL. */ 7595169689Skan 7596169689Skanstatic rtx 7597169689Skanemit_insn_if_valid_for_reload (rtx insn) 7598169689Skan{ 7599169689Skan rtx last = get_last_insn (); 7600169689Skan int code; 7601169689Skan 7602169689Skan insn = emit_insn (insn); 7603169689Skan code = recog_memoized (insn); 7604169689Skan 7605169689Skan if (code >= 0) 7606169689Skan { 7607169689Skan extract_insn (insn); 7608169689Skan /* We want constrain operands to treat this insn strictly in its 7609169689Skan validity determination, i.e., the way it would after reload has 7610169689Skan completed. */ 7611169689Skan if (constrain_operands (1)) 7612169689Skan return insn; 7613169689Skan } 7614169689Skan 7615169689Skan delete_insns_since (last); 7616169689Skan return NULL; 7617169689Skan} 7618169689Skan 761918334Speter/* Emit code to perform a reload from IN (which may be a reload register) to 762018334Speter OUT (which may also be a reload register). IN or OUT is from operand 762190075Sobrien OPNUM with reload type TYPE. 762218334Speter 762318334Speter Returns first insn emitted. */ 762418334Speter 7625169689Skanstatic rtx 7626132718Skangen_reload (rtx out, rtx in, int opnum, enum reload_type type) 762718334Speter{ 762818334Speter rtx last = get_last_insn (); 762918334Speter rtx tem; 763018334Speter 763118334Speter /* If IN is a paradoxical SUBREG, remove it and try to put the 763218334Speter opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. */ 763318334Speter if (GET_CODE (in) == SUBREG 763418334Speter && (GET_MODE_SIZE (GET_MODE (in)) 763518334Speter > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 763618334Speter && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0) 763718334Speter in = SUBREG_REG (in), out = tem; 763818334Speter else if (GET_CODE (out) == SUBREG 763990075Sobrien && (GET_MODE_SIZE (GET_MODE (out)) 764090075Sobrien > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 764190075Sobrien && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (out)), in)) != 0) 764218334Speter out = SUBREG_REG (out), in = tem; 764318334Speter 764418334Speter /* How to do this reload can get quite tricky. Normally, we are being 764518334Speter asked to reload a simple operand, such as a MEM, a constant, or a pseudo 764618334Speter register that didn't get a hard register. In that case we can just 764718334Speter call emit_move_insn. 764818334Speter 764918334Speter We can also be asked to reload a PLUS that adds a register or a MEM to 765018334Speter another register, constant or MEM. This can occur during frame pointer 765118334Speter elimination and while reloading addresses. This case is handled by 765218334Speter trying to emit a single insn to perform the add. If it is not valid, 765318334Speter we use a two insn sequence. 765418334Speter 7655169689Skan Or we can be asked to reload an unary operand that was a fragment of 7656169689Skan an addressing mode, into a register. If it isn't recognized as-is, 7657169689Skan we try making the unop operand and the reload-register the same: 7658169689Skan (set reg:X (unop:X expr:Y)) 7659169689Skan -> (set reg:Y expr:Y) (set reg:X (unop:X reg:Y)). 7660169689Skan 766118334Speter Finally, we could be called to handle an 'o' constraint by putting 766218334Speter an address into a register. In that case, we first try to do this 766318334Speter with a named pattern of "reload_load_address". If no such pattern 766418334Speter exists, we just emit a SET insn and hope for the best (it will normally 766518334Speter be valid on machines that use 'o'). 766618334Speter 766718334Speter This entire process is made complex because reload will never 766818334Speter process the insns we generate here and so we must ensure that 766918334Speter they will fit their constraints and also by the fact that parts of 767018334Speter IN might be being reloaded separately and replaced with spill registers. 767118334Speter Because of this, we are, in some sense, just guessing the right approach 767218334Speter here. The one listed above seems to work. 767318334Speter 767418334Speter ??? At some point, this whole thing needs to be rethought. */ 767518334Speter 767618334Speter if (GET_CODE (in) == PLUS 7677169689Skan && (REG_P (XEXP (in, 0)) 767850397Sobrien || GET_CODE (XEXP (in, 0)) == SUBREG 7679169689Skan || MEM_P (XEXP (in, 0))) 7680169689Skan && (REG_P (XEXP (in, 1)) 768150397Sobrien || GET_CODE (XEXP (in, 1)) == SUBREG 768218334Speter || CONSTANT_P (XEXP (in, 1)) 7683169689Skan || MEM_P (XEXP (in, 1)))) 768418334Speter { 768518334Speter /* We need to compute the sum of a register or a MEM and another 768618334Speter register, constant, or MEM, and put it into the reload 768718334Speter register. The best possible way of doing this is if the machine 768818334Speter has a three-operand ADD insn that accepts the required operands. 768918334Speter 769018334Speter The simplest approach is to try to generate such an insn and see if it 769118334Speter is recognized and matches its constraints. If so, it can be used. 769218334Speter 769318334Speter It might be better not to actually emit the insn unless it is valid, 769418334Speter but we need to pass the insn as an operand to `recog' and 769552284Sobrien `extract_insn' and it is simpler to emit and then delete the insn if 769618334Speter not valid than to dummy things up. */ 769718334Speter 769818334Speter rtx op0, op1, tem, insn; 769918334Speter int code; 770018334Speter 770118334Speter op0 = find_replacement (&XEXP (in, 0)); 770218334Speter op1 = find_replacement (&XEXP (in, 1)); 770318334Speter 770418334Speter /* Since constraint checking is strict, commutativity won't be 770518334Speter checked, so we need to do that here to avoid spurious failure 770618334Speter if the add instruction is two-address and the second operand 770718334Speter of the add is the same as the reload reg, which is frequently 770818334Speter the case. If the insn would be A = B + A, rearrange it so 770950397Sobrien it will be A = A + B as constrain_operands expects. */ 771018334Speter 7711169689Skan if (REG_P (XEXP (in, 1)) 771218334Speter && REGNO (out) == REGNO (XEXP (in, 1))) 771318334Speter tem = op0, op0 = op1, op1 = tem; 771418334Speter 771518334Speter if (op0 != XEXP (in, 0) || op1 != XEXP (in, 1)) 771650397Sobrien in = gen_rtx_PLUS (GET_MODE (in), op0, op1); 771718334Speter 7718169689Skan insn = emit_insn_if_valid_for_reload (gen_rtx_SET (VOIDmode, out, in)); 7719169689Skan if (insn) 7720169689Skan return insn; 772118334Speter 772218334Speter /* If that failed, we must use a conservative two-insn sequence. 772318334Speter 772490075Sobrien Use a move to copy one operand into the reload register. Prefer 772590075Sobrien to reload a constant, MEM or pseudo since the move patterns can 772690075Sobrien handle an arbitrary operand. If OP1 is not a constant, MEM or 772790075Sobrien pseudo and OP1 is not a valid operand for an add instruction, then 772890075Sobrien reload OP1. 772990075Sobrien 773090075Sobrien After reloading one of the operands into the reload register, add 773190075Sobrien the reload register to the output register. 773290075Sobrien 773318334Speter If there is another way to do this for a specific machine, a 773418334Speter DEFINE_PEEPHOLE should be specified that recognizes the sequence 773518334Speter we emit below. */ 773618334Speter 773752284Sobrien code = (int) add_optab->handlers[(int) GET_MODE (out)].insn_code; 773852284Sobrien 7739169689Skan if (CONSTANT_P (op1) || MEM_P (op1) || GET_CODE (op1) == SUBREG 7740169689Skan || (REG_P (op1) 774190075Sobrien && REGNO (op1) >= FIRST_PSEUDO_REGISTER) 774290075Sobrien || (code != CODE_FOR_nothing 774390075Sobrien && ! ((*insn_data[code].operand[2].predicate) 774490075Sobrien (op1, insn_data[code].operand[2].mode)))) 774518334Speter tem = op0, op0 = op1, op1 = tem; 774618334Speter 774750397Sobrien gen_reload (out, op0, opnum, type); 774818334Speter 774918334Speter /* If OP0 and OP1 are the same, we can use OUT for OP1. 775018334Speter This fixes a problem on the 32K where the stack pointer cannot 775118334Speter be used as an operand of an add insn. */ 775218334Speter 775318334Speter if (rtx_equal_p (op0, op1)) 775418334Speter op1 = out; 775518334Speter 7756169689Skan insn = emit_insn_if_valid_for_reload (gen_add2_insn (out, op1)); 7757169689Skan if (insn) 7758169689Skan { 7759169689Skan /* Add a REG_EQUIV note so that find_equiv_reg can find it. */ 7760169689Skan REG_NOTES (insn) 7761169689Skan = gen_rtx_EXPR_LIST (REG_EQUIV, in, REG_NOTES (insn)); 7762169689Skan return insn; 7763169689Skan } 776418334Speter 776518334Speter /* If that failed, copy the address register to the reload register. 776650397Sobrien Then add the constant to the reload register. */ 776718334Speter 776850397Sobrien gen_reload (out, op1, opnum, type); 776950397Sobrien insn = emit_insn (gen_add2_insn (out, op0)); 777050397Sobrien REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUIV, in, REG_NOTES (insn)); 777118334Speter } 777218334Speter 777318334Speter#ifdef SECONDARY_MEMORY_NEEDED 777418334Speter /* If we need a memory location to do the move, do it that way. */ 7775169689Skan else if ((REG_P (in) || GET_CODE (in) == SUBREG) 7776117395Skan && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER 7777169689Skan && (REG_P (out) || GET_CODE (out) == SUBREG) 7778117395Skan && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER 7779117395Skan && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)), 7780117395Skan REGNO_REG_CLASS (reg_or_subregno (out)), 778118334Speter GET_MODE (out))) 778218334Speter { 778318334Speter /* Get the memory to use and rewrite both registers to its mode. */ 778418334Speter rtx loc = get_secondary_mem (in, GET_MODE (out), opnum, type); 778518334Speter 778618334Speter if (GET_MODE (loc) != GET_MODE (out)) 7787117395Skan out = gen_rtx_REG (GET_MODE (loc), REGNO (out)); 778818334Speter 778918334Speter if (GET_MODE (loc) != GET_MODE (in)) 7790117395Skan in = gen_rtx_REG (GET_MODE (loc), REGNO (in)); 779118334Speter 779250397Sobrien gen_reload (loc, in, opnum, type); 779350397Sobrien gen_reload (out, loc, opnum, type); 779418334Speter } 779518334Speter#endif 7796169689Skan else if (REG_P (out) && UNARY_P (in)) 7797169689Skan { 7798169689Skan rtx insn; 7799169689Skan rtx op1; 7800169689Skan rtx out_moded; 7801169689Skan rtx set; 780218334Speter 7803169689Skan op1 = find_replacement (&XEXP (in, 0)); 7804169689Skan if (op1 != XEXP (in, 0)) 7805169689Skan in = gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in), op1); 7806169689Skan 7807169689Skan /* First, try a plain SET. */ 7808169689Skan set = emit_insn_if_valid_for_reload (gen_rtx_SET (VOIDmode, out, in)); 7809169689Skan if (set) 7810169689Skan return set; 7811169689Skan 7812169689Skan /* If that failed, move the inner operand to the reload 7813169689Skan register, and try the same unop with the inner expression 7814169689Skan replaced with the reload register. */ 7815169689Skan 7816169689Skan if (GET_MODE (op1) != GET_MODE (out)) 7817169689Skan out_moded = gen_rtx_REG (GET_MODE (op1), REGNO (out)); 7818169689Skan else 7819169689Skan out_moded = out; 7820169689Skan 7821169689Skan gen_reload (out_moded, op1, opnum, type); 7822169689Skan 7823169689Skan insn 7824169689Skan = gen_rtx_SET (VOIDmode, out, 7825169689Skan gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in), 7826169689Skan out_moded)); 7827169689Skan insn = emit_insn_if_valid_for_reload (insn); 7828169689Skan if (insn) 7829169689Skan { 7830169689Skan REG_NOTES (insn) 7831169689Skan = gen_rtx_EXPR_LIST (REG_EQUIV, in, REG_NOTES (insn)); 7832169689Skan return insn; 7833169689Skan } 7834169689Skan 7835169689Skan fatal_insn ("Failure trying to reload:", set); 7836169689Skan } 783718334Speter /* If IN is a simple operand, use gen_move_insn. */ 7838169689Skan else if (OBJECT_P (in) || GET_CODE (in) == SUBREG) 7839169689Skan { 7840169689Skan tem = emit_insn (gen_move_insn (out, in)); 7841169689Skan /* IN may contain a LABEL_REF, if so add a REG_LABEL note. */ 7842169689Skan mark_jump_label (in, tem, 0); 7843169689Skan } 784418334Speter 784518334Speter#ifdef HAVE_reload_load_address 784618334Speter else if (HAVE_reload_load_address) 784718334Speter emit_insn (gen_reload_load_address (out, in)); 784818334Speter#endif 784918334Speter 785018334Speter /* Otherwise, just write (set OUT IN) and hope for the best. */ 785118334Speter else 785250397Sobrien emit_insn (gen_rtx_SET (VOIDmode, out, in)); 785318334Speter 785418334Speter /* Return the first insn emitted. 785518334Speter We can not just return get_last_insn, because there may have 785618334Speter been multiple instructions emitted. Also note that gen_move_insn may 785718334Speter emit more than one insn itself, so we can not assume that there is one 785818334Speter insn emitted per emit_insn_before call. */ 785918334Speter 786018334Speter return last ? NEXT_INSN (last) : get_insns (); 786118334Speter} 786218334Speter 786390075Sobrien/* Delete a previously made output-reload whose result we now believe 786490075Sobrien is not needed. First we double-check. 786518334Speter 786618334Speter INSN is the insn now being processed. 786752284Sobrien LAST_RELOAD_REG is the hard register number for which we want to delete 786852284Sobrien the last output reload. 786952284Sobrien J is the reload-number that originally used REG. The caller has made 787052284Sobrien certain that reload J doesn't use REG any longer for input. */ 787118334Speter 787218334Speterstatic void 7873132718Skandelete_output_reload (rtx insn, int j, int last_reload_reg) 787418334Speter{ 787552284Sobrien rtx output_reload_insn = spill_reg_store[last_reload_reg]; 787652284Sobrien rtx reg = spill_reg_stored_to[last_reload_reg]; 787752284Sobrien int k; 787852284Sobrien int n_occurrences; 787952284Sobrien int n_inherited = 0; 788090075Sobrien rtx i1; 788152284Sobrien rtx substed; 788290075Sobrien 7883104752Skan /* It is possible that this reload has been only used to set another reload 7884104752Skan we eliminated earlier and thus deleted this instruction too. */ 7885104752Skan if (INSN_DELETED_P (output_reload_insn)) 7886104752Skan return; 7887104752Skan 788818334Speter /* Get the raw pseudo-register referred to. */ 788918334Speter 789018334Speter while (GET_CODE (reg) == SUBREG) 789118334Speter reg = SUBREG_REG (reg); 789252284Sobrien substed = reg_equiv_memory_loc[REGNO (reg)]; 789318334Speter 789452284Sobrien /* This is unsafe if the operand occurs more often in the current 789552284Sobrien insn than it is inherited. */ 789652284Sobrien for (k = n_reloads - 1; k >= 0; k--) 789752284Sobrien { 789890075Sobrien rtx reg2 = rld[k].in; 789952284Sobrien if (! reg2) 790052284Sobrien continue; 7901169689Skan if (MEM_P (reg2) || reload_override_in[k]) 790290075Sobrien reg2 = rld[k].in_reg; 790352284Sobrien#ifdef AUTO_INC_DEC 790490075Sobrien if (rld[k].out && ! rld[k].out_reg) 790590075Sobrien reg2 = XEXP (rld[k].in_reg, 0); 790652284Sobrien#endif 790752284Sobrien while (GET_CODE (reg2) == SUBREG) 790852284Sobrien reg2 = SUBREG_REG (reg2); 790952284Sobrien if (rtx_equal_p (reg2, reg)) 791052284Sobrien { 791152284Sobrien if (reload_inherited[k] || reload_override_in[k] || k == j) 791252284Sobrien { 791352284Sobrien n_inherited++; 791490075Sobrien reg2 = rld[k].out_reg; 791552284Sobrien if (! reg2) 791652284Sobrien continue; 791752284Sobrien while (GET_CODE (reg2) == SUBREG) 791852284Sobrien reg2 = XEXP (reg2, 0); 791952284Sobrien if (rtx_equal_p (reg2, reg)) 792052284Sobrien n_inherited++; 792152284Sobrien } 792252284Sobrien else 792352284Sobrien return; 792452284Sobrien } 792552284Sobrien } 792690075Sobrien n_occurrences = count_occurrences (PATTERN (insn), reg, 0); 792752284Sobrien if (substed) 792890075Sobrien n_occurrences += count_occurrences (PATTERN (insn), 792990075Sobrien eliminate_regs (substed, 0, 793090075Sobrien NULL_RTX), 0); 7931169689Skan for (i1 = reg_equiv_alt_mem_list [REGNO (reg)]; i1; i1 = XEXP (i1, 1)) 7932169689Skan { 7933169689Skan gcc_assert (!rtx_equal_p (XEXP (i1, 0), substed)); 7934169689Skan n_occurrences += count_occurrences (PATTERN (insn), XEXP (i1, 0), 0); 7935169689Skan } 793652284Sobrien if (n_occurrences > n_inherited) 793752284Sobrien return; 793852284Sobrien 793918334Speter /* If the pseudo-reg we are reloading is no longer referenced 794018334Speter anywhere between the store into it and here, 7941169689Skan and we're within the same basic block, then the value can only 7942169689Skan pass through the reload reg and end up here. 794318334Speter Otherwise, give up--return. */ 794418334Speter for (i1 = NEXT_INSN (output_reload_insn); 794518334Speter i1 != insn; i1 = NEXT_INSN (i1)) 794618334Speter { 7947169689Skan if (NOTE_INSN_BASIC_BLOCK_P (i1)) 794818334Speter return; 7949169689Skan if ((NONJUMP_INSN_P (i1) || CALL_P (i1)) 795018334Speter && reg_mentioned_p (reg, PATTERN (i1))) 795150397Sobrien { 795252284Sobrien /* If this is USE in front of INSN, we only have to check that 795352284Sobrien there are no more references than accounted for by inheritance. */ 7954169689Skan while (NONJUMP_INSN_P (i1) && GET_CODE (PATTERN (i1)) == USE) 795550397Sobrien { 795652284Sobrien n_occurrences += rtx_equal_p (reg, XEXP (PATTERN (i1), 0)) != 0; 795750397Sobrien i1 = NEXT_INSN (i1); 795850397Sobrien } 795952284Sobrien if (n_occurrences <= n_inherited && i1 == insn) 796050397Sobrien break; 796150397Sobrien return; 796250397Sobrien } 796318334Speter } 796418334Speter 796590075Sobrien /* We will be deleting the insn. Remove the spill reg information. */ 7966169689Skan for (k = hard_regno_nregs[last_reload_reg][GET_MODE (reg)]; k-- > 0; ) 796790075Sobrien { 796890075Sobrien spill_reg_store[last_reload_reg + k] = 0; 796990075Sobrien spill_reg_stored_to[last_reload_reg + k] = 0; 797090075Sobrien } 797190075Sobrien 797250397Sobrien /* The caller has already checked that REG dies or is set in INSN. 797390075Sobrien It has also checked that we are optimizing, and thus some 7974132718Skan inaccuracies in the debugging information are acceptable. 797590075Sobrien So we could just delete output_reload_insn. But in some cases 797690075Sobrien we can improve the debugging information without sacrificing 797790075Sobrien optimization - maybe even improving the code: See if the pseudo 797890075Sobrien reg has been completely replaced with reload regs. If so, delete 797990075Sobrien the store insn and forget we had a stack slot for the pseudo. */ 798090075Sobrien if (rld[j].out != rld[j].in 798150397Sobrien && REG_N_DEATHS (REGNO (reg)) == 1 798252284Sobrien && REG_N_SETS (REGNO (reg)) == 1 798350397Sobrien && REG_BASIC_BLOCK (REGNO (reg)) >= 0 798450397Sobrien && find_regno_note (insn, REG_DEAD, REGNO (reg))) 798518334Speter { 798618334Speter rtx i2; 798718334Speter 798890075Sobrien /* We know that it was used only between here and the beginning of 798990075Sobrien the current basic block. (We also know that the last use before 799090075Sobrien INSN was the output reload we are thinking of deleting, but never 799190075Sobrien mind that.) Search that range; see if any ref remains. */ 799218334Speter for (i2 = PREV_INSN (insn); i2; i2 = PREV_INSN (i2)) 799318334Speter { 799418334Speter rtx set = single_set (i2); 799518334Speter 799618334Speter /* Uses which just store in the pseudo don't count, 799718334Speter since if they are the only uses, they are dead. */ 799818334Speter if (set != 0 && SET_DEST (set) == reg) 799918334Speter continue; 8000169689Skan if (LABEL_P (i2) 8001169689Skan || JUMP_P (i2)) 800218334Speter break; 8003169689Skan if ((NONJUMP_INSN_P (i2) || CALL_P (i2)) 800418334Speter && reg_mentioned_p (reg, PATTERN (i2))) 800550397Sobrien { 800650397Sobrien /* Some other ref remains; just delete the output reload we 800750397Sobrien know to be dead. */ 800852284Sobrien delete_address_reloads (output_reload_insn, insn); 800990075Sobrien delete_insn (output_reload_insn); 801050397Sobrien return; 801150397Sobrien } 801218334Speter } 801318334Speter 801490075Sobrien /* Delete the now-dead stores into this pseudo. Note that this 801590075Sobrien loop also takes care of deleting output_reload_insn. */ 801618334Speter for (i2 = PREV_INSN (insn); i2; i2 = PREV_INSN (i2)) 801718334Speter { 801818334Speter rtx set = single_set (i2); 801918334Speter 802018334Speter if (set != 0 && SET_DEST (set) == reg) 802150397Sobrien { 802252284Sobrien delete_address_reloads (i2, insn); 802390075Sobrien delete_insn (i2); 802450397Sobrien } 8025169689Skan if (LABEL_P (i2) 8026169689Skan || JUMP_P (i2)) 802718334Speter break; 802818334Speter } 802918334Speter 803090075Sobrien /* For the debugging info, say the pseudo lives in this reload reg. */ 803190075Sobrien reg_renumber[REGNO (reg)] = REGNO (rld[j].reg_rtx); 803218334Speter alter_reg (REGNO (reg), -1); 803318334Speter } 803490075Sobrien else 803590075Sobrien { 803690075Sobrien delete_address_reloads (output_reload_insn, insn); 803790075Sobrien delete_insn (output_reload_insn); 803890075Sobrien } 803918334Speter} 804052284Sobrien 804152284Sobrien/* We are going to delete DEAD_INSN. Recursively delete loads of 804252284Sobrien reload registers used in DEAD_INSN that are not used till CURRENT_INSN. 804352284Sobrien CURRENT_INSN is being reloaded, so we have to check its reloads too. */ 804452284Sobrienstatic void 8045132718Skandelete_address_reloads (rtx dead_insn, rtx current_insn) 804652284Sobrien{ 804752284Sobrien rtx set = single_set (dead_insn); 804852284Sobrien rtx set2, dst, prev, next; 804952284Sobrien if (set) 805052284Sobrien { 805152284Sobrien rtx dst = SET_DEST (set); 8052169689Skan if (MEM_P (dst)) 805352284Sobrien delete_address_reloads_1 (dead_insn, XEXP (dst, 0), current_insn); 805452284Sobrien } 805552284Sobrien /* If we deleted the store from a reloaded post_{in,de}c expression, 805652284Sobrien we can delete the matching adds. */ 805752284Sobrien prev = PREV_INSN (dead_insn); 805852284Sobrien next = NEXT_INSN (dead_insn); 805952284Sobrien if (! prev || ! next) 806052284Sobrien return; 806152284Sobrien set = single_set (next); 806252284Sobrien set2 = single_set (prev); 806352284Sobrien if (! set || ! set2 806452284Sobrien || GET_CODE (SET_SRC (set)) != PLUS || GET_CODE (SET_SRC (set2)) != PLUS 806552284Sobrien || GET_CODE (XEXP (SET_SRC (set), 1)) != CONST_INT 806652284Sobrien || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT) 806752284Sobrien return; 806852284Sobrien dst = SET_DEST (set); 806952284Sobrien if (! rtx_equal_p (dst, SET_DEST (set2)) 807052284Sobrien || ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0)) 807152284Sobrien || ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0)) 807252284Sobrien || (INTVAL (XEXP (SET_SRC (set), 1)) 807390075Sobrien != -INTVAL (XEXP (SET_SRC (set2), 1)))) 807452284Sobrien return; 807590075Sobrien delete_related_insns (prev); 807690075Sobrien delete_related_insns (next); 807752284Sobrien} 807852284Sobrien 807952284Sobrien/* Subfunction of delete_address_reloads: process registers found in X. */ 808052284Sobrienstatic void 8081132718Skandelete_address_reloads_1 (rtx dead_insn, rtx x, rtx current_insn) 808252284Sobrien{ 808352284Sobrien rtx prev, set, dst, i2; 808452284Sobrien int i, j; 808552284Sobrien enum rtx_code code = GET_CODE (x); 808652284Sobrien 808752284Sobrien if (code != REG) 808852284Sobrien { 808990075Sobrien const char *fmt = GET_RTX_FORMAT (code); 809052284Sobrien for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 809152284Sobrien { 809252284Sobrien if (fmt[i] == 'e') 809352284Sobrien delete_address_reloads_1 (dead_insn, XEXP (x, i), current_insn); 809452284Sobrien else if (fmt[i] == 'E') 809552284Sobrien { 809690075Sobrien for (j = XVECLEN (x, i) - 1; j >= 0; j--) 809752284Sobrien delete_address_reloads_1 (dead_insn, XVECEXP (x, i, j), 809852284Sobrien current_insn); 809952284Sobrien } 810052284Sobrien } 810152284Sobrien return; 810252284Sobrien } 810352284Sobrien 810452284Sobrien if (spill_reg_order[REGNO (x)] < 0) 810552284Sobrien return; 810652284Sobrien 810752284Sobrien /* Scan backwards for the insn that sets x. This might be a way back due 810852284Sobrien to inheritance. */ 810952284Sobrien for (prev = PREV_INSN (dead_insn); prev; prev = PREV_INSN (prev)) 811052284Sobrien { 811152284Sobrien code = GET_CODE (prev); 811252284Sobrien if (code == CODE_LABEL || code == JUMP_INSN) 811352284Sobrien return; 8114169689Skan if (!INSN_P (prev)) 811552284Sobrien continue; 811652284Sobrien if (reg_set_p (x, PATTERN (prev))) 811752284Sobrien break; 811852284Sobrien if (reg_referenced_p (x, PATTERN (prev))) 811952284Sobrien return; 812052284Sobrien } 812152284Sobrien if (! prev || INSN_UID (prev) < reload_first_uid) 812252284Sobrien return; 812352284Sobrien /* Check that PREV only sets the reload register. */ 812452284Sobrien set = single_set (prev); 812552284Sobrien if (! set) 812652284Sobrien return; 812752284Sobrien dst = SET_DEST (set); 8128169689Skan if (!REG_P (dst) 812952284Sobrien || ! rtx_equal_p (dst, x)) 813052284Sobrien return; 813152284Sobrien if (! reg_set_p (dst, PATTERN (dead_insn))) 813252284Sobrien { 813352284Sobrien /* Check if DST was used in a later insn - 813452284Sobrien it might have been inherited. */ 813552284Sobrien for (i2 = NEXT_INSN (dead_insn); i2; i2 = NEXT_INSN (i2)) 813652284Sobrien { 8137169689Skan if (LABEL_P (i2)) 813852284Sobrien break; 813990075Sobrien if (! INSN_P (i2)) 814052284Sobrien continue; 814152284Sobrien if (reg_referenced_p (dst, PATTERN (i2))) 814252284Sobrien { 814352284Sobrien /* If there is a reference to the register in the current insn, 814452284Sobrien it might be loaded in a non-inherited reload. If no other 814552284Sobrien reload uses it, that means the register is set before 814652284Sobrien referenced. */ 814752284Sobrien if (i2 == current_insn) 814852284Sobrien { 814952284Sobrien for (j = n_reloads - 1; j >= 0; j--) 815090075Sobrien if ((rld[j].reg_rtx == dst && reload_inherited[j]) 815152284Sobrien || reload_override_in[j] == dst) 815252284Sobrien return; 815352284Sobrien for (j = n_reloads - 1; j >= 0; j--) 815490075Sobrien if (rld[j].in && rld[j].reg_rtx == dst) 815552284Sobrien break; 815652284Sobrien if (j >= 0) 815752284Sobrien break; 815852284Sobrien } 815952284Sobrien return; 816052284Sobrien } 8161169689Skan if (JUMP_P (i2)) 816252284Sobrien break; 816352284Sobrien /* If DST is still live at CURRENT_INSN, check if it is used for 816452284Sobrien any reload. Note that even if CURRENT_INSN sets DST, we still 816552284Sobrien have to check the reloads. */ 816652284Sobrien if (i2 == current_insn) 816752284Sobrien { 816852284Sobrien for (j = n_reloads - 1; j >= 0; j--) 816990075Sobrien if ((rld[j].reg_rtx == dst && reload_inherited[j]) 817052284Sobrien || reload_override_in[j] == dst) 817152284Sobrien return; 817252284Sobrien /* ??? We can't finish the loop here, because dst might be 817352284Sobrien allocated to a pseudo in this block if no reload in this 8174132718Skan block needs any of the classes containing DST - see 817552284Sobrien spill_hard_reg. There is no easy way to tell this, so we 817652284Sobrien have to scan till the end of the basic block. */ 817752284Sobrien } 817852284Sobrien if (reg_set_p (dst, PATTERN (i2))) 817952284Sobrien break; 818052284Sobrien } 818152284Sobrien } 818252284Sobrien delete_address_reloads_1 (prev, SET_SRC (set), current_insn); 818352284Sobrien reg_reloaded_contents[REGNO (dst)] = -1; 818490075Sobrien delete_insn (prev); 818552284Sobrien} 818618334Speter 818718334Speter/* Output reload-insns to reload VALUE into RELOADREG. 818818334Speter VALUE is an autoincrement or autodecrement RTX whose operand 818918334Speter is a register or memory location; 819018334Speter so reloading involves incrementing that location. 819152284Sobrien IN is either identical to VALUE, or some cheaper place to reload from. 819218334Speter 819318334Speter INC_AMOUNT is the number to increment or decrement by (always positive). 819452284Sobrien This cannot be deduced from VALUE. 819518334Speter 819652284Sobrien Return the instruction that stores into RELOADREG. */ 819752284Sobrien 819852284Sobrienstatic rtx 8199132718Skaninc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount) 820018334Speter{ 820118334Speter /* REG or MEM to be copied and incremented. */ 8202169689Skan rtx incloc = find_replacement (&XEXP (value, 0)); 820318334Speter /* Nonzero if increment after copying. */ 8204169689Skan int post = (GET_CODE (value) == POST_DEC || GET_CODE (value) == POST_INC 8205169689Skan || GET_CODE (value) == POST_MODIFY); 820618334Speter rtx last; 820718334Speter rtx inc; 820818334Speter rtx add_insn; 820918334Speter int code; 821052284Sobrien rtx store; 8211169689Skan rtx real_in = in == value ? incloc : in; 821218334Speter 821318334Speter /* No hard register is equivalent to this register after 8214117395Skan inc/dec operation. If REG_LAST_RELOAD_REG were nonzero, 821518334Speter we could inc/dec that register as well (maybe even using it for 821618334Speter the source), but I'm not sure it's worth worrying about. */ 8217169689Skan if (REG_P (incloc)) 821818334Speter reg_last_reload_reg[REGNO (incloc)] = 0; 821918334Speter 8220169689Skan if (GET_CODE (value) == PRE_MODIFY || GET_CODE (value) == POST_MODIFY) 8221169689Skan { 8222169689Skan gcc_assert (GET_CODE (XEXP (value, 1)) == PLUS); 8223169689Skan inc = find_replacement (&XEXP (XEXP (value, 1), 1)); 8224169689Skan } 8225169689Skan else 8226169689Skan { 8227169689Skan if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC) 8228169689Skan inc_amount = -inc_amount; 822918334Speter 8230169689Skan inc = GEN_INT (inc_amount); 8231169689Skan } 823218334Speter 823318334Speter /* If this is post-increment, first copy the location to the reload reg. */ 823452284Sobrien if (post && real_in != reloadreg) 823552284Sobrien emit_insn (gen_move_insn (reloadreg, real_in)); 823618334Speter 823752284Sobrien if (in == value) 823852284Sobrien { 823952284Sobrien /* See if we can directly increment INCLOC. Use a method similar to 824052284Sobrien that in gen_reload. */ 824118334Speter 824252284Sobrien last = get_last_insn (); 824352284Sobrien add_insn = emit_insn (gen_rtx_SET (VOIDmode, incloc, 824452284Sobrien gen_rtx_PLUS (GET_MODE (incloc), 824552284Sobrien incloc, inc))); 824690075Sobrien 824752284Sobrien code = recog_memoized (add_insn); 824852284Sobrien if (code >= 0) 824918334Speter { 825052284Sobrien extract_insn (add_insn); 825152284Sobrien if (constrain_operands (1)) 825252284Sobrien { 825352284Sobrien /* If this is a pre-increment and we have incremented the value 825452284Sobrien where it lives, copy the incremented value to RELOADREG to 825552284Sobrien be used as an address. */ 825618334Speter 825752284Sobrien if (! post) 825852284Sobrien emit_insn (gen_move_insn (reloadreg, incloc)); 825918334Speter 826052284Sobrien return add_insn; 826152284Sobrien } 826218334Speter } 826352284Sobrien delete_insns_since (last); 826418334Speter } 826518334Speter 826618334Speter /* If couldn't do the increment directly, must increment in RELOADREG. 826718334Speter The way we do this depends on whether this is pre- or post-increment. 826818334Speter For pre-increment, copy INCLOC to the reload register, increment it 826918334Speter there, then save back. */ 827018334Speter 827118334Speter if (! post) 827218334Speter { 827352284Sobrien if (in != reloadreg) 827452284Sobrien emit_insn (gen_move_insn (reloadreg, real_in)); 827518334Speter emit_insn (gen_add2_insn (reloadreg, inc)); 827652284Sobrien store = emit_insn (gen_move_insn (incloc, reloadreg)); 827718334Speter } 827818334Speter else 827918334Speter { 828018334Speter /* Postincrement. 828118334Speter Because this might be a jump insn or a compare, and because RELOADREG 828218334Speter may not be available after the insn in an input reload, we must do 828318334Speter the incrementation before the insn being reloaded for. 828418334Speter 828552284Sobrien We have already copied IN to RELOADREG. Increment the copy in 828618334Speter RELOADREG, save that back, then decrement RELOADREG so it has 828718334Speter the original value. */ 828818334Speter 828918334Speter emit_insn (gen_add2_insn (reloadreg, inc)); 829052284Sobrien store = emit_insn (gen_move_insn (incloc, reloadreg)); 8291169689Skan if (GET_CODE (inc) == CONST_INT) 8292169689Skan emit_insn (gen_add2_insn (reloadreg, GEN_INT (-INTVAL(inc)))); 8293169689Skan else 8294169689Skan emit_insn (gen_sub2_insn (reloadreg, inc)); 829518334Speter } 829618334Speter 829752284Sobrien return store; 829818334Speter} 829918334Speter 830052284Sobrien#ifdef AUTO_INC_DEC 830152284Sobrienstatic void 8302132718Skanadd_auto_inc_notes (rtx insn, rtx x) 830352284Sobrien{ 830452284Sobrien enum rtx_code code = GET_CODE (x); 830590075Sobrien const char *fmt; 830652284Sobrien int i, j; 830752284Sobrien 830852284Sobrien if (code == MEM && auto_inc_p (XEXP (x, 0))) 830952284Sobrien { 831052284Sobrien REG_NOTES (insn) 831152284Sobrien = gen_rtx_EXPR_LIST (REG_INC, XEXP (XEXP (x, 0), 0), REG_NOTES (insn)); 831252284Sobrien return; 831352284Sobrien } 831452284Sobrien 831552284Sobrien /* Scan all the operand sub-expressions. */ 831652284Sobrien fmt = GET_RTX_FORMAT (code); 831752284Sobrien for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 831852284Sobrien { 831952284Sobrien if (fmt[i] == 'e') 832052284Sobrien add_auto_inc_notes (insn, XEXP (x, i)); 832152284Sobrien else if (fmt[i] == 'E') 832252284Sobrien for (j = XVECLEN (x, i) - 1; j >= 0; j--) 832352284Sobrien add_auto_inc_notes (insn, XVECEXP (x, i, j)); 832452284Sobrien } 832552284Sobrien} 832652284Sobrien#endif 832790075Sobrien 832890075Sobrien/* Copy EH notes from an insn to its reloads. */ 832990075Sobrienstatic void 8330132718Skancopy_eh_notes (rtx insn, rtx x) 833190075Sobrien{ 833290075Sobrien rtx eh_note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); 833390075Sobrien if (eh_note) 833490075Sobrien { 833590075Sobrien for (; x != 0; x = NEXT_INSN (x)) 833690075Sobrien { 833790075Sobrien if (may_trap_p (PATTERN (x))) 8338117395Skan REG_NOTES (x) 833990075Sobrien = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0), 834090075Sobrien REG_NOTES (x)); 834190075Sobrien } 834290075Sobrien } 834390075Sobrien} 834490075Sobrien 834590075Sobrien/* This is used by reload pass, that does emit some instructions after 834690075Sobrien abnormal calls moving basic block end, but in fact it wants to emit 834790075Sobrien them on the edge. Looks for abnormal call edges, find backward the 834890075Sobrien proper call and fix the damage. 8349117395Skan 835090075Sobrien Similar handle instructions throwing exceptions internally. */ 835196263Sobrienvoid 8352132718Skanfixup_abnormal_edges (void) 835390075Sobrien{ 835490075Sobrien bool inserted = false; 8355117395Skan basic_block bb; 835690075Sobrien 8357117395Skan FOR_EACH_BB (bb) 835890075Sobrien { 835990075Sobrien edge e; 8360169689Skan edge_iterator ei; 836190075Sobrien 8362117395Skan /* Look for cases we are interested in - calls or instructions causing 836390075Sobrien exceptions. */ 8364169689Skan FOR_EACH_EDGE (e, ei, bb->succs) 836590075Sobrien { 836690075Sobrien if (e->flags & EDGE_ABNORMAL_CALL) 836790075Sobrien break; 836890075Sobrien if ((e->flags & (EDGE_ABNORMAL | EDGE_EH)) 836990075Sobrien == (EDGE_ABNORMAL | EDGE_EH)) 837090075Sobrien break; 837190075Sobrien } 8372169689Skan if (e && !CALL_P (BB_END (bb)) 8373132718Skan && !can_throw_internal (BB_END (bb))) 837490075Sobrien { 8375169689Skan rtx insn; 8376169689Skan 8377169689Skan /* Get past the new insns generated. Allow notes, as the insns 8378169689Skan may be already deleted. */ 8379169689Skan insn = BB_END (bb); 8380169689Skan while ((NONJUMP_INSN_P (insn) || NOTE_P (insn)) 838190075Sobrien && !can_throw_internal (insn) 8382132718Skan && insn != BB_HEAD (bb)) 838390075Sobrien insn = PREV_INSN (insn); 8384169689Skan 8385169689Skan if (CALL_P (insn) || can_throw_internal (insn)) 838690075Sobrien { 8387169689Skan rtx stop, next; 8388169689Skan 8389169689Skan stop = NEXT_INSN (BB_END (bb)); 8390169689Skan BB_END (bb) = insn; 8391169689Skan insn = NEXT_INSN (insn); 8392169689Skan 8393169689Skan FOR_EACH_EDGE (e, ei, bb->succs) 8394169689Skan if (e->flags & EDGE_FALLTHRU) 8395169689Skan break; 8396169689Skan 8397169689Skan while (insn && insn != stop) 839890075Sobrien { 8399169689Skan next = NEXT_INSN (insn); 8400169689Skan if (INSN_P (insn)) 8401117395Skan { 8402169689Skan delete_insn (insn); 840396263Sobrien 8404169689Skan /* Sometimes there's still the return value USE. 8405169689Skan If it's placed after a trapping call (i.e. that 8406169689Skan call is the last insn anyway), we have no fallthru 8407169689Skan edge. Simply delete this use and don't try to insert 8408169689Skan on the non-existent edge. */ 8409169689Skan if (GET_CODE (PATTERN (insn)) != USE) 8410169689Skan { 8411169689Skan /* We're not deleting it, we're moving it. */ 8412169689Skan INSN_DELETED_P (insn) = 0; 8413169689Skan PREV_INSN (insn) = NULL_RTX; 8414169689Skan NEXT_INSN (insn) = NULL_RTX; 8415169689Skan 8416169689Skan insert_insn_on_edge (insn, e); 8417169689Skan inserted = true; 8418169689Skan } 8419117395Skan } 8420169689Skan insn = next; 842190075Sobrien } 842290075Sobrien } 8423169689Skan 8424169689Skan /* It may be that we don't find any such trapping insn. In this 8425169689Skan case we discovered quite late that the insn that had been 8426169689Skan marked as can_throw_internal in fact couldn't trap at all. 8427169689Skan So we should in fact delete the EH edges out of the block. */ 8428169689Skan else 8429169689Skan purge_dead_edges (bb); 843090075Sobrien } 843190075Sobrien } 8432169689Skan 8433132718Skan /* We've possibly turned single trapping insn into multiple ones. */ 8434132718Skan if (flag_non_call_exceptions) 8435132718Skan { 8436132718Skan sbitmap blocks; 8437132718Skan blocks = sbitmap_alloc (last_basic_block); 8438132718Skan sbitmap_ones (blocks); 8439132718Skan find_many_sub_basic_blocks (blocks); 8440132718Skan } 8441169689Skan 844290075Sobrien if (inserted) 844390075Sobrien commit_edge_insertions (); 8444169689Skan 8445169689Skan#ifdef ENABLE_CHECKING 8446169689Skan /* Verify that we didn't turn one trapping insn into many, and that 8447169689Skan we found and corrected all of the problems wrt fixups on the 8448169689Skan fallthru edge. */ 8449169689Skan verify_flow_info (); 8450169689Skan#endif 845190075Sobrien} 8452