1117395Skan;; Scheduling description for SuperSPARC.
2117395Skan;;   Copyright (C) 2002 Free Software Foundation, Inc.
3117395Skan;;
4132718Skan;; This file is part of GCC.
5117395Skan;;
6132718Skan;; GCC is free software; you can redistribute it and/or modify
7117395Skan;; it under the terms of the GNU General Public License as published by
8117395Skan;; the Free Software Foundation; either version 2, or (at your option)
9117395Skan;; any later version.
10117395Skan;;
11132718Skan;; GCC is distributed in the hope that it will be useful,
12117395Skan;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13117395Skan;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14117395Skan;; GNU General Public License for more details.
15117395Skan;;
16117395Skan;; You should have received a copy of the GNU General Public License
17132718Skan;; along with GCC; see the file COPYING.  If not, write to
18169689Skan;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
19169689Skan;; Boston, MA 02110-1301, USA.
20117395Skan
21117395Skan;; The SuperSPARC is a tri-issue, which was considered quite parallel
22117395Skan;; at the time it was released.  Much like UltraSPARC-I and UltraSPARC-II
23117395Skan;; there are two integer units but only one of them may take shifts.
24117395Skan;;
25117395Skan;; ??? If SuperSPARC has the same slotting rules as ultrasparc for these
26117395Skan;; ??? shifts, we should model that.
27117395Skan
28117395Skan(define_automaton "supersparc_0,supersparc_1")
29117395Skan
30117395Skan(define_cpu_unit "ss_memory, ss_shift, ss_iwport0, ss_iwport1" "supersparc_0")
31117395Skan(define_cpu_unit "ss_fpalu" "supersparc_0")
32117395Skan(define_cpu_unit "ss_fpmds" "supersparc_1")
33117395Skan
34117395Skan(define_reservation "ss_iwport" "(ss_iwport0 | ss_iwport1)")
35117395Skan
36117395Skan(define_insn_reservation "ss_iuload" 1
37117395Skan  (and (eq_attr "cpu" "supersparc")
38117395Skan    (eq_attr "type" "load,sload"))
39117395Skan  "ss_memory")
40117395Skan
41117395Skan;; Ok, fpu loads deliver the result in zero cycles.  But we
42117395Skan;; have to show the ss_memory reservation somehow, thus...
43117395Skan(define_insn_reservation "ss_fpload" 0
44117395Skan  (and (eq_attr "cpu" "supersparc")
45117395Skan    (eq_attr "type" "fpload"))
46117395Skan  "ss_memory")
47117395Skan
48117395Skan(define_bypass 0 "ss_fpload" "ss_fp_alu,ss_fp_mult,ss_fp_divs,ss_fp_divd,ss_fp_sqrt")
49117395Skan
50117395Skan(define_insn_reservation "ss_store" 1
51117395Skan  (and (eq_attr "cpu" "supersparc")
52117395Skan    (eq_attr "type" "store,fpstore"))
53117395Skan  "ss_memory")
54117395Skan
55117395Skan(define_insn_reservation "ss_ialu_shift" 1
56117395Skan  (and (eq_attr "cpu" "supersparc")
57117395Skan    (eq_attr "type" "shift"))
58117395Skan  "ss_shift + ss_iwport")
59117395Skan
60117395Skan(define_insn_reservation "ss_ialu_any" 1
61117395Skan  (and (eq_attr "cpu" "supersparc")
62117395Skan    (eq_attr "type" "load,sload,store,shift,ialu"))
63117395Skan  "ss_iwport")
64117395Skan
65117395Skan(define_insn_reservation "ss_fp_alu" 3
66117395Skan  (and (eq_attr "cpu" "supersparc")
67117395Skan    (eq_attr "type" "fp,fpmove,fpcmp"))
68117395Skan  "ss_fpalu, nothing*2")
69117395Skan
70117395Skan(define_insn_reservation "ss_fp_mult" 3
71117395Skan  (and (eq_attr "cpu" "supersparc")
72117395Skan    (eq_attr "type" "fpmul"))
73117395Skan  "ss_fpmds, nothing*2")
74117395Skan
75117395Skan(define_insn_reservation "ss_fp_divs" 6
76117395Skan  (and (eq_attr "cpu" "supersparc")
77117395Skan    (eq_attr "type" "fpdivs"))
78117395Skan  "ss_fpmds*4, nothing*2")
79117395Skan
80117395Skan(define_insn_reservation "ss_fp_divd" 9
81117395Skan  (and (eq_attr "cpu" "supersparc")
82117395Skan    (eq_attr "type" "fpdivd"))
83117395Skan  "ss_fpmds*7, nothing*2")
84117395Skan
85117395Skan(define_insn_reservation "ss_fp_sqrt" 12
86117395Skan  (and (eq_attr "cpu" "supersparc")
87117395Skan    (eq_attr "type" "fpsqrts,fpsqrtd"))
88117395Skan  "ss_fpmds*10, nothing*2")
89117395Skan
90117395Skan(define_insn_reservation "ss_imul" 4
91117395Skan  (and (eq_attr "cpu" "supersparc")
92117395Skan    (eq_attr "type" "imul"))
93117395Skan  "ss_fpmds*4")
94