7450.md revision 169690
179980Sobrien;; Scheduling description for Motorola PowerPC 7450 processor. 279980Sobrien;; Copyright (C) 2003, 2004 Free Software Foundation, Inc. 379980Sobrien;; 479980Sobrien;; This file is part of GCC. 579980Sobrien 679980Sobrien;; GCC is free software; you can redistribute it and/or modify it 779980Sobrien;; under the terms of the GNU General Public License as published 879980Sobrien;; by the Free Software Foundation; either version 2, or (at your 979980Sobrien;; option) any later version. 1079980Sobrien 1179980Sobrien;; GCC is distributed in the hope that it will be useful, but WITHOUT 1279980Sobrien;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 1379980Sobrien;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 1479980Sobrien;; License for more details. 1579980Sobrien 1679980Sobrien;; You should have received a copy of the GNU General Public License 1779980Sobrien;; along with GCC; see the file COPYING. If not, write to the 1879980Sobrien;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 1979980Sobrien;; MA 02110-1301, USA. 2079980Sobrien 2179980Sobrien(define_automaton "ppc7450,ppc7450mciu,ppc7450fp,ppc7450vec") 2279980Sobrien(define_cpu_unit "iu1_7450,iu2_7450,iu3_7450" "ppc7450") 2379980Sobrien(define_cpu_unit "mciu_7450" "ppc7450mciu") 2479980Sobrien(define_cpu_unit "fpu_7450" "ppc7450fp") 2579980Sobrien(define_cpu_unit "lsu_7450,bpu_7450" "ppc7450") 2679980Sobrien(define_cpu_unit "du1_7450,du2_7450,du3_7450" "ppc7450") 2779980Sobrien(define_cpu_unit "vecsmpl_7450,veccmplx_7450,vecflt_7450,vecperm_7450" "ppc7450vec") 2879980Sobrien(define_cpu_unit "vdu1_7450,vdu2_7450" "ppc7450vec") 2979980Sobrien 3079980Sobrien 3179980Sobrien;; PPC7450 32-bit 3xIU, MCIU, LSU, SRU, FPU, BPU, 4xVEC 3279980Sobrien;; IU1,IU2,IU3 can perform all integer operations 3379980Sobrien;; MCIU performs imul and idiv, cr logical, SPR moves 3479980Sobrien;; LSU 2 stage pipelined 3579980Sobrien;; FPU 3 stage pipelined 3679980Sobrien;; It also has 4 vector units, one for each type of vector instruction. 3779980Sobrien;; However, we can only dispatch 2 instructions per cycle. 3879980Sobrien;; Max issue 3 insns/clock cycle (includes 1 branch) 3979980Sobrien;; In-order execution 4079980Sobrien 4179980Sobrien;; Branches go straight to the BPU. All other insns are handled 4279980Sobrien;; by a dispatch unit which can issue a max of 3 insns per cycle. 4379980Sobrien(define_reservation "ppc7450_du" "du1_7450|du2_7450|du3_7450") 4479980Sobrien(define_reservation "ppc7450_vec_du" "vdu1_7450|vdu2_7450") 4579980Sobrien 4679980Sobrien(define_insn_reservation "ppc7450-load" 3 4779980Sobrien (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,\ 4879980Sobrien load_ux,load_u,vecload") 4979980Sobrien (eq_attr "cpu" "ppc7450")) 5079980Sobrien "ppc7450_du,lsu_7450") 5179980Sobrien 5279980Sobrien(define_insn_reservation "ppc7450-store" 3 5379980Sobrien (and (eq_attr "type" "store,store_ux,store_u,vecstore") 5479980Sobrien (eq_attr "cpu" "ppc7450")) 5579980Sobrien "ppc7450_du,lsu_7450") 5679980Sobrien 5779980Sobrien(define_insn_reservation "ppc7450-fpload" 4 5879980Sobrien (and (eq_attr "type" "fpload,fpload_ux,fpload_u") 5979980Sobrien (eq_attr "cpu" "ppc7450")) 6079980Sobrien "ppc7450_du,lsu_7450") 6179980Sobrien 6279980Sobrien(define_insn_reservation "ppc7450-fpstore" 3 6379980Sobrien (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u") 6479980Sobrien (eq_attr "cpu" "ppc7450")) 6579980Sobrien "ppc7450_du,lsu_7450*3") 6679980Sobrien 6779980Sobrien(define_insn_reservation "ppc7450-llsc" 3 6879980Sobrien (and (eq_attr "type" "load_l,store_c") 6979980Sobrien (eq_attr "cpu" "ppc7450")) 7079980Sobrien "ppc7450_du,lsu_7450") 7179980Sobrien 7279980Sobrien(define_insn_reservation "ppc7450-sync" 35 7379980Sobrien (and (eq_attr "type" "sync") 7479980Sobrien (eq_attr "cpu" "ppc7450")) 7579980Sobrien "ppc7450_du,lsu_7450") 7679980Sobrien 7779980Sobrien(define_insn_reservation "ppc7450-integer" 1 7879980Sobrien (and (eq_attr "type" "integer,insert_word") 7979980Sobrien (eq_attr "cpu" "ppc7450")) 8079980Sobrien "ppc7450_du,iu1_7450|iu2_7450|iu3_7450") 8179980Sobrien 8279980Sobrien(define_insn_reservation "ppc7450-two" 1 8379980Sobrien (and (eq_attr "type" "two") 8479980Sobrien (eq_attr "cpu" "ppc7450")) 8579980Sobrien "ppc7450_du,iu1_7450|iu2_7450|iu3_7450,iu1_7450|iu2_7450|iu3_7450") 8679980Sobrien 8779980Sobrien(define_insn_reservation "ppc7450-three" 1 8879980Sobrien (and (eq_attr "type" "three") 8979980Sobrien (eq_attr "cpu" "ppc7450")) 9079980Sobrien "ppc7450_du,iu1_7450|iu2_7450|iu3_7450,\ 9179980Sobrien iu1_7450|iu2_7450|iu3_7450,iu1_7450|iu2_7450|iu3_7450") 9279980Sobrien 9379980Sobrien(define_insn_reservation "ppc7450-imul" 4 9479980Sobrien (and (eq_attr "type" "imul,imul_compare") 9579980Sobrien (eq_attr "cpu" "ppc7450")) 9679980Sobrien "ppc7450_du,mciu_7450*2") 9779980Sobrien 9879980Sobrien(define_insn_reservation "ppc7450-imul2" 3 9979980Sobrien (and (eq_attr "type" "imul2,imul3") 10079980Sobrien (eq_attr "cpu" "ppc7450")) 10179980Sobrien "ppc7450_du,mciu_7450") 10279980Sobrien 10379980Sobrien(define_insn_reservation "ppc7450-idiv" 23 10479980Sobrien (and (eq_attr "type" "idiv") 10579980Sobrien (eq_attr "cpu" "ppc7450")) 10679980Sobrien "ppc7450_du,mciu_7450*23") 10779980Sobrien 10879980Sobrien(define_insn_reservation "ppc7450-compare" 2 10979980Sobrien (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare") 11079980Sobrien (eq_attr "cpu" "ppc7450")) 11179980Sobrien "ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)") 11279980Sobrien 11379980Sobrien(define_insn_reservation "ppc7450-fpcompare" 5 11479980Sobrien (and (eq_attr "type" "fpcompare") 11579980Sobrien (eq_attr "cpu" "ppc7450")) 11679980Sobrien "ppc7450_du,fpu_7450") 11779980Sobrien 11879980Sobrien(define_insn_reservation "ppc7450-fp" 5 11979980Sobrien (and (eq_attr "type" "fp,dmul") 12079980Sobrien (eq_attr "cpu" "ppc7450")) 12179980Sobrien "ppc7450_du,fpu_7450") 12279980Sobrien 12379980Sobrien; Divides are not pipelined 12479980Sobrien(define_insn_reservation "ppc7450-sdiv" 21 12579980Sobrien (and (eq_attr "type" "sdiv") 12679980Sobrien (eq_attr "cpu" "ppc7450")) 12779980Sobrien "ppc7450_du,fpu_7450*21") 12879980Sobrien 12979980Sobrien(define_insn_reservation "ppc7450-ddiv" 35 13079980Sobrien (and (eq_attr "type" "ddiv") 13179980Sobrien (eq_attr "cpu" "ppc7450")) 13279980Sobrien "ppc7450_du,fpu_7450*35") 13379980Sobrien 13479980Sobrien(define_insn_reservation "ppc7450-mfcr" 2 13579980Sobrien (and (eq_attr "type" "mfcr,mtcr") 13679980Sobrien (eq_attr "cpu" "ppc7450")) 13779980Sobrien "ppc7450_du,mciu_7450") 13879980Sobrien 13979980Sobrien(define_insn_reservation "ppc7450-crlogical" 1 14079980Sobrien (and (eq_attr "type" "cr_logical,delayed_cr") 14179980Sobrien (eq_attr "cpu" "ppc7450")) 14279980Sobrien "ppc7450_du,mciu_7450") 14379980Sobrien 14479980Sobrien(define_insn_reservation "ppc7450-mtjmpr" 2 14579980Sobrien (and (eq_attr "type" "mtjmpr") 14679980Sobrien (eq_attr "cpu" "ppc7450")) 14779980Sobrien "nothing,mciu_7450*2") 14879980Sobrien 14979980Sobrien(define_insn_reservation "ppc7450-mfjmpr" 3 15079980Sobrien (and (eq_attr "type" "mfjmpr") 15179980Sobrien (eq_attr "cpu" "ppc7450")) 15279980Sobrien "nothing,mciu_7450*2") 15379980Sobrien 15479980Sobrien(define_insn_reservation "ppc7450-jmpreg" 1 15579980Sobrien (and (eq_attr "type" "jmpreg,branch,isync") 15679980Sobrien (eq_attr "cpu" "ppc7450")) 15779980Sobrien "nothing,bpu_7450") 15879980Sobrien 15979980Sobrien;; Altivec 16079980Sobrien(define_insn_reservation "ppc7450-vecsimple" 1 16179980Sobrien (and (eq_attr "type" "vecsimple") 16279980Sobrien (eq_attr "cpu" "ppc7450")) 16379980Sobrien "ppc7450_du,ppc7450_vec_du,vecsmpl_7450") 16479980Sobrien 16579980Sobrien(define_insn_reservation "ppc7450-veccomplex" 4 16679980Sobrien (and (eq_attr "type" "veccomplex") 16779980Sobrien (eq_attr "cpu" "ppc7450")) 16879980Sobrien "ppc7450_du,ppc7450_vec_du,veccmplx_7450") 16979980Sobrien 17079980Sobrien(define_insn_reservation "ppc7450-veccmp" 2 17179980Sobrien (and (eq_attr "type" "veccmp") 17279980Sobrien (eq_attr "cpu" "ppc7450")) 17379980Sobrien "ppc7450_du,ppc7450_vec_du,veccmplx_7450") 17479980Sobrien 17579980Sobrien(define_insn_reservation "ppc7450-vecfloat" 4 17679980Sobrien (and (eq_attr "type" "vecfloat") 17779980Sobrien (eq_attr "cpu" "ppc7450")) 17879980Sobrien "ppc7450_du,ppc7450_vec_du,vecflt_7450") 17979980Sobrien 18079980Sobrien(define_insn_reservation "ppc7450-vecperm" 2 18179980Sobrien (and (eq_attr "type" "vecperm") 18279980Sobrien (eq_attr "cpu" "ppc7450")) 18379980Sobrien "ppc7450_du,ppc7450_vec_du,vecperm_7450") 18479980Sobrien 18579980Sobrien