pci_lpc.c revision 261088
1/*- 2 * Copyright (c) 2013 Neel Natu <neel@freebsd.org> 3 * Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: stable/10/usr.sbin/bhyve/pci_lpc.c 261088 2014-01-23 20:21:39Z jhb $ 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: stable/10/usr.sbin/bhyve/pci_lpc.c 261088 2014-01-23 20:21:39Z jhb $"); 32 33#include <sys/types.h> 34#include <machine/vmm.h> 35#include <machine/vmm_dev.h> 36 37#include <stdio.h> 38#include <stdlib.h> 39#include <string.h> 40 41#include <vmmapi.h> 42 43#include "inout.h" 44#include "pci_emul.h" 45#include "uart_emul.h" 46 47static struct pci_devinst *lpc_bridge; 48 49#define LPC_UART_NUM 2 50static struct lpc_uart_softc { 51 struct uart_softc *uart_softc; 52 const char *opts; 53 int iobase; 54 int irq; 55} lpc_uart_softc[LPC_UART_NUM]; 56 57static const char *lpc_uart_names[LPC_UART_NUM] = { "COM1", "COM2" }; 58 59/* 60 * LPC device configuration is in the following form: 61 * <lpc_device_name>[,<options>] 62 * For e.g. "com1,stdio" 63 */ 64int 65lpc_device_parse(const char *opts) 66{ 67 int unit, error; 68 char *str, *cpy, *lpcdev; 69 70 error = -1; 71 str = cpy = strdup(opts); 72 lpcdev = strsep(&str, ","); 73 if (lpcdev != NULL) { 74 for (unit = 0; unit < LPC_UART_NUM; unit++) { 75 if (strcasecmp(lpcdev, lpc_uart_names[unit]) == 0) { 76 lpc_uart_softc[unit].opts = str; 77 error = 0; 78 goto done; 79 } 80 } 81 } 82 83done: 84 if (error) 85 free(cpy); 86 87 return (error); 88} 89 90static void 91lpc_uart_intr_assert(void *arg) 92{ 93 struct lpc_uart_softc *sc = arg; 94 95 assert(sc->irq >= 0); 96 97 vm_ioapic_pulse_irq(lpc_bridge->pi_vmctx, sc->irq); 98} 99 100static void 101lpc_uart_intr_deassert(void *arg) 102{ 103 /* 104 * The COM devices on the LPC bus generate edge triggered interrupts, 105 * so nothing more to do here. 106 */ 107} 108 109static int 110lpc_uart_io_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes, 111 uint32_t *eax, void *arg) 112{ 113 int offset; 114 struct lpc_uart_softc *sc = arg; 115 116 if (bytes != 1) 117 return (-1); 118 119 offset = port - sc->iobase; 120 121 if (in) 122 *eax = uart_read(sc->uart_softc, offset); 123 else 124 uart_write(sc->uart_softc, offset, *eax); 125 126 return (0); 127} 128 129static int 130lpc_init(void) 131{ 132 struct lpc_uart_softc *sc; 133 struct inout_port iop; 134 const char *name; 135 int unit, error; 136 137 /* COM1 and COM2 */ 138 for (unit = 0; unit < LPC_UART_NUM; unit++) { 139 sc = &lpc_uart_softc[unit]; 140 name = lpc_uart_names[unit]; 141 142 if (uart_legacy_alloc(unit, &sc->iobase, &sc->irq) != 0) { 143 fprintf(stderr, "Unable to allocate resources for " 144 "LPC device %s\n", name); 145 return (-1); 146 } 147 148 sc->uart_softc = uart_init(lpc_uart_intr_assert, 149 lpc_uart_intr_deassert, sc); 150 151 if (uart_set_backend(sc->uart_softc, sc->opts) != 0) { 152 fprintf(stderr, "Unable to initialize backend '%s' " 153 "for LPC device %s\n", sc->opts, name); 154 return (-1); 155 } 156 157 bzero(&iop, sizeof(struct inout_port)); 158 iop.name = name; 159 iop.port = sc->iobase; 160 iop.size = UART_IO_BAR_SIZE; 161 iop.flags = IOPORT_F_INOUT; 162 iop.handler = lpc_uart_io_handler; 163 iop.arg = sc; 164 165 error = register_inout(&iop); 166 assert(error == 0); 167 } 168 169 return (0); 170} 171 172static void 173pci_lpc_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 174 int baridx, uint64_t offset, int size, uint64_t value) 175{ 176} 177 178uint64_t 179pci_lpc_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 180 int baridx, uint64_t offset, int size) 181{ 182 return (0); 183} 184 185#define LPC_DEV 0x7000 186#define LPC_VENDOR 0x8086 187 188static int 189pci_lpc_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) 190{ 191 /* 192 * Do not allow more than one LPC bridge to be configured. 193 */ 194 if (lpc_bridge != NULL) 195 return (-1); 196 197 if (lpc_init() != 0) 198 return (-1); 199 200 /* initialize config space */ 201 pci_set_cfgdata16(pi, PCIR_DEVICE, LPC_DEV); 202 pci_set_cfgdata16(pi, PCIR_VENDOR, LPC_VENDOR); 203 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE); 204 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_ISA); 205 206 lpc_bridge = pi; 207 208 return (0); 209} 210 211struct pci_devemu pci_de_lpc = { 212 .pe_emu = "lpc", 213 .pe_init = pci_lpc_init, 214 .pe_barwrite = pci_lpc_write, 215 .pe_barread = pci_lpc_read 216}; 217PCI_EMUL_SET(pci_de_lpc); 218