1185743Ssam/*-
2185743Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3185743Ssam * All rights reserved.
4185743Ssam *
5185743Ssam * Redistribution and use in source and binary forms, with or without
6185743Ssam * modification, are permitted provided that the following conditions
7185743Ssam * are met:
8185743Ssam * 1. Redistributions of source code must retain the above copyright
9185743Ssam *    notice, this list of conditions and the following disclaimer,
10185743Ssam *    without modification.
11185743Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12185743Ssam *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13185743Ssam *    redistribution must be conditioned upon including a substantially
14185743Ssam *    similar Disclaimer requirement for further binary redistribution.
15185743Ssam *
16185743Ssam * NO WARRANTY
17185743Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18185743Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19185743Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20185743Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21185743Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22185743Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23185743Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24185743Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25185743Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26185743Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27185743Ssam * THE POSSIBILITY OF SUCH DAMAGES.
28185743Ssam *
29185743Ssam * $FreeBSD$
30185743Ssam */
31185743Ssam#include "diag.h"
32185743Ssam
33185743Ssam#include "ah.h"
34185743Ssam#include "ah_internal.h"
35185743Ssam#include "ar5210/ar5210reg.h"
36189701Ssam#include "ar5210/ar5210phy.h"
37185743Ssam
38185743Ssam#include "dumpregs.h"
39185743Ssam
40185743Ssam#define	N(a)	(sizeof(a) / sizeof(a[0]))
41185743Ssam
42185743Ssamstatic struct dumpreg ar5210regs[] = {
43189701Ssam    DEFBASIC(AR_TXDP0,		"TXDP0"),
44189701Ssam    DEFBASIC(AR_TXDP1,		"TXDP1"),
45189701Ssam    DEFBASICfmt(AR_CR,		"CR",		AR_CR_BITS),
46189701Ssam    DEFBASIC(AR_RXDP,		"RXDP"),
47189701Ssam    DEFBASICfmt(AR_CFG,		"CFG",		AR_CFG_BITS),
48189701Ssam    /* NB: read clears pending interrupts */
49189701Ssam    DEFVOIDfmt(AR_ISR,		"ISR",		AR_ISR_BITS),
50189701Ssam    DEFBASICfmt(AR_IMR,		"IMR",		AR_IMR_BITS),
51189701Ssam    DEFBASICfmt(AR_IER,		"IER",		AR_IER_BITS),
52189701Ssam    DEFBASICfmt(AR_BCR,		"BCR",		AR_BCR_BITS),
53189701Ssam    DEFBASICfmt(AR_BSR,		"BSR",		AR_BSR_BITS),
54189701Ssam    DEFBASICfmt(AR_TXCFG,	"TXCFG",	AR_TXCFG_BITS),
55189701Ssam    DEFBASIC(AR_RXCFG,		"RXCFG"),
56189701Ssam    DEFBASIC(AR_MIBC,		"MIBC"),
57189701Ssam    DEFBASIC(AR_TOPS,		"TOPS"),
58189701Ssam    DEFBASIC(AR_RXNOFRM,	"RXNOFR"),
59189701Ssam    DEFBASIC(AR_TXNOFRM,	"TXNOFR"),
60189701Ssam    DEFBASIC(AR_RPGTO,		"RPGTO"),
61189701Ssam    DEFBASIC(AR_RFCNT,		"RFCNT"),
62189701Ssam    DEFBASIC(AR_MISC,		"MISC"),
63189701Ssam    DEFBASICfmt(AR_RC,		"RC",		AR_RC_BITS),
64189701Ssam    DEFBASICfmt(AR_SCR,		"SCR",		AR_SCR_BITS),
65189701Ssam    DEFBASICfmt(AR_INTPEND,	"INTPEND",	AR_INTPEND_BITS),
66189701Ssam    DEFBASIC(AR_SFR,		"SFR"),
67189701Ssam    DEFBASICfmt(AR_PCICFG,	"PCICFG",	AR_PCICFG_BITS),
68189701Ssam    DEFBASIC(AR_GPIOCR,		"GPIOCR"),
69189701Ssam    DEFVOID(AR_GPIODO,		"GPIODO"),
70189701Ssam    DEFVOID(AR_GPIODI,		"GPIODI"),
71189701Ssam    DEFBASIC(AR_SREV,		"SREV"),
72189701Ssam    DEFBASIC(AR_STA_ID0,	"STA_ID0"),
73189701Ssam    DEFBASICfmt(AR_STA_ID1,	"STA_ID1",	AR_STA_ID1_BITS),
74189701Ssam    DEFBASIC(AR_BSS_ID0,	"BSS_ID0"),
75189701Ssam    DEFBASIC(AR_BSS_ID1,	"BSS_ID1"),
76189701Ssam    DEFBASIC(AR_SLOT_TIME,	"SLOTTIME"),
77189701Ssam    DEFBASIC(AR_TIME_OUT,	"TIME_OUT"),
78189701Ssam    DEFBASIC(AR_RSSI_THR,	"RSSI_THR"),
79189701Ssam    DEFBASIC(AR_RETRY_LMT,	"RETRY_LM"),
80189701Ssam    DEFBASIC(AR_USEC,		"USEC"),
81189701Ssam    DEFBASICfmt(AR_BEACON,		"BEACON",	AR_BEACON_BITS),
82189701Ssam    DEFBASIC(AR_CFP_PERIOD,	"CFP_PER"),
83189701Ssam    DEFBASIC(AR_TIMER0,		"TIMER0"),
84189701Ssam    DEFBASIC(AR_TIMER1,		"TIMER1"),
85189701Ssam    DEFBASIC(AR_TIMER2,		"TIMER2"),
86189701Ssam    DEFBASIC(AR_TIMER3,		"TIMER3"),
87189701Ssam    DEFBASIC(AR_IFS0,		"IFS0"),
88189701Ssam    DEFBASIC(AR_IFS1,		"IFS1"	),
89189701Ssam    DEFBASIC(AR_CFP_DUR,	"CFP_DUR"),
90189701Ssam    DEFBASICfmt(AR_RX_FILTER,	"RXFILTER",	AR_BEACON_BITS),
91189701Ssam    DEFBASIC(AR_MCAST_FIL0,	"MCAST_0"),
92189701Ssam    DEFBASIC(AR_MCAST_FIL1,	"MCAST_1"),
93189701Ssam    DEFBASIC(AR_TX_MASK0,	"TX_MASK0"),
94189701Ssam    DEFBASIC(AR_TX_MASK1,	"TX_MASK1"),
95189701Ssam    DEFVOID(AR_CLR_TMASK,	"CLR_TMASK"),
96189701Ssam    DEFBASIC(AR_TRIG_LEV,	"TRIG_LEV"),
97189701Ssam    DEFBASICfmt(AR_DIAG_SW,	"DIAG_SW",	AR_DIAG_SW_BITS),
98189701Ssam    DEFBASIC(AR_TSF_L32,	"TSF_L32"),
99189701Ssam    DEFBASIC(AR_TSF_U32,	"TSF_U32"),
100189701Ssam    DEFBASIC(AR_LAST_TSTP,	"LAST_TST"),
101189701Ssam    DEFBASIC(AR_RETRY_CNT,	"RETRYCNT"),
102189701Ssam    DEFBASIC(AR_BACKOFF,	"BACKOFF"),
103189701Ssam    DEFBASIC(AR_NAV,		"NAV"),
104189701Ssam    DEFBASIC(AR_RTS_OK,		"RTS_OK"),
105189701Ssam    DEFBASIC(AR_RTS_FAIL,	"RTS_FAIL"),
106189701Ssam    DEFBASIC(AR_ACK_FAIL,	"ACK_FAIL"),
107189701Ssam    DEFBASIC(AR_FCS_FAIL,	"FCS_FAIL"),
108189701Ssam    DEFBASIC(AR_BEACON_CNT,	"BEAC_CNT"),
109189701Ssam
110189701Ssam    DEFVOIDfmt(AR_PHY_FRCTL,	"PHY_FRCTL",	AR_PHY_FRCTL_BITS),
111189701Ssam    DEFVOIDfmt(AR_PHY_AGC,	"PHY_AGC",	AR_PHY_AGC_BITS),
112189701Ssam    DEFVOID(AR_PHY_CHIPID,	"PHY_CHIPID"),
113189701Ssam    DEFVOIDfmt(AR_PHY_ACTIVE,	"PHY_ACTIVE",	AR_PHY_ACTIVE_BITS),
114189701Ssam    DEFVOIDfmt(AR_PHY_AGCCTL,	"PHY_AGCCTL",	AR_PHY_AGCCTL_BITS),
115185743Ssam};
116185743Ssam
117185743Ssamstatic __constructor void
118185743Ssamar5210_ctor(void)
119185743Ssam{
120185743Ssam#define	MAC5210	SREV(1,0), SREV(2,0)
121185743Ssam	register_regs(ar5210regs, N(ar5210regs), MAC5210, PHYANY);
122185743Ssam	register_keycache(64, MAC5210, PHYANY);
123185743Ssam
124185743Ssam	register_range(0x9800, 0x9840, DUMP_BASEBAND, MAC5210, PHYANY);
125185743Ssam}
126