sbus.c revision 145186
1/*- 2 * Copyright (c) 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36/*- 37 * Copyright (c) 1992, 1993 38 * The Regents of the University of California. All rights reserved. 39 * 40 * This software was developed by the Computer Systems Engineering group 41 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 42 * contributed to Berkeley. 43 * 44 * All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the University of 47 * California, Lawrence Berkeley Laboratory. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 4. Neither the name of the University nor the names of its contributors 58 * may be used to endorse or promote products derived from this software 59 * without specific prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 71 * SUCH DAMAGE. 72 */ 73/*- 74 * Copyright (c) 1999 Eduardo Horvath 75 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 76 * All rights reserved. 77 * 78 * Redistribution and use in source and binary forms, with or without 79 * modification, are permitted provided that the following conditions 80 * are met: 81 * 1. Redistributions of source code must retain the above copyright 82 * notice, this list of conditions and the following disclaimer. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 85 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 87 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 90 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93 97 * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp 98 */ 99 100#include <sys/cdefs.h> 101__FBSDID("$FreeBSD: head/sys/sparc64/sbus/sbus.c 145186 2005-04-17 11:32:34Z marius $"); 102 103/* 104 * SBus support. 105 */ 106 107#include <sys/param.h> 108#include <sys/systm.h> 109#include <sys/bus.h> 110#include <sys/kernel.h> 111#include <sys/malloc.h> 112#include <sys/module.h> 113#include <sys/pcpu.h> 114#include <sys/reboot.h> 115 116#include <dev/ofw/ofw_bus.h> 117#include <dev/ofw/openfirm.h> 118 119#include <machine/bus.h> 120#include <machine/bus_private.h> 121#include <machine/iommureg.h> 122#include <machine/bus_common.h> 123#include <machine/intr_machdep.h> 124#include <machine/nexusvar.h> 125#include <machine/ofw_upa.h> 126#include <machine/resource.h> 127 128#include <sys/rman.h> 129 130#include <machine/iommuvar.h> 131 132#include <sparc64/sbus/ofw_sbus.h> 133#include <sparc64/sbus/sbusreg.h> 134#include <sparc64/sbus/sbusvar.h> 135 136struct sbus_devinfo { 137 int sdi_burstsz; 138 int sdi_clockfreq; 139 char *sdi_compat; /* PROM compatible */ 140 char *sdi_model; /* PROM model */ 141 char *sdi_name; /* PROM name */ 142 phandle_t sdi_node; /* PROM node */ 143 int sdi_slot; 144 char *sdi_type; /* PROM device_type */ 145 146 struct resource_list sdi_rl; 147}; 148 149/* Range descriptor, allocated for each sc_range. */ 150struct sbus_rd { 151 bus_addr_t rd_poffset; 152 bus_addr_t rd_pend; 153 int rd_slot; 154 bus_addr_t rd_coffset; 155 bus_addr_t rd_cend; 156 struct rman rd_rman; 157 bus_space_handle_t rd_bushandle; 158 struct resource *rd_res; 159}; 160 161struct sbus_softc { 162 bus_space_tag_t sc_bustag; 163 bus_space_handle_t sc_bushandle; 164 bus_dma_tag_t sc_dmatag; 165 bus_dma_tag_t sc_cdmatag; 166 bus_space_tag_t sc_cbustag; 167 int sc_clockfreq; /* clock frequency (in Hz) */ 168 struct upa_regs *sc_reg; 169 int sc_nreg; 170 int sc_nrange; 171 struct sbus_rd *sc_rd; 172 int sc_burst; /* burst transfer sizes supp. */ 173 174 struct resource *sc_sysio_res; 175 int sc_ign; /* IGN for this sysio */ 176 struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */ 177 178 struct resource *sc_ot_ires; 179 void *sc_ot_ihand; 180 struct resource *sc_pf_ires; 181 void *sc_pf_ihand; 182}; 183 184struct sbus_clr { 185 struct sbus_softc *scl_sc; 186 bus_addr_t scl_clr; /* clear register */ 187 driver_intr_t *scl_handler; /* handler to call */ 188 void *scl_arg; /* argument for the handler */ 189 void *scl_cookie; /* parent bus int. cookie */ 190}; 191 192#define SYSIO_READ8(sc, off) \ 193 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 194#define SYSIO_WRITE8(sc, off, v) \ 195 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 196 197static device_probe_t sbus_probe; 198static device_attach_t sbus_attach; 199static bus_print_child_t sbus_print_child; 200static bus_probe_nomatch_t sbus_probe_nomatch; 201static bus_read_ivar_t sbus_read_ivar; 202static bus_get_resource_list_t sbus_get_resource_list; 203static bus_setup_intr_t sbus_setup_intr; 204static bus_teardown_intr_t sbus_teardown_intr; 205static bus_alloc_resource_t sbus_alloc_resource; 206static bus_release_resource_t sbus_release_resource; 207static bus_activate_resource_t sbus_activate_resource; 208static bus_deactivate_resource_t sbus_deactivate_resource; 209static ofw_bus_get_compat_t sbus_get_compat; 210static ofw_bus_get_model_t sbus_get_model; 211static ofw_bus_get_name_t sbus_get_name; 212static ofw_bus_get_node_t sbus_get_node; 213static ofw_bus_get_type_t sbus_get_type; 214 215static struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc, 216 phandle_t node, char *name); 217static void sbus_destroy_dinfo(struct sbus_devinfo *dinfo); 218static void sbus_intr_stub(void *); 219static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *); 220static void sbus_overtemp(void *); 221static void sbus_pwrfail(void *); 222 223static device_method_t sbus_methods[] = { 224 /* Device interface */ 225 DEVMETHOD(device_probe, sbus_probe), 226 DEVMETHOD(device_attach, sbus_attach), 227 228 /* Bus interface */ 229 DEVMETHOD(bus_print_child, sbus_print_child), 230 DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch), 231 DEVMETHOD(bus_read_ivar, sbus_read_ivar), 232 DEVMETHOD(bus_setup_intr, sbus_setup_intr), 233 DEVMETHOD(bus_teardown_intr, sbus_teardown_intr), 234 DEVMETHOD(bus_alloc_resource, sbus_alloc_resource), 235 DEVMETHOD(bus_activate_resource, sbus_activate_resource), 236 DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource), 237 DEVMETHOD(bus_release_resource, sbus_release_resource), 238 DEVMETHOD(bus_get_resource_list, sbus_get_resource_list), 239 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 240 241 /* ofw_bus interface */ 242 DEVMETHOD(ofw_bus_get_compat, sbus_get_compat), 243 DEVMETHOD(ofw_bus_get_model, sbus_get_model), 244 DEVMETHOD(ofw_bus_get_name, sbus_get_name), 245 DEVMETHOD(ofw_bus_get_node, sbus_get_node), 246 DEVMETHOD(ofw_bus_get_type, sbus_get_type), 247 248 { 0, 0 } 249}; 250 251static driver_t sbus_driver = { 252 "sbus", 253 sbus_methods, 254 sizeof(struct sbus_softc), 255}; 256 257static devclass_t sbus_devclass; 258 259DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0); 260 261#define OFW_SBUS_TYPE "sbus" 262#define OFW_SBUS_NAME "sbus" 263 264static int 265sbus_probe(device_t dev) 266{ 267 char *t; 268 269 t = nexus_get_device_type(dev); 270 if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) && 271 strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0) 272 return (ENXIO); 273 device_set_desc(dev, "U2S UPA-SBus bridge"); 274 return (0); 275} 276 277static int 278sbus_attach(device_t dev) 279{ 280 struct sbus_softc *sc; 281 struct sbus_devinfo *sdi; 282 struct sbus_ranges *range; 283 struct resource *res; 284 device_t cdev; 285 bus_addr_t phys; 286 bus_size_t size; 287 char *name, *cname; 288 phandle_t child, node; 289 u_int64_t mr; 290 int intr, clock, rid, vec, i; 291 292 sc = device_get_softc(dev); 293 node = nexus_get_node(dev); 294 295 if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg), 296 (void **)&sc->sc_reg)) == -1) { 297 panic("%s: error getting reg property", __func__); 298 } 299 if (sc->sc_nreg < 1) 300 panic("%s: bogus properties", __func__); 301 phys = UPA_REG_PHYS(&sc->sc_reg[0]); 302 size = UPA_REG_SIZE(&sc->sc_reg[0]); 303 rid = 0; 304 sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 305 phys + size - 1, size, RF_ACTIVE); 306 if (sc->sc_sysio_res == NULL || 307 rman_get_start(sc->sc_sysio_res) != phys) 308 panic("%s: cannot allocate device memory", __func__); 309 sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res); 310 sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res); 311 312 if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1) 313 panic("%s: cannot get IGN", __func__); 314 sc->sc_ign = intr & INTMAP_IGN_MASK; /* Find interrupt group no */ 315 sc->sc_cbustag = sbus_alloc_bustag(sc); 316 317 /* 318 * Record clock frequency for synchronous SCSI. 319 * IS THIS THE CORRECT DEFAULT?? 320 */ 321 if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1) 322 clock = 25000000; 323 sc->sc_clockfreq = clock; 324 clock /= 1000; 325 device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000); 326 327 /* 328 * Collect address translations from the OBP. 329 */ 330 if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges", 331 sizeof(*range), (void **)&range)) == -1) { 332 panic("%s: error getting ranges property", __func__); 333 } 334 sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, 335 M_DEVBUF, M_NOWAIT); 336 if (sc->sc_rd == NULL) 337 panic("%s: cannot allocate rmans", __func__); 338 /* 339 * Preallocate all space that the SBus bridge decodes, so that nothing 340 * else gets in the way; set up rmans etc. 341 */ 342 for (i = 0; i < sc->sc_nrange; i++) { 343 phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32); 344 size = range[i].size; 345 sc->sc_rd[i].rd_slot = range[i].cspace; 346 sc->sc_rd[i].rd_coffset = range[i].coffset; 347 sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size; 348 rid = 0; 349 if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 350 phys + size - 1, size, RF_ACTIVE)) == NULL) 351 panic("%s: cannot allocate decoded range", __func__); 352 sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res); 353 sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY; 354 sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory"; 355 if (rman_init(&sc->sc_rd[i].rd_rman) != 0 || 356 rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0) 357 panic("%s: failed to set up memory rman", __func__); 358 sc->sc_rd[i].rd_poffset = phys; 359 sc->sc_rd[i].rd_pend = phys + size; 360 sc->sc_rd[i].rd_res = res; 361 } 362 free(range, M_OFWPROP); 363 364 /* 365 * Get the SBus burst transfer size if burst transfers are supported. 366 * XXX: is the default correct? 367 */ 368 if (OF_getprop(node, "burst-sizes", &sc->sc_burst, 369 sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0) 370 sc->sc_burst = SBUS_BURST_DEF; 371 372 /* initalise the IOMMU */ 373 374 /* punch in our copies */ 375 sc->sc_is.is_bustag = sc->sc_bustag; 376 sc->sc_is.is_bushandle = sc->sc_bushandle; 377 sc->sc_is.is_iommu = SBR_IOMMU; 378 sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG; 379 sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG; 380 sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG; 381 sc->sc_is.is_dva = SBR_IOMMU_SVADIAG; 382 sc->sc_is.is_dtcmp = 0; 383 sc->sc_is.is_sb[0] = SBR_STRBUF; 384 sc->sc_is.is_sb[1] = 0; 385 386 /* give us a nice name.. */ 387 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 388 if (name == NULL) 389 panic("%s: cannot malloc iommu name", __func__); 390 snprintf(name, 32, "%s dvma", device_get_name(dev)); 391 392 /* 393 * Note: the SBus IOMMU ignores the high bits of an address, so a NULL 394 * DMA pointer will be translated by the first page of the IOTSB. 395 * To detect bugs we'll allocate and ignore the first entry. 396 */ 397 iommu_init(name, &sc->sc_is, 3, -1, 1); 398 399 /* Create the DMA tag. */ 400 sc->sc_dmatag = nexus_get_dmatag(dev); 401 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 402 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0) 403 panic("%s: bus_dma_tag_create failed", __func__); 404 /* Customize the tag. */ 405 sc->sc_cdmatag->dt_cookie = &sc->sc_is; 406 sc->sc_cdmatag->dt_mt = &iommu_dma_methods; 407 /* XXX: register as root dma tag (kludge). */ 408 sparc64_root_dma_tag = sc->sc_cdmatag; 409 410 /* Enable the over-temperature and power-fail interrupts. */ 411 rid = 0; 412 mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP); 413 vec = INTVEC(mr); 414 if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 415 vec, 1, RF_ACTIVE)) == NULL) 416 panic("%s: failed to get temperature interrupt", __func__); 417 bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST, 418 sbus_overtemp, sc, &sc->sc_ot_ihand); 419 SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid))); 420 rid = 0; 421 mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP); 422 vec = INTVEC(mr); 423 if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 424 vec, 1, RF_ACTIVE)) == NULL) 425 panic("%s: failed to get power fail interrupt", __func__); 426 bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST, 427 sbus_pwrfail, sc, &sc->sc_pf_ihand); 428 SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid))); 429 430 /* Initialize the counter-timer. */ 431 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0); 432 433 /* 434 * Loop through ROM children, fixing any relative addresses 435 * and then configuring each device. 436 * `specials' is an array of device names that are treated 437 * specially: 438 */ 439 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 440 if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1) 441 continue; 442 443 if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) { 444 device_printf(dev, "<%s>: incomplete\n", cname); 445 free(cname, M_OFWPROP); 446 continue; 447 } 448 if ((cdev = device_add_child(dev, NULL, -1)) == NULL) 449 panic("%s: device_add_child failed", __func__); 450 device_set_ivars(cdev, sdi); 451 } 452 return (bus_generic_attach(dev)); 453} 454 455static struct sbus_devinfo * 456sbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name) 457{ 458 struct sbus_devinfo *sdi; 459 struct sbus_regs *reg; 460 u_int32_t base, iv, *intr; 461 int i, nreg, nintr, slot, rslot; 462 463 sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK); 464 if (sdi == NULL) 465 return (NULL); 466 resource_list_init(&sdi->sdi_rl); 467 sdi->sdi_name = name; 468 sdi->sdi_node = node; 469 OF_getprop_alloc(node, "compatible", 1, (void **)&sdi->sdi_compat); 470 OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type); 471 OF_getprop_alloc(node, "model", 1, (void **)&sdi->sdi_model); 472 slot = -1; 473 nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®); 474 if (nreg == -1) { 475 if (sdi->sdi_type == NULL || 476 strcmp(sdi->sdi_type, "hierarchical") != 0) { 477 sbus_destroy_dinfo(sdi); 478 return (NULL); 479 } 480 } else { 481 for (i = 0; i < nreg; i++) { 482 base = reg[i].sbr_offset; 483 if (SBUS_ABS(base)) { 484 rslot = SBUS_ABS_TO_SLOT(base); 485 base = SBUS_ABS_TO_OFFSET(base); 486 } else 487 rslot = reg[i].sbr_slot; 488 if (slot != -1 && slot != rslot) 489 panic("%s: multiple slots", __func__); 490 slot = rslot; 491 492 resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i, 493 base, base + reg[i].sbr_size, reg[i].sbr_size); 494 } 495 free(reg, M_OFWPROP); 496 } 497 sdi->sdi_slot = slot; 498 499 /* 500 * The `interrupts' property contains the SBus interrupt level. 501 */ 502 nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), 503 (void **)&intr); 504 if (nintr != -1) { 505 for (i = 0; i < nintr; i++) { 506 iv = intr[i]; 507 /* 508 * SBus card devices need the slot number encoded into 509 * the vector as this is generally not done. 510 */ 511 if ((iv & INTMAP_OBIO_MASK) == 0) 512 iv |= slot << 3; 513 /* Set the ign as appropriate. */ 514 iv |= sc->sc_ign; 515 resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i, 516 iv, iv, 1); 517 } 518 free(intr, M_OFWPROP); 519 } 520 if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz, 521 sizeof(sdi->sdi_burstsz)) == -1) 522 sdi->sdi_burstsz = sc->sc_burst; 523 else 524 sdi->sdi_burstsz &= sc->sc_burst; 525 if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq, 526 sizeof(sdi->sdi_clockfreq)) == -1) 527 sdi->sdi_clockfreq = sc->sc_clockfreq; 528 529 return (sdi); 530} 531 532/* Free everything except sdi_name, which is handled separately. */ 533static void 534sbus_destroy_dinfo(struct sbus_devinfo *dinfo) 535{ 536 537 resource_list_free(&dinfo->sdi_rl); 538 if (dinfo->sdi_compat != NULL) 539 free(dinfo->sdi_compat, M_OFWPROP); 540 if (dinfo->sdi_model != NULL) 541 free(dinfo->sdi_model, M_OFWPROP); 542 if (dinfo->sdi_type != NULL) 543 free(dinfo->sdi_type, M_OFWPROP); 544 free(dinfo, M_DEVBUF); 545} 546 547static int 548sbus_print_child(device_t dev, device_t child) 549{ 550 struct sbus_devinfo *dinfo; 551 struct resource_list *rl; 552 int rv; 553 554 dinfo = device_get_ivars(child); 555 rl = &dinfo->sdi_rl; 556 rv = bus_print_child_header(dev, child); 557 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 558 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 559 rv += bus_print_child_footer(dev, child); 560 return (rv); 561} 562 563static void 564sbus_probe_nomatch(device_t dev, device_t child) 565{ 566 struct sbus_devinfo *dinfo; 567 struct resource_list *rl; 568 569 dinfo = device_get_ivars(child); 570 rl = &dinfo->sdi_rl; 571 device_printf(dev, "<%s>", dinfo->sdi_name); 572 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 573 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 574 printf(" type %s (no driver attached)\n", 575 dinfo->sdi_type != NULL ? dinfo->sdi_type : "unknown"); 576} 577 578static int 579sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 580{ 581 struct sbus_devinfo *dinfo; 582 583 if ((dinfo = device_get_ivars(child)) == NULL) 584 return (ENOENT); 585 switch (which) { 586 case SBUS_IVAR_BURSTSZ: 587 *result = dinfo->sdi_burstsz; 588 break; 589 case SBUS_IVAR_CLOCKFREQ: 590 *result = dinfo->sdi_clockfreq; 591 break; 592 case SBUS_IVAR_SLOT: 593 *result = dinfo->sdi_slot; 594 break; 595 default: 596 return (ENOENT); 597 } 598 return 0; 599} 600 601static struct resource_list * 602sbus_get_resource_list(device_t dev, device_t child) 603{ 604 struct sbus_devinfo *sdi; 605 606 sdi = device_get_ivars(child); 607 return (&sdi->sdi_rl); 608} 609 610/* Write to the correct clr register, and call the actual handler. */ 611static void 612sbus_intr_stub(void *arg) 613{ 614 struct sbus_clr *scl; 615 616 scl = (struct sbus_clr *)arg; 617 scl->scl_handler(scl->scl_arg); 618 SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0); 619} 620 621static int 622sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags, 623 driver_intr_t *intr, void *arg, void **cookiep) 624{ 625 struct sbus_softc *sc; 626 struct sbus_clr *scl; 627 bus_addr_t intrmapptr, intrclrptr, intrptr; 628 u_int64_t intrmap; 629 u_int32_t inr, slot; 630 int error, i; 631 long vec = rman_get_start(ires); 632 633 sc = device_get_softc(dev); 634 scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT); 635 if (scl == NULL) 636 return (0); 637 intrptr = intrmapptr = intrclrptr = 0; 638 intrmap = 0; 639 inr = INTVEC(vec); 640 if ((inr & INTMAP_OBIO_MASK) == 0) { 641 /* 642 * We're in an SBus slot, register the map and clear 643 * intr registers. 644 */ 645 slot = INTSLOT(vec); 646 intrmapptr = SBR_SLOT0_INT_MAP + slot * 8; 647 intrclrptr = SBR_SLOT0_INT_CLR + 648 (slot * 8 * 8) + (INTPRI(vec) * 8); 649 /* Enable the interrupt, insert IGN. */ 650 intrmap = inr | sc->sc_ign; 651 } else { 652 intrptr = SBR_SCSI_INT_MAP; 653 /* Insert IGN */ 654 inr |= sc->sc_ign; 655 for (i = 0; intrptr <= SBR_RESERVED_INT_MAP && 656 INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) != 657 INTVEC(inr); intrptr += 8, i++) 658 ; 659 if (INTVEC(intrmap) == INTVEC(inr)) { 660 /* Register the map and clear intr registers */ 661 intrmapptr = intrptr; 662 intrclrptr = SBR_SCSI_INT_CLR + i * 8; 663 /* Enable the interrupt */ 664 } else 665 panic("%s: IRQ not found!", __func__); 666 } 667 668 scl->scl_sc = sc; 669 scl->scl_arg = arg; 670 scl->scl_handler = intr; 671 scl->scl_clr = intrclrptr; 672 /* Disable the interrupt while we fiddle with it */ 673 SYSIO_WRITE8(sc, intrmapptr, intrmap); 674 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 675 sbus_intr_stub, scl, cookiep); 676 if (error != 0) { 677 free(scl, M_DEVBUF); 678 return (error); 679 } 680 scl->scl_cookie = *cookiep; 681 *cookiep = scl; 682 683 /* 684 * Clear the interrupt, it might have been triggered before it was 685 * set up. 686 */ 687 SYSIO_WRITE8(sc, intrclrptr, 0); 688 /* 689 * Enable the interrupt and program the target module now we have the 690 * handler installed. 691 */ 692 SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid))); 693 return (error); 694} 695 696static int 697sbus_teardown_intr(device_t dev, device_t child, 698 struct resource *vec, void *cookie) 699{ 700 struct sbus_clr *scl; 701 int error; 702 703 scl = (struct sbus_clr *)cookie; 704 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 705 scl->scl_cookie); 706 /* 707 * Don't disable the interrupt for now, so that stray interrupts get 708 * detected... 709 */ 710 if (error != 0) 711 free(scl, M_DEVBUF); 712 return (error); 713} 714 715static struct resource * 716sbus_alloc_resource(device_t bus, device_t child, int type, int *rid, 717 u_long start, u_long end, u_long count, u_int flags) 718{ 719 struct sbus_softc *sc; 720 struct rman *rm; 721 struct resource *rv; 722 struct resource_list *rl; 723 struct resource_list_entry *rle; 724 device_t schild; 725 bus_space_handle_t bh; 726 bus_addr_t toffs; 727 bus_size_t tend; 728 int i, slot; 729 int isdefault, needactivate, passthrough; 730 731 isdefault = (start == 0UL && end == ~0UL); 732 needactivate = flags & RF_ACTIVE; 733 passthrough = (device_get_parent(child) != bus); 734 rle = NULL; 735 sc = device_get_softc(bus); 736 rl = BUS_GET_RESOURCE_LIST(bus, child); 737 switch (type) { 738 case SYS_RES_IRQ: 739 return (resource_list_alloc(rl, bus, child, type, rid, start, 740 end, count, flags)); 741 case SYS_RES_MEMORY: 742 if (!passthrough) { 743 rle = resource_list_find(rl, type, *rid); 744 if (rle == NULL) 745 return (NULL); 746 if (rle->res != NULL) 747 panic("%s: resource entry is busy", __func__); 748 if (isdefault) { 749 start = rle->start; 750 count = ulmax(count, rle->count); 751 end = ulmax(rle->end, start + count - 1); 752 } 753 } 754 rm = NULL; 755 bh = toffs = tend = 0; 756 schild = child; 757 while (device_get_parent(schild) != bus) 758 schild = device_get_parent(child); 759 slot = sbus_get_slot(schild); 760 for (i = 0; i < sc->sc_nrange; i++) { 761 if (sc->sc_rd[i].rd_slot != slot || 762 start < sc->sc_rd[i].rd_coffset || 763 start > sc->sc_rd[i].rd_cend) 764 continue; 765 /* Disallow cross-range allocations. */ 766 if (end > sc->sc_rd[i].rd_cend) 767 return (NULL); 768 /* We've found the connection to the parent bus */ 769 toffs = start - sc->sc_rd[i].rd_coffset; 770 tend = end - sc->sc_rd[i].rd_coffset; 771 rm = &sc->sc_rd[i].rd_rman; 772 bh = sc->sc_rd[i].rd_bushandle; 773 } 774 if (toffs == 0L) 775 return (NULL); 776 flags &= ~RF_ACTIVE; 777 rv = rman_reserve_resource(rm, toffs, tend, count, flags, 778 child); 779 if (rv == NULL) 780 return (NULL); 781 rman_set_bustag(rv, sc->sc_cbustag); 782 rman_set_bushandle(rv, bh + rman_get_start(rv)); 783 if (needactivate) { 784 if (bus_activate_resource(child, type, *rid, rv)) { 785 rman_release_resource(rv); 786 return (NULL); 787 } 788 } 789 if (!passthrough) 790 rle->res = rv; 791 return (rv); 792 default: 793 return (NULL); 794 } 795} 796 797static int 798sbus_activate_resource(device_t bus, device_t child, int type, int rid, 799 struct resource *r) 800{ 801 802 if (type == SYS_RES_IRQ) { 803 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), 804 child, type, rid, r)); 805 } 806 return (rman_activate_resource(r)); 807} 808 809static int 810sbus_deactivate_resource(device_t bus, device_t child, int type, int rid, 811 struct resource *r) 812{ 813 814 if (type == SYS_RES_IRQ) { 815 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), 816 child, type, rid, r)); 817 } 818 return (rman_deactivate_resource(r)); 819} 820 821static int 822sbus_release_resource(device_t bus, device_t child, int type, int rid, 823 struct resource *r) 824{ 825 struct resource_list *rl; 826 struct resource_list_entry *rle; 827 int error, passthrough; 828 829 passthrough = (device_get_parent(child) != bus); 830 rl = BUS_GET_RESOURCE_LIST(bus, child); 831 if (type == SYS_RES_IRQ) 832 return (resource_list_release(rl, bus, child, type, rid, r)); 833 if ((rman_get_flags(r) & RF_ACTIVE) != 0) { 834 error = bus_deactivate_resource(child, type, rid, r); 835 if (error != 0) 836 return (error); 837 } 838 error = rman_release_resource(r); 839 if (error != 0 || passthrough) 840 return (error); 841 rle = resource_list_find(rl, type, rid); 842 if (rle == NULL) 843 panic("%s: cannot find resource", __func__); 844 if (rle->res == NULL) 845 panic("%s: resource entry is not busy", __func__); 846 rle->res = NULL; 847 return (0); 848} 849 850/* 851 * Handle an overtemp situation. 852 * 853 * SPARCs have temperature sensors which generate interrupts 854 * if the machine's temperature exceeds a certain threshold. 855 * This handles the interrupt and powers off the machine. 856 * The same needs to be done to PCI controller drivers. 857 */ 858static void 859sbus_overtemp(void *arg) 860{ 861 862 printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n"); 863 shutdown_nice(RB_POWEROFF); 864} 865 866/* Try to shut down in time in case of power failure. */ 867static void 868sbus_pwrfail(void *arg) 869{ 870 871 printf("Power failure detected\nShutting down NOW.\n"); 872 shutdown_nice(0); 873} 874 875static bus_space_tag_t 876sbus_alloc_bustag(struct sbus_softc *sc) 877{ 878 bus_space_tag_t sbt; 879 880 sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 881 M_NOWAIT | M_ZERO); 882 if (sbt == NULL) 883 panic("%s: out of memory", __func__); 884 885 sbt->bst_cookie = sc; 886 sbt->bst_parent = sc->sc_bustag; 887 sbt->bst_type = SBUS_BUS_SPACE; 888 return (sbt); 889} 890 891static const char * 892sbus_get_compat(device_t bus, device_t dev) 893{ 894 struct sbus_devinfo *dinfo; 895 896 dinfo = device_get_ivars(dev); 897 return (dinfo->sdi_compat); 898} 899 900static const char * 901sbus_get_model(device_t bus, device_t dev) 902{ 903 struct sbus_devinfo *dinfo; 904 905 dinfo = device_get_ivars(dev); 906 return (dinfo->sdi_model); 907} 908 909static const char * 910sbus_get_name(device_t bus, device_t dev) 911{ 912 struct sbus_devinfo *dinfo; 913 914 dinfo = device_get_ivars(dev); 915 return (dinfo->sdi_name); 916} 917 918static phandle_t 919sbus_get_node(device_t bus, device_t dev) 920{ 921 struct sbus_devinfo *dinfo; 922 923 dinfo = device_get_ivars(dev); 924 return (dinfo->sdi_node); 925} 926 927static const char * 928sbus_get_type(device_t bus, device_t dev) 929{ 930 struct sbus_devinfo *dinfo; 931 932 dinfo = device_get_ivars(dev); 933 return (dinfo->sdi_type); 934} 935