sbus.c revision 108798
190618Stmm/*- 290618Stmm * Copyright (c) 1998 The NetBSD Foundation, Inc. 390618Stmm * All rights reserved. 490618Stmm * 590618Stmm * This code is derived from software contributed to The NetBSD Foundation 690618Stmm * by Paul Kranenburg. 790618Stmm * 890618Stmm * Redistribution and use in source and binary forms, with or without 990618Stmm * modification, are permitted provided that the following conditions 1090618Stmm * are met: 1190618Stmm * 1. Redistributions of source code must retain the above copyright 1290618Stmm * notice, this list of conditions and the following disclaimer. 1390618Stmm * 2. Redistributions in binary form must reproduce the above copyright 1490618Stmm * notice, this list of conditions and the following disclaimer in the 1590618Stmm * documentation and/or other materials provided with the distribution. 1690618Stmm * 3. All advertising materials mentioning features or use of this software 1790618Stmm * must display the following acknowledgement: 1890618Stmm * This product includes software developed by the NetBSD 1990618Stmm * Foundation, Inc. and its contributors. 2090618Stmm * 4. Neither the name of The NetBSD Foundation nor the names of its 2190618Stmm * contributors may be used to endorse or promote products derived 2290618Stmm * from this software without specific prior written permission. 2390618Stmm * 2490618Stmm * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2590618Stmm * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2690618Stmm * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2790618Stmm * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2890618Stmm * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2990618Stmm * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3090618Stmm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3190618Stmm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3290618Stmm * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3390618Stmm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3490618Stmm * POSSIBILITY OF SUCH DAMAGE. 3590618Stmm */ 3690618Stmm/* 3790618Stmm * Copyright (c) 1992, 1993 3890618Stmm * The Regents of the University of California. All rights reserved. 3990618Stmm * 4090618Stmm * This software was developed by the Computer Systems Engineering group 4190618Stmm * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 4290618Stmm * contributed to Berkeley. 4390618Stmm * 4490618Stmm * All advertising materials mentioning features or use of this software 4590618Stmm * must display the following acknowledgement: 4690618Stmm * This product includes software developed by the University of 4790618Stmm * California, Lawrence Berkeley Laboratory. 4890618Stmm * 4990618Stmm * Redistribution and use in source and binary forms, with or without 5090618Stmm * modification, are permitted provided that the following conditions 5190618Stmm * are met: 5290618Stmm * 1. Redistributions of source code must retain the above copyright 5390618Stmm * notice, this list of conditions and the following disclaimer. 5490618Stmm * 2. Redistributions in binary form must reproduce the above copyright 5590618Stmm * notice, this list of conditions and the following disclaimer in the 5690618Stmm * documentation and/or other materials provided with the distribution. 5790618Stmm * 3. All advertising materials mentioning features or use of this software 5890618Stmm * must display the following acknowledgement: 5990618Stmm * This product includes software developed by the University of 6090618Stmm * California, Berkeley and its contributors. 6190618Stmm * 4. Neither the name of the University nor the names of its contributors 6290618Stmm * may be used to endorse or promote products derived from this software 6390618Stmm * without specific prior written permission. 6490618Stmm * 6590618Stmm * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 6690618Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6790618Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 6890618Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 6990618Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 7090618Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 7190618Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 7290618Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 7390618Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 7490618Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 7590618Stmm * SUCH DAMAGE. 7690618Stmm */ 7790618Stmm/* 7890618Stmm * Copyright (c) 1999 Eduardo Horvath 7990618Stmm * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 8090618Stmm * All rights reserved. 8190618Stmm * 8290618Stmm * Redistribution and use in source and binary forms, with or without 8390618Stmm * modification, are permitted provided that the following conditions 8490618Stmm * are met: 8590618Stmm * 1. Redistributions of source code must retain the above copyright 8690618Stmm * notice, this list of conditions and the following disclaimer. 8790618Stmm * 8890618Stmm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 8990618Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 9090618Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 9190618Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 9290618Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 9390618Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 9490618Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 9590618Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 9690618Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 9790618Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 9890618Stmm * SUCH DAMAGE. 9990618Stmm * 10090618Stmm * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93 10190618Stmm * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp 10290618Stmm * 10390618Stmm * $FreeBSD: head/sys/sparc64/sbus/sbus.c 108798 2003-01-06 16:36:05Z tmm $ 10490618Stmm */ 10590618Stmm 10690618Stmm/* 10790618Stmm * Sbus support. 10890618Stmm */ 10990618Stmm#include <sys/param.h> 11090618Stmm#include <sys/systm.h> 11190618Stmm#include <sys/bus.h> 11290618Stmm#include <sys/kernel.h> 11390618Stmm#include <sys/malloc.h> 114107477Stmm#include <sys/pcpu.h> 11590618Stmm#include <sys/reboot.h> 11690618Stmm 11790618Stmm#include <ofw/openfirm.h> 11890618Stmm 11990618Stmm#include <machine/bus.h> 12090618Stmm#include <machine/iommureg.h> 12190618Stmm#include <machine/bus_common.h> 12290618Stmm#include <machine/frame.h> 12390618Stmm#include <machine/intr_machdep.h> 12490618Stmm#include <machine/nexusvar.h> 12590618Stmm#include <machine/ofw_upa.h> 12690618Stmm#include <machine/resource.h> 12790618Stmm 12890618Stmm#include <sys/rman.h> 12990618Stmm 13090618Stmm#include <machine/iommuvar.h> 13190618Stmm 13290618Stmm#include <sparc64/sbus/ofw_sbus.h> 13390618Stmm#include <sparc64/sbus/sbusreg.h> 13490618Stmm#include <sparc64/sbus/sbusvar.h> 13590618Stmm 13690618Stmm 13790618Stmm#ifdef DEBUG 13890618Stmm#define SDB_DVMA 0x1 13990618Stmm#define SDB_INTR 0x2 14090618Stmmint sbus_debug = 0; 14190618Stmm#define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0) 14290618Stmm#else 14390618Stmm#define DPRINTF(l, s) 14490618Stmm#endif 14590618Stmm 14690618Stmmstruct sbus_devinfo { 14790618Stmm int sdi_burstsz; 14890618Stmm char *sdi_compat; 14990618Stmm char *sdi_name; /* PROM name */ 15090618Stmm phandle_t sdi_node; /* PROM node */ 15190618Stmm int sdi_slot; 15290618Stmm char *sdi_type; /* PROM name */ 15390618Stmm 15490618Stmm struct resource_list sdi_rl; 15590618Stmm}; 15690618Stmm 15790618Stmm/* Range descriptor, allocated for each sc_range. */ 15890618Stmmstruct sbus_rd { 15990618Stmm bus_addr_t rd_poffset; 16090618Stmm bus_addr_t rd_pend; 16190618Stmm int rd_slot; 16290618Stmm bus_addr_t rd_coffset; 16390618Stmm bus_addr_t rd_cend; 16490618Stmm struct rman rd_rman; 16590618Stmm bus_space_handle_t rd_bushandle; 16690618Stmm struct resource *rd_res; 16790618Stmm}; 16890618Stmm 16990618Stmmstruct sbus_softc { 17090618Stmm bus_space_tag_t sc_bustag; 17190618Stmm bus_space_handle_t sc_bushandle; 17290618Stmm bus_dma_tag_t sc_dmatag; 17390618Stmm bus_dma_tag_t sc_cdmatag; 17490618Stmm bus_space_tag_t sc_cbustag; 17590618Stmm int sc_clockfreq; /* clock frequency (in Hz) */ 17690618Stmm struct upa_regs *sc_reg; 17790618Stmm int sc_nreg; 17890618Stmm int sc_nrange; 17990618Stmm struct sbus_rd *sc_rd; 18090618Stmm int sc_burst; /* burst transfer sizes supported */ 18190618Stmm int *sc_intr_compat;/* `intr' property to sbus compat */ 18290618Stmm 18390618Stmm struct resource *sc_sysio_res; 18490618Stmm int sc_ign; /* Interrupt group number for this sysio */ 18590618Stmm struct iommu_state sc_is; /* IOMMU state, see iommureg.h */ 18690618Stmm 18790618Stmm struct resource *sc_ot_ires; 18890618Stmm void *sc_ot_ihand; 18990618Stmm struct resource *sc_pf_ires; 19090618Stmm void *sc_pf_ihand; 19190618Stmm}; 19290618Stmm 19390618Stmmstruct sbus_clr { 19490618Stmm struct sbus_softc *scl_sc; 19590618Stmm bus_addr_t scl_clr; /* clear register */ 19690618Stmm driver_intr_t *scl_handler; /* handler to call */ 19790618Stmm void *scl_arg; /* argument for the handler */ 19890618Stmm void *scl_cookie; /* interrupt cookie of parent bus */ 19990618Stmm}; 20090618Stmm 20190618Stmm#define SYSIO_READ8(sc, off) \ 20290618Stmm bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 20390618Stmm#define SYSIO_WRITE8(sc, off, v) \ 20490618Stmm bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 20590618Stmm 20690618Stmmstatic int sbus_probe(device_t dev); 20790618Stmmstatic int sbus_print_child(device_t dev, device_t child); 20890618Stmmstatic void sbus_probe_nomatch(device_t dev, device_t child); 20990618Stmmstatic int sbus_read_ivar(device_t, device_t, int, u_long *); 21090618Stmmstatic struct resource_list *sbus_get_resource_list(device_t dev, 21190618Stmm device_t child); 21290618Stmmstatic int sbus_setup_intr(device_t, device_t, struct resource *, int, 21390618Stmm driver_intr_t *, void *, void **); 21490618Stmmstatic int sbus_teardown_intr(device_t, device_t, struct resource *, void *); 21590618Stmmstatic struct resource *sbus_alloc_resource(device_t, device_t, int, int *, 21690618Stmm u_long, u_long, u_long, u_int); 21790618Stmmstatic int sbus_activate_resource(device_t, device_t, int, int, 21890618Stmm struct resource *); 21990618Stmmstatic int sbus_deactivate_resource(device_t, device_t, int, int, 22090618Stmm struct resource *); 22190618Stmmstatic int sbus_release_resource(device_t, device_t, int, int, 22290618Stmm struct resource *); 22390618Stmm 22490618Stmmstatic struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc, 22590618Stmm phandle_t node, char *name); 22690618Stmmstatic void sbus_destroy_dinfo(struct sbus_devinfo *dinfo); 22790618Stmmstatic void sbus_intr_stub(void *); 22890618Stmmstatic bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *); 22990618Stmmstatic void sbus_overtemp(void *); 23090618Stmmstatic void sbus_pwrfail(void *); 23190618Stmm 23290618Stmm/* 23390618Stmm * DVMA routines 23490618Stmm */ 23593070Stmmstatic int sbus_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int, 23693070Stmm bus_dmamap_t *); 23793070Stmmstatic int sbus_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 23893070Stmmstatic int sbus_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, void *, 23993070Stmm bus_size_t, bus_dmamap_callback_t *, void *, int); 24093070Stmmstatic void sbus_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 24193070Stmmstatic void sbus_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 24293070Stmm bus_dmasync_op_t); 24393070Stmmstatic int sbus_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int, 24493070Stmm bus_dmamap_t *); 24593070Stmmstatic void sbus_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *, 24693070Stmm bus_dmamap_t); 24790618Stmm 24890618Stmmstatic device_method_t sbus_methods[] = { 24990618Stmm /* Device interface */ 25090618Stmm DEVMETHOD(device_probe, sbus_probe), 25190618Stmm DEVMETHOD(device_attach, bus_generic_attach), 25290618Stmm 25390618Stmm /* Bus interface */ 25490618Stmm DEVMETHOD(bus_print_child, sbus_print_child), 25590618Stmm DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch), 25690618Stmm DEVMETHOD(bus_read_ivar, sbus_read_ivar), 25790618Stmm DEVMETHOD(bus_setup_intr, sbus_setup_intr), 25890618Stmm DEVMETHOD(bus_teardown_intr, sbus_teardown_intr), 25990618Stmm DEVMETHOD(bus_alloc_resource, sbus_alloc_resource), 26090618Stmm DEVMETHOD(bus_activate_resource, sbus_activate_resource), 26190618Stmm DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource), 26290618Stmm DEVMETHOD(bus_release_resource, sbus_release_resource), 26390618Stmm DEVMETHOD(bus_get_resource_list, sbus_get_resource_list), 26490618Stmm DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 26590618Stmm 26690618Stmm { 0, 0 } 26790618Stmm}; 26890618Stmm 26990618Stmmstatic driver_t sbus_driver = { 27090618Stmm "sbus", 27190618Stmm sbus_methods, 27290618Stmm sizeof(struct sbus_softc), 27390618Stmm}; 27490618Stmm 27590618Stmmstatic devclass_t sbus_devclass; 27690618Stmm 27790618StmmDRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0); 27890618Stmm 27990618Stmm#define OFW_SBUS_TYPE "sbus" 28090618Stmm#define OFW_SBUS_NAME "sbus" 28190618Stmm 28290618Stmmstatic int 28390618Stmmsbus_probe(device_t dev) 28490618Stmm{ 28590618Stmm struct sbus_softc *sc = device_get_softc(dev); 28690618Stmm struct sbus_devinfo *sdi; 28790618Stmm struct sbus_ranges *range; 28890618Stmm struct resource *res; 28990618Stmm device_t cdev; 29090618Stmm bus_addr_t phys; 29190618Stmm bus_size_t size; 29290618Stmm char *name, *cname, *t; 29390618Stmm phandle_t child, node = nexus_get_node(dev); 29490618Stmm u_int64_t mr; 29590618Stmm int intr, clock, rid, vec, i; 29690618Stmm 29790618Stmm t = nexus_get_device_type(dev); 29890618Stmm if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) && 29990618Stmm strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0) 30090618Stmm return (ENXIO); 30190618Stmm device_set_desc(dev, "U2S UPA-SBus bridge"); 30290618Stmm 30390618Stmm if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg), 30490618Stmm (void **)&sc->sc_reg)) == -1) { 30590618Stmm panic("sbus_probe: error getting reg property"); 30690618Stmm } 30790618Stmm if (sc->sc_nreg < 1) 30890618Stmm panic("sbus_probe: bogus properties"); 30990618Stmm phys = UPA_REG_PHYS(&sc->sc_reg[0]); 31090618Stmm size = UPA_REG_SIZE(&sc->sc_reg[0]); 31190618Stmm rid = 0; 31290618Stmm sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 31390618Stmm phys + size - 1, size, RF_ACTIVE); 31490618Stmm if (sc->sc_sysio_res == NULL || 31590618Stmm rman_get_start(sc->sc_sysio_res) != phys) 31690618Stmm panic("sbus_probe: can't allocate device memory"); 31790618Stmm sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res); 31890618Stmm sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res); 31990618Stmm 32090618Stmm if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1) 32190618Stmm panic("sbus_probe: cannot get IGN"); 322107477Stmm sc->sc_ign = intr & INTMAP_IGN_MASK; /* Find interrupt group no */ 32390618Stmm sc->sc_cbustag = sbus_alloc_bustag(sc); 32490618Stmm 32590618Stmm /* 32690618Stmm * Record clock frequency for synchronous SCSI. 32790618Stmm * IS THIS THE CORRECT DEFAULT?? 32890618Stmm */ 32990618Stmm if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1) 33090618Stmm clock = 25000000; 33190618Stmm sc->sc_clockfreq = clock; 33290618Stmm clock /= 1000; 33390618Stmm device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000); 33490618Stmm 33590618Stmm sc->sc_dmatag = nexus_get_dmatag(dev); 33690618Stmm if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 33790618Stmm 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_cdmatag) != 0) 33890618Stmm panic("bus_dma_tag_create failed"); 33990618Stmm /* Customize the tag */ 34090618Stmm sc->sc_cdmatag->cookie = sc; 34190618Stmm sc->sc_cdmatag->dmamap_create = sbus_dmamap_create; 34290618Stmm sc->sc_cdmatag->dmamap_destroy = sbus_dmamap_destroy; 34390618Stmm sc->sc_cdmatag->dmamap_load = sbus_dmamap_load; 34490618Stmm sc->sc_cdmatag->dmamap_unload = sbus_dmamap_unload; 34590618Stmm sc->sc_cdmatag->dmamap_sync = sbus_dmamap_sync; 34690618Stmm sc->sc_cdmatag->dmamem_alloc = sbus_dmamem_alloc; 34790618Stmm sc->sc_cdmatag->dmamem_free = sbus_dmamem_free; 34890618Stmm /* XXX: register as root dma tag (kluge). */ 34990618Stmm sparc64_root_dma_tag = sc->sc_cdmatag; 35090618Stmm 35190618Stmm /* 35290618Stmm * Collect address translations from the OBP. 35390618Stmm */ 35490618Stmm if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges", 35590618Stmm sizeof(*range), (void **)&range)) == -1) { 35690618Stmm panic("%s: error getting ranges property", 35790618Stmm device_get_name(dev)); 35890618Stmm } 35990618Stmm sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, 36090618Stmm M_DEVBUF, M_NOWAIT); 36190618Stmm if (sc->sc_rd == NULL) 36290618Stmm panic("sbus_probe: could not allocate rmans"); 36390618Stmm /* 36490618Stmm * Preallocate all space that the SBus bridge decodes, so that nothing 36590618Stmm * else gets in the way; set up rmans etc. 36690618Stmm */ 36790618Stmm for (i = 0; i < sc->sc_nrange; i++) { 36890618Stmm phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32); 36990618Stmm size = range[i].size; 37090618Stmm sc->sc_rd[i].rd_slot = range[i].cspace; 37190618Stmm sc->sc_rd[i].rd_coffset = range[i].coffset; 37290618Stmm sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size; 37390618Stmm rid = 0; 37490618Stmm if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 37590618Stmm phys + size - 1, size, RF_ACTIVE)) == NULL) 37690618Stmm panic("sbus_probe: could not allocate decoded range"); 37790618Stmm sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res); 37890618Stmm sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY; 37990618Stmm sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory"; 38090618Stmm if (rman_init(&sc->sc_rd[i].rd_rman) != 0 || 38190618Stmm rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0) 382108798Stmm panic("sbus_probe: failed to set up memory rman"); 38390618Stmm sc->sc_rd[i].rd_poffset = phys; 38490618Stmm sc->sc_rd[i].rd_pend = phys + size; 38590618Stmm sc->sc_rd[i].rd_res = res; 38690618Stmm } 38790618Stmm free(range, M_OFWPROP); 38890618Stmm 38990618Stmm /* 39090618Stmm * Get the SBus burst transfer size if burst transfers are supported. 39190618Stmm * XXX: is the default correct? 39290618Stmm */ 39390618Stmm if (OF_getprop(node, "burst-sizes", &sc->sc_burst, 39490618Stmm sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0) 39590618Stmm sc->sc_burst = SBUS_BURST_DEF; 39690618Stmm 39790618Stmm /* initalise the IOMMU */ 39890618Stmm 39990618Stmm /* punch in our copies */ 40090618Stmm sc->sc_is.is_bustag = sc->sc_bustag; 40190618Stmm sc->sc_is.is_bushandle = sc->sc_bushandle; 40290618Stmm sc->sc_is.is_iommu = SBR_IOMMU; 40390618Stmm sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG; 40490618Stmm sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG; 40590618Stmm sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG; 40690618Stmm sc->sc_is.is_dva = SBR_IOMMU_SVADIAG; 40790618Stmm sc->sc_is.is_dtcmp = 0; 40890618Stmm sc->sc_is.is_sb[0] = SBR_STRBUF; 40990618Stmm sc->sc_is.is_sb[1] = NULL; 41090618Stmm 41190618Stmm /* give us a nice name.. */ 41290618Stmm name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 41390618Stmm if (name == 0) 41490618Stmm panic("sbus_probe: couldn't malloc iommu name"); 41590618Stmm snprintf(name, 32, "%s dvma", device_get_name(dev)); 41690618Stmm 417100188Stmm /* 418100188Stmm * Note: the SBus IOMMU ignores the high bits of an address, so a NULL 419100188Stmm * DMA pointer will be translated by the first page of the IOTSB. 420100188Stmm * To detect bugs we'll allocate and ignore the first entry. 421100188Stmm */ 422100188Stmm iommu_init(name, &sc->sc_is, 0, -1, 1); 42390618Stmm 42490618Stmm /* Enable the over-temperature and power-fail intrrupts. */ 42590618Stmm rid = 0; 42690618Stmm mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP); 42790618Stmm vec = INTVEC(mr); 42890618Stmm if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 42990618Stmm vec, 1, RF_ACTIVE)) == NULL) 43090618Stmm panic("sbus_probe: failed to get temperature interrupt"); 43190618Stmm bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST, 43290618Stmm sbus_overtemp, sc, &sc->sc_ot_ihand); 433107477Stmm SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid))); 43490618Stmm rid = 0; 43590618Stmm mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP); 43690618Stmm vec = INTVEC(mr); 43790618Stmm if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 43890618Stmm vec, 1, RF_ACTIVE)) == NULL) 43990618Stmm panic("sbus_probe: failed to get power fail interrupt"); 44090618Stmm bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST, 44190618Stmm sbus_pwrfail, sc, &sc->sc_pf_ihand); 442107477Stmm SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid))); 44390618Stmm 44490618Stmm /* Initialize the counter-timer. */ 44590618Stmm sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0); 44690618Stmm 44790618Stmm /* 44890618Stmm * Loop through ROM children, fixing any relative addresses 44990618Stmm * and then configuring each device. 45090618Stmm * `specials' is an array of device names that are treated 45190618Stmm * specially: 45290618Stmm */ 45390618Stmm for (child = OF_child(node); child != 0; child = OF_peer(child)) { 45490618Stmm if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1) 45590618Stmm continue; 45690618Stmm 45790618Stmm if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) { 45890618Stmm device_printf(dev, "<%s>: incomplete\n", cname); 45990618Stmm free(cname, M_OFWPROP); 46090618Stmm continue; 46190618Stmm } 46290618Stmm if ((cdev = device_add_child(dev, NULL, -1)) == NULL) 46390618Stmm panic("sbus_probe: device_add_child failed"); 46490618Stmm device_set_ivars(cdev, sdi); 46590618Stmm } 46690618Stmm return (0); 46790618Stmm} 46890618Stmm 46990618Stmmstatic struct sbus_devinfo * 47090618Stmmsbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name) 47190618Stmm{ 47290618Stmm struct sbus_devinfo *sdi; 47390618Stmm struct sbus_regs *reg; 47490618Stmm u_int32_t base, iv, *intr; 47590618Stmm int i, nreg, nintr, slot, rslot; 47690618Stmm 47790618Stmm sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK); 47890618Stmm if (sdi == NULL) 47990618Stmm return (NULL); 48090618Stmm resource_list_init(&sdi->sdi_rl); 48190618Stmm sdi->sdi_name = name; 48290618Stmm sdi->sdi_node = node; 48390618Stmm OF_getprop_alloc(node, "compat", 1, (void **)&sdi->sdi_compat); 48490618Stmm OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type); 48590618Stmm slot = -1; 48690618Stmm nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®); 48790618Stmm if (nreg == -1) { 48890618Stmm if (sdi->sdi_type == NULL || 48990618Stmm strcmp(sdi->sdi_type, "hierarchical") != 0) { 49090618Stmm sbus_destroy_dinfo(sdi); 49190618Stmm return (NULL); 49290618Stmm } 49390618Stmm } else { 49490618Stmm for (i = 0; i < nreg; i++) { 49590618Stmm base = reg[i].sbr_offset; 49690618Stmm if (SBUS_ABS(base)) { 49790618Stmm rslot = SBUS_ABS_TO_SLOT(base); 49890618Stmm base = SBUS_ABS_TO_OFFSET(base); 49990618Stmm } else 50090618Stmm rslot = reg[i].sbr_slot; 50190618Stmm if (slot != -1 && slot != rslot) 50290618Stmm panic("sbus_setup_dinfo: multiple slots"); 50390618Stmm slot = rslot; 50490618Stmm 50590618Stmm resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i, 50690618Stmm base, base + reg[i].sbr_size, reg[i].sbr_size); 50790618Stmm } 50890618Stmm free(reg, M_OFWPROP); 50990618Stmm } 51090618Stmm sdi->sdi_slot = slot; 51190618Stmm 51290618Stmm /* 51390618Stmm * The `interrupts' property contains the Sbus interrupt level. 51490618Stmm */ 51590618Stmm nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), (void **)&intr); 51690618Stmm if (nintr != -1) { 51790618Stmm for (i = 0; i < nintr; i++) { 51890618Stmm iv = intr[i]; 51990618Stmm /* 52090618Stmm * Sbus card devices need the slot number encoded into 52190618Stmm * the vector as this is generally not done. 52290618Stmm */ 523107477Stmm if ((iv & INTMAP_OBIO_MASK) == 0) 52490618Stmm iv |= slot << 3; 52590618Stmm /* Set the ign as appropriate. */ 52690618Stmm iv |= sc->sc_ign; 52790618Stmm resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i, 52890618Stmm iv, iv, 1); 52990618Stmm } 53090618Stmm free(intr, M_OFWPROP); 53190618Stmm } 53290618Stmm if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz, 53390618Stmm sizeof(sdi->sdi_burstsz)) == -1) 53490618Stmm sdi->sdi_burstsz = sc->sc_burst; 53590618Stmm else 53690618Stmm sdi->sdi_burstsz &= sc->sc_burst; 53790618Stmm 53890618Stmm return (sdi); 53990618Stmm} 54090618Stmm 54190618Stmm/* Free everything except sdi_name, which is handled separately. */ 54290618Stmmstatic void 54390618Stmmsbus_destroy_dinfo(struct sbus_devinfo *dinfo) 54490618Stmm{ 54590618Stmm 54690618Stmm resource_list_free(&dinfo->sdi_rl); 54790618Stmm if (dinfo->sdi_compat != NULL) 54890618Stmm free(dinfo->sdi_compat, M_OFWPROP); 54990618Stmm if (dinfo->sdi_type != NULL) 55090618Stmm free(dinfo->sdi_type, M_OFWPROP); 55190618Stmm free(dinfo, M_DEVBUF); 55290618Stmm} 55390618Stmm 55490618Stmmstatic int 55590618Stmmsbus_print_child(device_t dev, device_t child) 55690618Stmm{ 55790618Stmm struct sbus_devinfo *dinfo; 55890618Stmm struct resource_list *rl; 55990618Stmm int rv; 56090618Stmm 56190618Stmm dinfo = device_get_ivars(child); 56290618Stmm rl = &dinfo->sdi_rl; 56390618Stmm rv = bus_print_child_header(dev, child); 56490618Stmm rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 56590618Stmm rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 56690618Stmm rv += bus_print_child_footer(dev, child); 56790618Stmm return (rv); 56890618Stmm} 56990618Stmm 57090618Stmmstatic void 57190618Stmmsbus_probe_nomatch(device_t dev, device_t child) 57290618Stmm{ 57390618Stmm char *name; 57490618Stmm char *type; 57590618Stmm 57690618Stmm if (BUS_READ_IVAR(dev, child, SBUS_IVAR_NAME, 57790618Stmm (uintptr_t *)&name) != 0 || 57890618Stmm BUS_READ_IVAR(dev, child, SBUS_IVAR_DEVICE_TYPE, 57990618Stmm (uintptr_t *)&type) != 0) 58090618Stmm return; 58190618Stmm 58290618Stmm if (type == NULL) 58390618Stmm type = "(unknown)"; 58490618Stmm device_printf(dev, "<%s>, type %s (no driver attached)\n", 58590618Stmm name, type); 58690618Stmm} 58790618Stmm 58890618Stmmstatic int 58990618Stmmsbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 59090618Stmm{ 59190618Stmm struct sbus_softc *sc = device_get_softc(dev); 59290618Stmm struct sbus_devinfo *dinfo; 59390618Stmm 59490618Stmm if ((dinfo = device_get_ivars(child)) == NULL) 59590618Stmm return (ENOENT); 59690618Stmm switch (which) { 59790618Stmm case SBUS_IVAR_BURSTSZ: 59890618Stmm *result = dinfo->sdi_burstsz; 59990618Stmm break; 60090618Stmm case SBUS_IVAR_CLOCKFREQ: 60190618Stmm *result = sc->sc_clockfreq; 60290618Stmm break; 60390618Stmm case SBUS_IVAR_COMPAT: 60490618Stmm *result = (uintptr_t)dinfo->sdi_compat; 60590618Stmm break; 60690618Stmm case SBUS_IVAR_NAME: 60790618Stmm *result = (uintptr_t)dinfo->sdi_name; 60890618Stmm break; 60990618Stmm case SBUS_IVAR_NODE: 61090618Stmm *result = dinfo->sdi_node; 61190618Stmm break; 61290618Stmm case SBUS_IVAR_SLOT: 61390618Stmm *result = dinfo->sdi_slot; 61490618Stmm break; 61590618Stmm case SBUS_IVAR_DEVICE_TYPE: 61690618Stmm *result = (uintptr_t)dinfo->sdi_type; 61790618Stmm break; 61890618Stmm default: 61990618Stmm return (ENOENT); 62090618Stmm } 62190618Stmm return 0; 62290618Stmm} 62390618Stmm 62490618Stmmstatic struct resource_list * 62590618Stmmsbus_get_resource_list(device_t dev, device_t child) 62690618Stmm{ 62790618Stmm struct sbus_devinfo *sdi; 62890618Stmm 62990618Stmm sdi = device_get_ivars(child); 63090618Stmm return (&sdi->sdi_rl); 63190618Stmm} 63290618Stmm 63390618Stmm/* Write to the correct clr register, and call the actual handler. */ 63490618Stmmstatic void 63590618Stmmsbus_intr_stub(void *arg) 63690618Stmm{ 63790618Stmm struct sbus_clr *scl; 63890618Stmm 63990618Stmm scl = (struct sbus_clr *)arg; 64090618Stmm scl->scl_handler(scl->scl_arg); 64190618Stmm SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0); 64290618Stmm} 64390618Stmm 64490618Stmmstatic int 64590618Stmmsbus_setup_intr(device_t dev, device_t child, 64690618Stmm struct resource *ires, int flags, driver_intr_t *intr, void *arg, 64790618Stmm void **cookiep) 64890618Stmm{ 64990618Stmm struct sbus_softc *sc; 65090618Stmm struct sbus_clr *scl; 65190618Stmm bus_addr_t intrmapptr, intrclrptr, intrptr; 65290618Stmm u_int64_t intrmap; 65390618Stmm u_int32_t inr, slot; 65490618Stmm int error, i; 65590618Stmm long vec = rman_get_start(ires); 65690618Stmm 65790618Stmm sc = (struct sbus_softc *)device_get_softc(dev); 65890618Stmm scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT); 65990618Stmm if (scl == NULL) 66090618Stmm return (NULL); 66190618Stmm intrptr = intrmapptr = intrclrptr = 0; 66290618Stmm intrmap = 0; 663107474Stmm inr = INTVEC(vec); 664107477Stmm if ((inr & INTMAP_OBIO_MASK) == 0) { 665107474Stmm /* 666107474Stmm * We're in an SBUS slot, register the map and clear 667107474Stmm * intr registers. 668107474Stmm */ 669107474Stmm slot = INTSLOT(vec); 670107474Stmm intrmapptr = SBR_SLOT0_INT_MAP + slot * 8; 671107474Stmm intrclrptr = SBR_SLOT0_INT_CLR + 672107474Stmm (slot * 8 * 8) + (INTPRI(vec) * 8); 673107474Stmm /* Enable the interrupt, insert IGN. */ 674107474Stmm intrmap = inr | sc->sc_ign; 675107474Stmm } else { 676107474Stmm intrptr = SBR_SCSI_INT_MAP; 677107474Stmm /* Insert IGN */ 678107474Stmm inr |= sc->sc_ign; 679107474Stmm for (i = 0; intrptr <= SBR_RESERVED_INT_MAP && 680107474Stmm INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) != 681107474Stmm INTVEC(inr); intrptr += 8, i++) 682107474Stmm ; 683107474Stmm if (INTVEC(intrmap) == INTVEC(inr)) { 684107474Stmm /* Register the map and clear intr registers */ 685107474Stmm intrmapptr = intrptr; 686107474Stmm intrclrptr = SBR_SCSI_INT_CLR + i * 8; 687107474Stmm /* Enable the interrupt */ 688107474Stmm } else 689107474Stmm panic("sbus_setup_intr: IRQ not found!"); 690107474Stmm } 69190618Stmm 69290618Stmm scl->scl_sc = sc; 69390618Stmm scl->scl_arg = arg; 69490618Stmm scl->scl_handler = intr; 69590618Stmm scl->scl_clr = intrclrptr; 69690618Stmm /* Disable the interrupt while we fiddle with it */ 697107474Stmm SYSIO_WRITE8(sc, intrmapptr, intrmap); 69890618Stmm error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 69990618Stmm sbus_intr_stub, scl, cookiep); 70090618Stmm if (error != 0) { 70190618Stmm free(scl, M_DEVBUF); 70290618Stmm return (error); 70390618Stmm } 70490618Stmm scl->scl_cookie = *cookiep; 70590618Stmm *cookiep = scl; 70690618Stmm 70790618Stmm /* 70890618Stmm * Clear the interrupt, it might have been triggered before it was 70990618Stmm * set up. 71090618Stmm */ 711107474Stmm SYSIO_WRITE8(sc, intrclrptr, 0); 71290618Stmm /* 713107477Stmm * Enable the interrupt and program the target module now we have the 714107477Stmm * handler installed. 71590618Stmm */ 716107477Stmm SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid))); 71790618Stmm return (error); 71890618Stmm} 71990618Stmm 72090618Stmmstatic int 72190618Stmmsbus_teardown_intr(device_t dev, device_t child, 72290618Stmm struct resource *vec, void *cookie) 72390618Stmm{ 72490618Stmm struct sbus_clr *scl; 72590618Stmm int error; 72690618Stmm 72790618Stmm scl = (struct sbus_clr *)cookie; 72890618Stmm error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 72990618Stmm scl->scl_cookie); 73090618Stmm /* 73190618Stmm * Don't disable the interrupt for now, so that stray interupts get 73290618Stmm * detected... 73390618Stmm */ 73490618Stmm if (error != 0) 73590618Stmm free(scl, M_DEVBUF); 73690618Stmm return (error); 73790618Stmm} 73890618Stmm 739108798Stmm/* 740108798Stmm * There is no need to handle pass-throughs here; there are no bridges to 741108798Stmm * SBuses. 742108798Stmm */ 74390618Stmmstatic struct resource * 74490618Stmmsbus_alloc_resource(device_t bus, device_t child, int type, int *rid, 74590618Stmm u_long start, u_long end, u_long count, u_int flags) 74690618Stmm{ 74790618Stmm struct sbus_softc *sc; 74890618Stmm struct sbus_devinfo *sdi; 74990618Stmm struct rman *rm; 75090618Stmm struct resource *rv; 75190618Stmm struct resource_list *rl; 75290618Stmm struct resource_list_entry *rle; 75390618Stmm bus_space_handle_t bh; 75490618Stmm bus_addr_t toffs; 75590618Stmm bus_size_t tend; 75690618Stmm int i; 75790618Stmm int isdefault = (start == 0UL && end == ~0UL); 75890618Stmm int needactivate = flags & RF_ACTIVE; 75990618Stmm 76090618Stmm sc = (struct sbus_softc *)device_get_softc(bus); 76190618Stmm sdi = device_get_ivars(child); 76290618Stmm rl = &sdi->sdi_rl; 76390618Stmm rle = resource_list_find(rl, type, *rid); 76490618Stmm if (rle == NULL) 76590618Stmm return (NULL); 76690618Stmm if (rle->res != NULL) 76790618Stmm panic("sbus_alloc_resource: resource entry is busy"); 76890618Stmm if (isdefault) { 76990618Stmm start = rle->start; 77090618Stmm count = ulmax(count, rle->count); 77190618Stmm end = ulmax(rle->end, start + count - 1); 77290618Stmm } 77390618Stmm switch (type) { 77490618Stmm case SYS_RES_IRQ: 775108798Stmm rv = BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, 776108798Stmm rid, start, end, count, flags); 77790618Stmm if (rv == NULL) 77890618Stmm return (NULL); 77990618Stmm break; 78090618Stmm case SYS_RES_MEMORY: 78190618Stmm rm = NULL; 78290618Stmm bh = toffs = tend = 0; 78390618Stmm for (i = 0; i < sc->sc_nrange; i++) { 78490618Stmm if (sc->sc_rd[i].rd_slot != sdi->sdi_slot || 78590618Stmm start < sc->sc_rd[i].rd_coffset || 78690618Stmm start > sc->sc_rd[i].rd_cend) 78790618Stmm continue; 78890618Stmm /* Disallow cross-range allocations. */ 78990618Stmm if (end > sc->sc_rd[i].rd_cend) 79090618Stmm return (NULL); 79190618Stmm /* We've found the connection to the parent bus */ 79290618Stmm toffs = start - sc->sc_rd[i].rd_coffset; 79390618Stmm tend = end - sc->sc_rd[i].rd_coffset; 79490618Stmm rm = &sc->sc_rd[i].rd_rman; 79590618Stmm bh = sc->sc_rd[i].rd_bushandle; 79690618Stmm } 79790618Stmm if (toffs == NULL) 79890618Stmm return (NULL); 79990618Stmm flags &= ~RF_ACTIVE; 80090618Stmm rv = rman_reserve_resource(rm, toffs, tend, count, flags, 80190618Stmm child); 80290618Stmm if (rv == NULL) 80390618Stmm return (NULL); 80490618Stmm rman_set_bustag(rv, sc->sc_cbustag); 80590618Stmm rman_set_bushandle(rv, bh + rman_get_start(rv)); 80690618Stmm if (needactivate) { 80790618Stmm if (bus_activate_resource(child, type, *rid, rv)) { 80890618Stmm rman_release_resource(rv); 80990618Stmm return (NULL); 81090618Stmm } 81190618Stmm } 81290618Stmm break; 81390618Stmm default: 81490618Stmm return (NULL); 81590618Stmm } 81690618Stmm rle->res = rv; 81790618Stmm return (rv); 81890618Stmm} 81990618Stmm 82090618Stmmstatic int 82190618Stmmsbus_activate_resource(device_t bus, device_t child, int type, int rid, 82290618Stmm struct resource *r) 82390618Stmm{ 82490618Stmm 825108798Stmm if (type == SYS_RES_IRQ) { 826108798Stmm return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), 827108798Stmm child, type, rid, r)); 828108798Stmm } 82990618Stmm return (rman_activate_resource(r)); 83090618Stmm} 83190618Stmm 83290618Stmmstatic int 83390618Stmmsbus_deactivate_resource(device_t bus, device_t child, int type, int rid, 83490618Stmm struct resource *r) 83590618Stmm{ 83690618Stmm 837108798Stmm if (type == SYS_RES_IRQ) { 838108798Stmm return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), 839108798Stmm child, type, rid, r)); 840108798Stmm } 84190618Stmm return (rman_deactivate_resource(r)); 84290618Stmm} 84390618Stmm 84490618Stmmstatic int 84590618Stmmsbus_release_resource(device_t bus, device_t child, int type, int rid, 84690618Stmm struct resource *r) 84790618Stmm{ 848108798Stmm struct sbus_devinfo *sdi; 849108798Stmm struct resource_list_entry *rle; 850108798Stmm int error = 0; 85190618Stmm 85290618Stmm if (type == SYS_RES_IRQ) 853108798Stmm error = BUS_RELEASE_RESOURCE(device_get_parent(bus), child, 854108798Stmm type, rid, r); 855108798Stmm else { 856108798Stmm if ((rman_get_flags(r) & RF_ACTIVE) != 0) 857108798Stmm error = bus_deactivate_resource(child, type, rid, r); 858108798Stmm if (error != 0) 859108798Stmm return (error); 860108798Stmm error = rman_release_resource(r); 86190618Stmm } 862108798Stmm if (error != 0) 863108798Stmm return (error); 864108798Stmm sdi = device_get_ivars(child); 865108798Stmm rle = resource_list_find(&sdi->sdi_rl, type, rid); 866108798Stmm if (rle == NULL) 867108798Stmm panic("sbus_release_resource: can't find resource"); 868108798Stmm if (rle->res == NULL) 869108798Stmm panic("sbus_release_resource: resource entry is not busy"); 870108798Stmm rle->res = NULL; 871108798Stmm return (0); 87290618Stmm} 87390618Stmm 87490618Stmm/* 87590618Stmm * Handle an overtemp situation. 87690618Stmm * 87790618Stmm * SPARCs have temperature sensors which generate interrupts 87890618Stmm * if the machine's temperature exceeds a certain threshold. 87990618Stmm * This handles the interrupt and powers off the machine. 88090618Stmm * The same needs to be done to PCI controller drivers. 88190618Stmm */ 88290618Stmmstatic void 88390618Stmmsbus_overtemp(void *arg) 88490618Stmm{ 88590618Stmm 88690618Stmm printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n"); 88790618Stmm shutdown_nice(RB_POWEROFF); 88890618Stmm} 88990618Stmm 89090618Stmm/* Try to shut down in time in case of power failure. */ 89190618Stmmstatic void 89290618Stmmsbus_pwrfail(void *arg) 89390618Stmm{ 89490618Stmm 89590618Stmm printf("Power failure detected\nShutting down NOW.\n"); 89690618Stmm shutdown_nice(0); 89790618Stmm} 89890618Stmm 89990618Stmmstatic bus_space_tag_t 90090618Stmmsbus_alloc_bustag(struct sbus_softc *sc) 90190618Stmm{ 90290618Stmm bus_space_tag_t sbt; 90390618Stmm 90490618Stmm sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 90590618Stmm M_NOWAIT | M_ZERO); 90690618Stmm if (sbt == NULL) 90790618Stmm panic("sbus_alloc_bustag: out of memory"); 90890618Stmm 90990618Stmm bzero(sbt, sizeof *sbt); 91090618Stmm sbt->cookie = sc; 91190618Stmm sbt->parent = sc->sc_bustag; 91290618Stmm sbt->type = SBUS_BUS_SPACE; 91390618Stmm return (sbt); 91490618Stmm} 91590618Stmm 91690618Stmmstatic int 91793070Stmmsbus_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags, 91893070Stmm bus_dmamap_t *mapp) 91990618Stmm{ 92093070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 92190618Stmm 92293070Stmm return (iommu_dvmamap_create(pdmat, ddmat, &sc->sc_is, flags, mapp)); 92390618Stmm 92490618Stmm} 92590618Stmm 92690618Stmmstatic int 92793070Stmmsbus_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 92890618Stmm{ 92993070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 93090618Stmm 93193070Stmm return (iommu_dvmamap_destroy(pdmat, ddmat, &sc->sc_is, map)); 93290618Stmm} 93390618Stmm 93490618Stmmstatic int 93593070Stmmsbus_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 93693070Stmm void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback, 93793070Stmm void *callback_arg, int flags) 93890618Stmm{ 93993070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 94090618Stmm 94193070Stmm return (iommu_dvmamap_load(pdmat, ddmat, &sc->sc_is, map, buf, buflen, 94293070Stmm callback, callback_arg, flags)); 94390618Stmm} 94490618Stmm 94590618Stmmstatic void 94693070Stmmsbus_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 94790618Stmm{ 94893070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 94990618Stmm 95093070Stmm iommu_dvmamap_unload(pdmat, ddmat, &sc->sc_is, map); 95190618Stmm} 95290618Stmm 95390618Stmmstatic void 95493070Stmmsbus_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 95590618Stmm bus_dmasync_op_t op) 95690618Stmm{ 95793070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 95890618Stmm 95993070Stmm iommu_dvmamap_sync(pdmat, ddmat, &sc->sc_is, map, op); 96090618Stmm} 96190618Stmm 96290618Stmmstatic int 96393070Stmmsbus_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 96493070Stmm int flags, bus_dmamap_t *mapp) 96590618Stmm{ 96693070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 96790618Stmm 96893070Stmm return (iommu_dvmamem_alloc(pdmat, ddmat, &sc->sc_is, vaddr, flags, 96993070Stmm mapp)); 97090618Stmm} 97190618Stmm 97290618Stmmstatic void 97393070Stmmsbus_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 97493070Stmm bus_dmamap_t map) 97590618Stmm{ 97693070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 97790618Stmm 97893070Stmm iommu_dvmamem_free(pdmat, ddmat, &sc->sc_is, vaddr, map); 97990618Stmm} 980