schizovar.h revision 220038 
1/*-
2 * Copyright (c) 2005 by Marius Strobl <marius@FreeBSD.org>.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions, and the following disclaimer,
10 *    without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in
13 *    the documentation and/or other materials provided with the
14 *    distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/sparc64/pci/schizovar.h 220038 2011-03-26 16:49:12Z marius $
29 */
30
31#ifndef _SPARC64_PCI_SCHIZOVAR_H_
32#define	_SPARC64_PCI_SCHIZOVAR_H_
33
34struct schizo_softc;
35
36struct schizo_iommu_state {
37	struct iommu_state	sis_is;
38	struct schizo_softc	*sis_sc;
39};
40
41struct schizo_softc {
42	struct bus_dma_methods          sc_dma_methods;
43
44	device_t			sc_dev;
45
46	struct mtx			sc_sync_mtx;
47	uint64_t			sc_sync_val;
48
49	struct mtx			*sc_mtx;
50
51	phandle_t			sc_node;
52
53	u_int				sc_mode;
54#define	SCHIZO_MODE_SCZ			0
55#define	SCHIZO_MODE_TOM			1
56#define	SCHIZO_MODE_XMS			2
57
58	u_int				sc_flags;
59#define	SCHIZO_FLAGS_BSWAR		(1 << 0)
60#define	SCHIZO_FLAGS_XMODE		(1 << 1)
61
62	bus_addr_t			sc_cdma_clr;
63	uint32_t			sc_cdma_state;
64#define	SCHIZO_CDMA_STATE_IDLE		(1 << 0)
65#define	SCHIZO_CDMA_STATE_PENDING	(1 << 1)
66#define	SCHIZO_CDMA_STATE_RECEIVED	(1 << 2)
67
68	u_int				sc_half;
69	uint32_t			sc_ign;
70	uint32_t			sc_ver;
71	uint32_t			sc_mrev;
72
73	struct resource			*sc_mem_res[TOM_NREG];
74	struct resource			*sc_irq_res[STX_NINTR];
75	void				*sc_ihand[STX_NINTR];
76
77	struct schizo_iommu_state	sc_is;
78
79	struct rman			sc_pci_mem_rman;
80	struct rman			sc_pci_io_rman;
81	bus_space_handle_t		sc_pci_bh[STX_NRANGE];
82	bus_space_tag_t			sc_pci_cfgt;
83	bus_space_tag_t			sc_pci_iot;
84	bus_space_tag_t			sc_pci_memt;
85	bus_dma_tag_t			sc_pci_dmat;
86
87	uint32_t			sc_stats_dma_ce;
88	uint32_t			sc_stats_pci_non_fatal;
89
90	uint8_t				sc_pci_secbus;
91	uint8_t				sc_pci_subbus;
92
93	struct ofw_bus_iinfo		sc_pci_iinfo;
94
95	SLIST_ENTRY(schizo_softc)	sc_link;
96};
97
98#endif /* !_SPARC64_PCI_SCHIZOVAR_H_ */
99