uninorthvar.h revision 266019 
1/*-
2 * Copyright (C) 2002 Benno Rice.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * $FreeBSD: stable/10/sys/powerpc/powermac/uninorthvar.h 266019 2014-05-14 14:08:45Z ian $
26 */
27
28#ifndef	_POWERPC_POWERMAC_UNINORTHVAR_H_
29#define	_POWERPC_POWERMAC_UNINORTHVAR_H_
30
31#include <dev/ofw/ofw_bus_subr.h>
32#include <dev/ofw/ofw_pci.h>
33#include <powerpc/ofw/ofw_pci.h>
34
35struct uninorth_softc {
36	struct ofw_pci_softc	pci_sc;
37	vm_offset_t		sc_addr;
38	vm_offset_t		sc_data;
39	int			sc_ver;
40};
41
42struct unin_chip_softc {
43	uint64_t		sc_physaddr;
44	uint64_t		sc_size;
45	vm_offset_t		sc_addr;
46	struct rman  		sc_mem_rman;
47	int			sc_version;
48};
49
50/*
51 * Format of a unin reg property entry.
52 */
53struct unin_chip_reg {
54        u_int32_t       mr_base;
55        u_int32_t       mr_size;
56};
57
58/*
59 * Per unin device structure.
60 */
61struct unin_chip_devinfo {
62        int        udi_interrupts[6];
63        int        udi_ninterrupts;
64        int        udi_base;
65        struct ofw_bus_devinfo udi_obdinfo;
66        struct resource_list udi_resources;
67};
68
69/*
70 * Version register
71 */
72#define UNIN_VERS       0x0
73
74/*
75 * Clock-control register
76 */
77#define UNIN_CLOCKCNTL		0x20
78#define UNIN_CLOCKCNTL_GMAC	0x2
79
80/*
81 * Power management register
82 */
83#define UNIN_PWR_MGMT		0x30
84#define UNIN_PWR_NORMAL		0x00
85#define UNIN_PWR_IDLE2		0x01
86#define UNIN_PWR_SLEEP		0x02
87#define UNIN_PWR_SAVE		0x03
88#define UNIN_PWR_MASK		0x03
89
90/*
91 * Hardware initialization state register
92 */
93#define UNIN_HWINIT_STATE	0x70
94#define UNIN_SLEEPING		0x01
95#define UNIN_RUNNING		0x02
96
97
98/*
99 * Toggle registers
100 */
101#define UNIN_TOGGLE_REG		0xe0
102#define UNIN_MPIC_RESET		0x2
103#define UNIN_MPIC_OUTPUT_ENABLE	0x4
104
105extern int unin_chip_sleep(device_t dev, int idle);
106extern int unin_chip_wake(device_t dev);
107#endif  /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */
108