platform_powermac.c revision 260674 
1/*-
2 * Copyright (c) 2008 Marcel Moolenaar
3 * Copyright (c) 2009 Nathan Whitehorn
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: stable/10/sys/powerpc/powermac/platform_powermac.c 260674 2014-01-15 06:17:15Z jhibbits $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/bus.h>
35#include <sys/pcpu.h>
36#include <sys/proc.h>
37#include <sys/smp.h>
38#include <vm/vm.h>
39#include <vm/pmap.h>
40
41#include <machine/bus.h>
42#include <machine/cpu.h>
43#include <machine/hid.h>
44#include <machine/platformvar.h>
45#include <machine/pmap.h>
46#include <machine/smp.h>
47#include <machine/spr.h>
48
49#include <dev/ofw/openfirm.h>
50#include <machine/ofw_machdep.h>
51
52#include "platform_if.h"
53
54#ifdef SMP
55extern void *ap_pcpu;
56#endif
57
58static int powermac_probe(platform_t);
59static int powermac_attach(platform_t);
60void powermac_mem_regions(platform_t, struct mem_region **phys, int *physsz,
61    struct mem_region **avail, int *availsz);
62static u_long powermac_timebase_freq(platform_t, struct cpuref *cpuref);
63static int powermac_smp_first_cpu(platform_t, struct cpuref *cpuref);
64static int powermac_smp_next_cpu(platform_t, struct cpuref *cpuref);
65static int powermac_smp_get_bsp(platform_t, struct cpuref *cpuref);
66static int powermac_smp_start_cpu(platform_t, struct pcpu *cpu);
67static void powermac_reset(platform_t);
68
69static platform_method_t powermac_methods[] = {
70	PLATFORMMETHOD(platform_probe, 		powermac_probe),
71	PLATFORMMETHOD(platform_attach,		powermac_attach),
72	PLATFORMMETHOD(platform_mem_regions,	powermac_mem_regions),
73	PLATFORMMETHOD(platform_timebase_freq,	powermac_timebase_freq),
74
75	PLATFORMMETHOD(platform_smp_first_cpu,	powermac_smp_first_cpu),
76	PLATFORMMETHOD(platform_smp_next_cpu,	powermac_smp_next_cpu),
77	PLATFORMMETHOD(platform_smp_get_bsp,	powermac_smp_get_bsp),
78	PLATFORMMETHOD(platform_smp_start_cpu,	powermac_smp_start_cpu),
79
80	PLATFORMMETHOD(platform_reset,		powermac_reset),
81
82	PLATFORMMETHOD_END
83};
84
85static platform_def_t powermac_platform = {
86	"powermac",
87	powermac_methods,
88	0
89};
90
91PLATFORM_DEF(powermac_platform);
92
93static int
94powermac_probe(platform_t plat)
95{
96	char compat[255];
97	ssize_t compatlen;
98	char *curstr;
99	phandle_t root;
100
101	root = OF_peer(0);
102	if (root == 0)
103		return (ENXIO);
104
105	compatlen = OF_getprop(root, "compatible", compat, sizeof(compat));
106
107	for (curstr = compat; curstr < compat + compatlen;
108	    curstr += strlen(curstr) + 1) {
109		if (strncmp(curstr, "MacRISC", 7) == 0)
110			return (BUS_PROBE_SPECIFIC);
111	}
112
113	return (ENXIO);
114}
115
116void
117powermac_mem_regions(platform_t plat, struct mem_region **phys, int *physsz,
118    struct mem_region **avail, int *availsz)
119{
120	ofw_mem_regions(phys,physsz,avail,availsz);
121}
122
123static int
124powermac_attach(platform_t plat)
125{
126	phandle_t rootnode;
127	char model[32];
128
129
130	/*
131	 * Quiesce Open Firmware on PowerMac11,2 and 12,1. It is
132	 * necessary there to shut down a background thread doing fan
133	 * management, and is harmful on other machines (it will make OF
134	 * shut off power to various system components it had turned on).
135	 *
136	 * Note: we don't need to worry about which OF module we are
137	 * using since this is called only from very early boot, within
138	 * OF's boot context.
139	 */
140
141	rootnode = OF_finddevice("/");
142	if (OF_getprop(rootnode, "model", model, sizeof(model)) > 0) {
143		if (strcmp(model, "PowerMac11,2") == 0 ||
144		    strcmp(model, "PowerMac12,1") == 0) {
145			ofw_quiesce();
146		}
147	}
148
149	return (0);
150}
151
152static u_long
153powermac_timebase_freq(platform_t plat, struct cpuref *cpuref)
154{
155	phandle_t phandle;
156	int32_t ticks = -1;
157
158	phandle = cpuref->cr_hwref;
159
160	OF_getprop(phandle, "timebase-frequency", &ticks, sizeof(ticks));
161
162	if (ticks <= 0)
163		panic("Unable to determine timebase frequency!");
164
165	return (ticks);
166}
167
168
169static int
170powermac_smp_fill_cpuref(struct cpuref *cpuref, phandle_t cpu)
171{
172	cell_t cpuid;
173	int res;
174
175	cpuref->cr_hwref = cpu;
176	res = OF_getprop(cpu, "reg", &cpuid, sizeof(cpuid));
177
178	/*
179	 * psim doesn't have a reg property, so assume 0 as for the
180	 * uniprocessor case in the CHRP spec.
181	 */
182	if (res < 0) {
183		cpuid = 0;
184	}
185
186	cpuref->cr_cpuid = cpuid & 0xff;
187	return (0);
188}
189
190static int
191powermac_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
192{
193	char buf[8];
194	phandle_t cpu, dev, root;
195	int res;
196
197	root = OF_peer(0);
198
199	dev = OF_child(root);
200	while (dev != 0) {
201		res = OF_getprop(dev, "name", buf, sizeof(buf));
202		if (res > 0 && strcmp(buf, "cpus") == 0)
203			break;
204		dev = OF_peer(dev);
205	}
206	if (dev == 0) {
207		/*
208		 * psim doesn't have a name property on the /cpus node,
209		 * but it can be found directly
210		 */
211		dev = OF_finddevice("/cpus");
212		if (dev == -1)
213			return (ENOENT);
214	}
215
216	cpu = OF_child(dev);
217
218	while (cpu != 0) {
219		res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
220		if (res > 0 && strcmp(buf, "cpu") == 0)
221			break;
222		cpu = OF_peer(cpu);
223	}
224	if (cpu == 0)
225		return (ENOENT);
226
227	return (powermac_smp_fill_cpuref(cpuref, cpu));
228}
229
230static int
231powermac_smp_next_cpu(platform_t plat, struct cpuref *cpuref)
232{
233	char buf[8];
234	phandle_t cpu;
235	int res;
236
237	cpu = OF_peer(cpuref->cr_hwref);
238	while (cpu != 0) {
239		res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
240		if (res > 0 && strcmp(buf, "cpu") == 0)
241			break;
242		cpu = OF_peer(cpu);
243	}
244	if (cpu == 0)
245		return (ENOENT);
246
247	return (powermac_smp_fill_cpuref(cpuref, cpu));
248}
249
250static int
251powermac_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
252{
253	ihandle_t inst;
254	phandle_t bsp, chosen;
255	int res;
256
257	chosen = OF_finddevice("/chosen");
258	if (chosen == -1)
259		return (ENXIO);
260
261	res = OF_getprop(chosen, "cpu", &inst, sizeof(inst));
262	if (res < 0)
263		return (ENXIO);
264
265	bsp = OF_instance_to_package(inst);
266	return (powermac_smp_fill_cpuref(cpuref, bsp));
267}
268
269static int
270powermac_smp_start_cpu(platform_t plat, struct pcpu *pc)
271{
272#ifdef SMP
273	phandle_t cpu;
274	volatile uint8_t *rstvec;
275	static volatile uint8_t *rstvec_virtbase = NULL;
276	int res, reset, timeout;
277
278	cpu = pc->pc_hwref;
279	res = OF_getprop(cpu, "soft-reset", &reset, sizeof(reset));
280	if (res < 0) {
281		reset = 0x58;
282
283		switch (pc->pc_cpuid) {
284		case 0:
285			reset += 0x03;
286			break;
287		case 1:
288			reset += 0x04;
289			break;
290		case 2:
291			reset += 0x0f;
292			break;
293		case 3:
294			reset += 0x10;
295			break;
296		default:
297			return (ENXIO);
298		}
299	}
300
301	ap_pcpu = pc;
302
303	if (rstvec_virtbase == NULL)
304		rstvec_virtbase = pmap_mapdev(0x80000000, PAGE_SIZE);
305
306	rstvec = rstvec_virtbase + reset;
307
308	*rstvec = 4;
309	powerpc_sync();
310	(void)(*rstvec);
311	powerpc_sync();
312	DELAY(1);
313	*rstvec = 0;
314	powerpc_sync();
315	(void)(*rstvec);
316	powerpc_sync();
317
318	timeout = 10000;
319	while (!pc->pc_awake && timeout--)
320		DELAY(100);
321
322	return ((pc->pc_awake) ? 0 : EBUSY);
323#else
324	/* No SMP support */
325	return (ENXIO);
326#endif
327}
328
329/* From p3-53 of the MPC7450 RISC Microprocessor Family Reference Manual */
330void
331flush_disable_caches(void)
332{
333	register_t msr;
334	register_t msscr0;
335	register_t cache_reg;
336	volatile uint32_t *memp;
337	uint32_t temp;
338	int i;
339	int x;
340
341	msr = mfmsr();
342	powerpc_sync();
343	mtmsr(msr & ~(PSL_EE | PSL_DR));
344	msscr0 = mfspr(SPR_MSSCR0);
345	msscr0 &= ~MSSCR0_L2PFE;
346	mtspr(SPR_MSSCR0, msscr0);
347	powerpc_sync();
348	isync();
349	__asm__ __volatile__("dssall; sync");
350	powerpc_sync();
351	isync();
352	__asm__ __volatile__("dcbf 0,%0" :: "r"(0));
353	__asm__ __volatile__("dcbf 0,%0" :: "r"(0));
354	__asm__ __volatile__("dcbf 0,%0" :: "r"(0));
355
356	/* Lock the L1 Data cache. */
357	mtspr(SPR_LDSTCR, mfspr(SPR_LDSTCR) | 0xFF);
358	powerpc_sync();
359	isync();
360
361	mtspr(SPR_LDSTCR, 0);
362
363	/*
364	 * Perform this in two stages: Flush the cache starting in RAM, then do it
365	 * from ROM.
366	 */
367	memp = (volatile uint32_t *)0x00000000;
368	for (i = 0; i < 128 * 1024; i++) {
369		temp = *memp;
370		__asm__ __volatile__("dcbf 0,%0" :: "r"(memp));
371		memp += 32/sizeof(*memp);
372	}
373
374	memp = (volatile uint32_t *)0xfff00000;
375	x = 0xfe;
376
377	for (; x != 0xff;) {
378		mtspr(SPR_LDSTCR, x);
379		for (i = 0; i < 128; i++) {
380			temp = *memp;
381			__asm__ __volatile__("dcbf 0,%0" :: "r"(memp));
382			memp += 32/sizeof(*memp);
383		}
384		x = ((x << 1) | 1) & 0xff;
385	}
386	mtspr(SPR_LDSTCR, 0);
387
388	cache_reg = mfspr(SPR_L2CR);
389	if (cache_reg & L2CR_L2E) {
390		cache_reg &= ~(L2CR_L2IO_7450 | L2CR_L2DO_7450);
391		mtspr(SPR_L2CR, cache_reg);
392		powerpc_sync();
393		mtspr(SPR_L2CR, cache_reg | L2CR_L2HWF);
394		while (mfspr(SPR_L2CR) & L2CR_L2HWF)
395			; /* Busy wait for cache to flush */
396		powerpc_sync();
397		cache_reg &= ~L2CR_L2E;
398		mtspr(SPR_L2CR, cache_reg);
399		powerpc_sync();
400		mtspr(SPR_L2CR, cache_reg | L2CR_L2I);
401		powerpc_sync();
402		while (mfspr(SPR_L2CR) & L2CR_L2I)
403			; /* Busy wait for L2 cache invalidate */
404		powerpc_sync();
405	}
406
407	cache_reg = mfspr(SPR_L3CR);
408	if (cache_reg & L3CR_L3E) {
409		cache_reg &= ~(L3CR_L3IO | L3CR_L3DO);
410		mtspr(SPR_L3CR, cache_reg);
411		powerpc_sync();
412		mtspr(SPR_L3CR, cache_reg | L3CR_L3HWF);
413		while (mfspr(SPR_L3CR) & L3CR_L3HWF)
414			; /* Busy wait for cache to flush */
415		powerpc_sync();
416		cache_reg &= ~L3CR_L3E;
417		mtspr(SPR_L3CR, cache_reg);
418		powerpc_sync();
419		mtspr(SPR_L3CR, cache_reg | L3CR_L3I);
420		powerpc_sync();
421		while (mfspr(SPR_L3CR) & L3CR_L3I)
422			; /* Busy wait for L3 cache invalidate */
423		powerpc_sync();
424	}
425
426	mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_DCE);
427	powerpc_sync();
428	isync();
429
430	mtmsr(msr);
431}
432
433static void
434powermac_reset(platform_t platform)
435{
436	OF_reboot();
437}
438
439