ofw_pcibus.c revision 330938
1/*- 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000, BSDi 5 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: stable/10/sys/powerpc/ofw/ofw_pcibus.c 330938 2018-03-14 19:04:40Z jhb $"); 32 33#include <sys/param.h> 34#include <sys/bus.h> 35#include <sys/kernel.h> 36#include <sys/libkern.h> 37#include <sys/module.h> 38#include <sys/pciio.h> 39 40#include <dev/ofw/ofw_bus.h> 41#include <dev/ofw/ofw_bus_subr.h> 42#include <dev/ofw/ofw_pci.h> 43#include <dev/ofw/openfirm.h> 44 45#include <machine/bus.h> 46#include <machine/intr_machdep.h> 47#include <machine/resource.h> 48 49#include <dev/pci/pcireg.h> 50#include <dev/pci/pcivar.h> 51#include <dev/pci/pci_private.h> 52 53#include "ofw_pcibus.h" 54#include "pcib_if.h" 55#include "pci_if.h" 56 57typedef uint32_t ofw_pci_intr_t; 58 59/* Methods */ 60static device_probe_t ofw_pcibus_probe; 61static device_attach_t ofw_pcibus_attach; 62static pci_assign_interrupt_t ofw_pcibus_assign_interrupt; 63static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo; 64static bus_child_deleted_t ofw_pcibus_child_deleted; 65static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, 66 char *buf, size_t buflen); 67 68static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno); 69static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno); 70 71static device_method_t ofw_pcibus_methods[] = { 72 /* Device interface */ 73 DEVMETHOD(device_probe, ofw_pcibus_probe), 74 DEVMETHOD(device_attach, ofw_pcibus_attach), 75 76 /* Bus interface */ 77 DEVMETHOD(bus_child_deleted, ofw_pcibus_child_deleted), 78 DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method), 79 80 /* PCI interface */ 81 DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt), 82 83 /* ofw_bus interface */ 84 DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo), 85 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 86 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 87 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 88 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 89 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 90 91 DEVMETHOD_END 92}; 93 94static devclass_t pci_devclass; 95 96DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, 97 sizeof(struct pci_softc), pci_driver); 98DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0); 99MODULE_VERSION(ofw_pcibus, 1); 100MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1); 101 102static int ofw_devices_only = 0; 103TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only); 104 105static int 106ofw_pcibus_probe(device_t dev) 107{ 108 109 if (ofw_bus_get_node(dev) == -1) 110 return (ENXIO); 111 device_set_desc(dev, "OFW PCI bus"); 112 113 return (BUS_PROBE_DEFAULT); 114} 115 116static int 117ofw_pcibus_attach(device_t dev) 118{ 119 u_int busno, domain; 120 int error; 121 122 error = pci_attach_common(dev); 123 if (error) 124 return (error); 125 domain = pcib_get_domain(dev); 126 busno = pcib_get_bus(dev); 127 128 /* 129 * Attach those children represented in the device tree. 130 */ 131 132 ofw_pcibus_enum_devtree(dev, domain, busno); 133 134 /* 135 * We now attach any laggard devices. FDT, for instance, allows 136 * the device tree to enumerate only some PCI devices. Apple's 137 * OF device tree on some Grackle-based hardware can also miss 138 * functions on multi-function cards. 139 */ 140 141 if (!ofw_devices_only) 142 ofw_pcibus_enum_bus(dev, domain, busno); 143 144 return (bus_generic_attach(dev)); 145} 146 147static void 148ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno) 149{ 150 device_t pcib; 151 struct ofw_pci_register pcir; 152 struct ofw_pcibus_devinfo *dinfo; 153 phandle_t node, child; 154 u_int func, slot; 155 int intline; 156 157 pcib = device_get_parent(dev); 158 node = ofw_bus_get_node(dev); 159 160 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 161 if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1) 162 continue; 163 slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); 164 func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); 165 166 /* Some OFW device trees contain dupes. */ 167 if (pci_find_dbsf(domain, busno, slot, func) != NULL) 168 continue; 169 170 /* 171 * The preset in the intline register is usually bogus. Reset 172 * it such that the PCI code will reroute the interrupt if 173 * needed. 174 */ 175 176 intline = PCI_INVALID_IRQ; 177 if (OF_getproplen(child, "interrupts") > 0) 178 intline = 0; 179 PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE, 180 intline, 1); 181 182 /* 183 * Now set up the PCI and OFW bus layer devinfo and add it 184 * to the PCI bus. 185 */ 186 187 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, 188 domain, busno, slot, func, sizeof(*dinfo)); 189 if (dinfo == NULL) 190 continue; 191 if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) != 192 0) { 193 pci_freecfg((struct pci_devinfo *)dinfo); 194 continue; 195 } 196 dinfo->opd_dma_tag = NULL; 197 pci_add_child(dev, (struct pci_devinfo *)dinfo); 198 199 /* 200 * Some devices don't have an intpin set, but do have 201 * interrupts. These are fully specified, and set in the 202 * interrupts property, so add that value to the device's 203 * resource list. 204 */ 205 if (dinfo->opd_dinfo.cfg.intpin == 0) 206 ofw_bus_intr_to_rl(dev, child, &dinfo->opd_dinfo.resources); 207 } 208} 209 210/* 211 * The following is an almost exact clone of pci_add_children(), with the 212 * addition that it (a) will not add children that have already been added, 213 * and (b) will set up the OFW devinfo to point to invalid values. This is 214 * to handle non-enumerated PCI children as exist in FDT and on the second 215 * function of the Rage 128 in my Blue & White G3. 216 */ 217 218static void 219ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno) 220{ 221 device_t pcib; 222 struct ofw_pcibus_devinfo *dinfo; 223 int maxslots; 224 int s, f, pcifunchigh; 225 uint8_t hdrtype; 226 227 pcib = device_get_parent(dev); 228 229 maxslots = PCIB_MAXSLOTS(pcib); 230 for (s = 0; s <= maxslots; s++) { 231 pcifunchigh = 0; 232 f = 0; 233 DELAY(1); 234 hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1); 235 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) 236 continue; 237 if (hdrtype & PCIM_MFDEV) 238 pcifunchigh = PCI_FUNCMAX; 239 for (f = 0; f <= pcifunchigh; f++) { 240 /* Filter devices we have already added */ 241 if (pci_find_dbsf(domain, busno, s, f) != NULL) 242 continue; 243 244 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device( 245 pcib, domain, busno, s, f, sizeof(*dinfo)); 246 if (dinfo == NULL) 247 continue; 248 249 dinfo->opd_dma_tag = NULL; 250 dinfo->opd_obdinfo.obd_node = -1; 251 252 dinfo->opd_obdinfo.obd_name = NULL; 253 dinfo->opd_obdinfo.obd_compat = NULL; 254 dinfo->opd_obdinfo.obd_type = NULL; 255 dinfo->opd_obdinfo.obd_model = NULL; 256 257 /* 258 * For non OFW-devices, don't believe 0 259 * for an interrupt. 260 */ 261 if (dinfo->opd_dinfo.cfg.intline == 0) { 262 dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ; 263 PCIB_WRITE_CONFIG(pcib, busno, s, f, 264 PCIR_INTLINE, PCI_INVALID_IRQ, 1); 265 } 266 267 pci_add_child(dev, (struct pci_devinfo *)dinfo); 268 } 269 } 270} 271 272static void 273ofw_pcibus_child_deleted(device_t dev, device_t child) 274{ 275 struct ofw_pcibus_devinfo *dinfo; 276 277 dinfo = device_get_ivars(dev); 278 ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); 279 pci_child_deleted(dev, child); 280} 281 282static int 283ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf, 284 size_t buflen) 285{ 286 pci_child_pnpinfo_str_method(cbdev, child, buf, buflen); 287 288 if (ofw_bus_get_node(child) != -1) { 289 strlcat(buf, " ", buflen); /* Separate info */ 290 ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen); 291 } 292 293 return (0); 294} 295 296static int 297ofw_pcibus_assign_interrupt(device_t dev, device_t child) 298{ 299 ofw_pci_intr_t intr[2]; 300 phandle_t node, iparent; 301 int isz, icells; 302 303 node = ofw_bus_get_node(child); 304 305 if (node == -1) { 306 /* Non-firmware enumerated child, use standard routing */ 307 308 intr[0] = pci_get_intpin(child); 309 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, 310 intr[0])); 311 } 312 313 /* 314 * Try to determine the node's interrupt parent so we know which 315 * PIC to use. 316 */ 317 318 iparent = -1; 319 if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0) 320 iparent = -1; 321 icells = 1; 322 if (iparent != -1) 323 OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", 324 &icells, sizeof(icells)); 325 326 /* 327 * Any AAPL,interrupts property gets priority and is 328 * fully specified (i.e. does not need routing) 329 */ 330 331 isz = OF_getprop(node, "AAPL,interrupts", intr, sizeof(intr)); 332 if (isz == sizeof(intr[0])*icells) 333 return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev, 334 iparent, icells, intr)); 335 336 isz = OF_getprop(node, "interrupts", intr, sizeof(intr)); 337 if (isz == sizeof(intr[0])*icells) { 338 if (iparent != -1) 339 intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr); 340 } else { 341 /* No property: our best guess is the intpin. */ 342 intr[0] = pci_get_intpin(child); 343 } 344 345 /* 346 * If we got intr from a property, it may or may not be an intpin. 347 * For on-board devices, it frequently is not, and is completely out 348 * of the valid intpin range. For PCI slots, it hopefully is, 349 * otherwise we will have trouble interfacing with non-OFW buses 350 * such as cardbus. 351 * Since we cannot tell which it is without violating layering, we 352 * will always use the route_interrupt method, and treat exceptions 353 * on the level they become apparent. 354 */ 355 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0])); 356} 357 358static const struct ofw_bus_devinfo * 359ofw_pcibus_get_devinfo(device_t bus, device_t dev) 360{ 361 struct ofw_pcibus_devinfo *dinfo; 362 363 dinfo = device_get_ivars(dev); 364 return (&dinfo->opd_obdinfo); 365} 366 367