1176491Smarcel/* $NetBSD: fpu_emu.h,v 1.3 2005/12/11 12:18:42 christos Exp $ */ 2176491Smarcel/* $FreeBSD$ */ 3176491Smarcel 4176491Smarcel/* 5176491Smarcel * Copyright (c) 1992, 1993 6176491Smarcel * The Regents of the University of California. All rights reserved. 7176491Smarcel * 8176491Smarcel * This software was developed by the Computer Systems Engineering group 9176491Smarcel * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10176491Smarcel * contributed to Berkeley. 11176491Smarcel * 12176491Smarcel * All advertising materials mentioning features or use of this software 13176491Smarcel * must display the following acknowledgement: 14176491Smarcel * This product includes software developed by the University of 15176491Smarcel * California, Lawrence Berkeley Laboratory. 16176491Smarcel * 17176491Smarcel * Redistribution and use in source and binary forms, with or without 18176491Smarcel * modification, are permitted provided that the following conditions 19176491Smarcel * are met: 20176491Smarcel * 1. Redistributions of source code must retain the above copyright 21176491Smarcel * notice, this list of conditions and the following disclaimer. 22176491Smarcel * 2. Redistributions in binary form must reproduce the above copyright 23176491Smarcel * notice, this list of conditions and the following disclaimer in the 24176491Smarcel * documentation and/or other materials provided with the distribution. 25176491Smarcel * 3. Neither the name of the University nor the names of its contributors 26176491Smarcel * may be used to endorse or promote products derived from this software 27176491Smarcel * without specific prior written permission. 28176491Smarcel * 29176491Smarcel * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30176491Smarcel * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31176491Smarcel * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32176491Smarcel * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33176491Smarcel * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34176491Smarcel * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35176491Smarcel * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36176491Smarcel * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37176491Smarcel * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38176491Smarcel * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39176491Smarcel * SUCH DAMAGE. 40176491Smarcel * 41176491Smarcel * @(#)fpu_emu.h 8.1 (Berkeley) 6/11/93 42176491Smarcel */ 43176491Smarcel 44176491Smarcel/* 45176491Smarcel * Floating point emulator (tailored for SPARC, but structurally 46176491Smarcel * machine-independent). 47176491Smarcel * 48176491Smarcel * Floating point numbers are carried around internally in an `expanded' 49176491Smarcel * or `unpacked' form consisting of: 50176491Smarcel * - sign 51176491Smarcel * - unbiased exponent 52176491Smarcel * - mantissa (`1.' + 112-bit fraction + guard + round) 53176491Smarcel * - sticky bit 54176491Smarcel * Any implied `1' bit is inserted, giving a 113-bit mantissa that is 55176491Smarcel * always nonzero. Additional low-order `guard' and `round' bits are 56176491Smarcel * scrunched in, making the entire mantissa 115 bits long. This is divided 57176491Smarcel * into four 32-bit words, with `spare' bits left over in the upper part 58176491Smarcel * of the top word (the high bits of fp_mant[0]). An internal `exploded' 59176491Smarcel * number is thus kept within the half-open interval [1.0,2.0) (but see 60176491Smarcel * the `number classes' below). This holds even for denormalized numbers: 61176491Smarcel * when we explode an external denorm, we normalize it, introducing low-order 62176491Smarcel * zero bits, so that the rest of the code always sees normalized values. 63176491Smarcel * 64176491Smarcel * Note that a number of our algorithms use the `spare' bits at the top. 65176491Smarcel * The most demanding algorithm---the one for sqrt---depends on two such 66176491Smarcel * bits, so that it can represent values up to (but not including) 8.0, 67176491Smarcel * and then it needs a carry on top of that, so that we need three `spares'. 68176491Smarcel * 69176491Smarcel * The sticky-word is 32 bits so that we can use `OR' operators to goosh 70176491Smarcel * whole words from the mantissa into it. 71176491Smarcel * 72176491Smarcel * All operations are done in this internal extended precision. According 73176491Smarcel * to Hennesey & Patterson, Appendix A, rounding can be repeated---that is, 74176491Smarcel * it is OK to do a+b in extended precision and then round the result to 75176491Smarcel * single precision---provided single, double, and extended precisions are 76176491Smarcel * `far enough apart' (they always are), but we will try to avoid any such 77176491Smarcel * extra work where possible. 78176491Smarcel */ 79176491Smarcelstruct fpn { 80176491Smarcel int fp_class; /* see below */ 81176491Smarcel int fp_sign; /* 0 => positive, 1 => negative */ 82176491Smarcel int fp_exp; /* exponent (unbiased) */ 83176491Smarcel int fp_sticky; /* nonzero bits lost at right end */ 84176491Smarcel u_int fp_mant[4]; /* 115-bit mantissa */ 85176491Smarcel}; 86176491Smarcel 87176491Smarcel#define FP_NMANT 115 /* total bits in mantissa (incl g,r) */ 88176491Smarcel#define FP_NG 2 /* number of low-order guard bits */ 89176491Smarcel#define FP_LG ((FP_NMANT - 1) & 31) /* log2(1.0) for fp_mant[0] */ 90176491Smarcel#define FP_LG2 ((FP_NMANT - 1) & 63) /* log2(1.0) for fp_mant[0] and fp_mant[1] */ 91176491Smarcel#define FP_QUIETBIT (1 << (FP_LG - 1)) /* Quiet bit in NaNs (0.5) */ 92176491Smarcel#define FP_1 (1 << FP_LG) /* 1.0 in fp_mant[0] */ 93176491Smarcel#define FP_2 (1 << (FP_LG + 1)) /* 2.0 in fp_mant[0] */ 94176491Smarcel 95176491Smarcel/* 96176491Smarcel * Number classes. Since zero, Inf, and NaN cannot be represented using 97176491Smarcel * the above layout, we distinguish these from other numbers via a class. 98176491Smarcel * In addition, to make computation easier and to follow Appendix N of 99176491Smarcel * the SPARC Version 8 standard, we give each kind of NaN a separate class. 100176491Smarcel */ 101176491Smarcel#define FPC_SNAN -2 /* signalling NaN (sign irrelevant) */ 102176491Smarcel#define FPC_QNAN -1 /* quiet NaN (sign irrelevant) */ 103176491Smarcel#define FPC_ZERO 0 /* zero (sign matters) */ 104176491Smarcel#define FPC_NUM 1 /* number (sign matters) */ 105176491Smarcel#define FPC_INF 2 /* infinity (sign matters) */ 106176491Smarcel 107176491Smarcel#define ISSNAN(fp) ((fp)->fp_class == FPC_SNAN) 108176491Smarcel#define ISQNAN(fp) ((fp)->fp_class == FPC_QNAN) 109176491Smarcel#define ISNAN(fp) ((fp)->fp_class < 0) 110176491Smarcel#define ISZERO(fp) ((fp)->fp_class == 0) 111176491Smarcel#define ISINF(fp) ((fp)->fp_class == FPC_INF) 112176491Smarcel 113176491Smarcel/* 114176491Smarcel * ORDER(x,y) `sorts' a pair of `fpn *'s so that the right operand (y) points 115176491Smarcel * to the `more significant' operand for our purposes. Appendix N says that 116176491Smarcel * the result of a computation involving two numbers are: 117176491Smarcel * 118176491Smarcel * If both are SNaN: operand 2, converted to Quiet 119176491Smarcel * If only one is SNaN: the SNaN operand, converted to Quiet 120176491Smarcel * If both are QNaN: operand 2 121176491Smarcel * If only one is QNaN: the QNaN operand 122176491Smarcel * 123176491Smarcel * In addition, in operations with an Inf operand, the result is usually 124176491Smarcel * Inf. The class numbers are carefully arranged so that if 125176491Smarcel * (unsigned)class(op1) > (unsigned)class(op2) 126176491Smarcel * then op1 is the one we want; otherwise op2 is the one we want. 127176491Smarcel */ 128176491Smarcel#define ORDER(x, y) { \ 129176491Smarcel if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \ 130176491Smarcel SWAP(x, y); \ 131176491Smarcel} 132176491Smarcel#define SWAP(x, y) { \ 133176491Smarcel struct fpn *swap; \ 134176491Smarcel swap = (x), (x) = (y), (y) = swap; \ 135176491Smarcel} 136176491Smarcel 137176491Smarcel/* 138176491Smarcel * Emulator state. 139176491Smarcel */ 140176491Smarcelstruct fpemu { 141176491Smarcel struct fpreg *fe_fpstate; /* registers, etc */ 142176491Smarcel int fe_fpscr; /* fpscr copy (modified during op) */ 143176491Smarcel int fe_cx; /* keep track of exceptions */ 144176491Smarcel struct fpn fe_f1; /* operand 1 */ 145176491Smarcel struct fpn fe_f2; /* operand 2, if required */ 146176491Smarcel struct fpn fe_f3; /* available storage for result */ 147176491Smarcel}; 148176491Smarcel 149176491Smarcel/* 150176491Smarcel * Arithmetic functions. 151176491Smarcel * Each of these may modify its inputs (f1,f2) and/or the temporary. 152176491Smarcel * Each returns a pointer to the result and/or sets exceptions. 153176491Smarcel */ 154176491Smarcelstruct fpn *fpu_add(struct fpemu *); 155176491Smarcel#define fpu_sub(fe) ((fe)->fe_f2.fp_sign ^= 1, fpu_add(fe)) 156176491Smarcelstruct fpn *fpu_mul(struct fpemu *); 157176491Smarcelstruct fpn *fpu_div(struct fpemu *); 158176491Smarcelstruct fpn *fpu_sqrt(struct fpemu *); 159176491Smarcel 160176491Smarcel/* 161176491Smarcel * Other functions. 162176491Smarcel */ 163176491Smarcel 164176491Smarcel/* Perform a compare instruction (with or without unordered exception). */ 165176491Smarcelvoid fpu_compare(struct fpemu *, int); 166176491Smarcel 167176491Smarcel/* Build a new Quiet NaN (sign=0, frac=all 1's). */ 168176491Smarcelstruct fpn *fpu_newnan(struct fpemu *); 169176491Smarcel 170176501Smarcelvoid fpu_norm(struct fpn *); 171176501Smarcel 172176491Smarcel/* 173176491Smarcel * Shift a number right some number of bits, taking care of round/sticky. 174176491Smarcel * Note that the result is probably not a well-formed number (it will lack 175176491Smarcel * the normal 1-bit mant[0]&FP_1). 176176491Smarcel */ 177176491Smarcelint fpu_shr(struct fpn *, int); 178176491Smarcel 179176491Smarcelvoid fpu_explode(struct fpemu *, struct fpn *, int, int); 180176491Smarcelvoid fpu_implode(struct fpemu *, struct fpn *, int, u_int *); 181176491Smarcel 182176491Smarcel#ifdef DEBUG 183176491Smarcel#define FPE_EX 0x1 184176491Smarcel#define FPE_INSN 0x2 185176491Smarcel#define FPE_OP 0x4 186176491Smarcel#define FPE_REG 0x8 187176491Smarcelextern int fpe_debug; 188176491Smarcelvoid fpu_dumpfpn(struct fpn *); 189176491Smarcel#define DPRINTF(x, y) if (fpe_debug & (x)) printf y 190176491Smarcel#define DUMPFPN(x, f) if (fpe_debug & (x)) fpu_dumpfpn((f)) 191176491Smarcel#else 192176491Smarcel#define DPRINTF(x, y) 193176491Smarcel#define DUMPFPN(x, f) 194176491Smarcel#endif 195