machdep.c revision 198507
1/*- 2 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25/*- 26 * Copyright (C) 2001 Benno Rice 27 * All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 1. Redistributions of source code must retain the above copyright 33 * notice, this list of conditions and the following disclaimer. 34 * 2. Redistributions in binary form must reproduce the above copyright 35 * notice, this list of conditions and the following disclaimer in the 36 * documentation and/or other materials provided with the distribution. 37 * 38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 49 */ 50/*- 51 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 52 * Copyright (C) 1995, 1996 TooLs GmbH. 53 * All rights reserved. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 3. All advertising materials mentioning features or use of this software 64 * must display the following acknowledgement: 65 * This product includes software developed by TooLs GmbH. 66 * 4. The name of TooLs GmbH may not be used to endorse or promote products 67 * derived from this software without specific prior written permission. 68 * 69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79 */ 80 81#include <sys/cdefs.h> 82__FBSDID("$FreeBSD: head/sys/powerpc/booke/machdep.c 198507 2009-10-27 10:47:58Z kib $"); 83 84#include "opt_compat.h" 85#include "opt_ddb.h" 86#include "opt_kstack_pages.h" 87#include "opt_msgbuf.h" 88 89#include <sys/cdefs.h> 90#include <sys/types.h> 91#include <sys/param.h> 92#include <sys/proc.h> 93#include <sys/systm.h> 94#include <sys/time.h> 95#include <sys/bio.h> 96#include <sys/buf.h> 97#include <sys/bus.h> 98#include <sys/cons.h> 99#include <sys/cpu.h> 100#include <sys/kdb.h> 101#include <sys/kernel.h> 102#include <sys/lock.h> 103#include <sys/mutex.h> 104#include <sys/sysctl.h> 105#include <sys/exec.h> 106#include <sys/ktr.h> 107#include <sys/sysproto.h> 108#include <sys/signalvar.h> 109#include <sys/sysent.h> 110#include <sys/imgact.h> 111#include <sys/msgbuf.h> 112#include <sys/ptrace.h> 113 114#include <vm/vm.h> 115#include <vm/pmap.h> 116#include <vm/vm_page.h> 117#include <vm/vm_object.h> 118#include <vm/vm_pager.h> 119 120#include <machine/cpu.h> 121#include <machine/kdb.h> 122#include <machine/reg.h> 123#include <machine/vmparam.h> 124#include <machine/spr.h> 125#include <machine/hid.h> 126#include <machine/psl.h> 127#include <machine/trap.h> 128#include <machine/md_var.h> 129#include <machine/mmuvar.h> 130#include <machine/sigframe.h> 131#include <machine/metadata.h> 132#include <machine/bootinfo.h> 133#include <machine/platform.h> 134 135#include <sys/linker.h> 136#include <sys/reboot.h> 137 138#include <powerpc/mpc85xx/ocpbus.h> 139#include <powerpc/mpc85xx/mpc85xx.h> 140 141#ifdef DDB 142extern vm_offset_t ksym_start, ksym_end; 143#endif 144 145#ifdef DEBUG 146#define debugf(fmt, args...) printf(fmt, ##args) 147#else 148#define debugf(fmt, args...) 149#endif 150 151extern unsigned char kernel_text[]; 152extern unsigned char _etext[]; 153extern unsigned char _edata[]; 154extern unsigned char __bss_start[]; 155extern unsigned char __sbss_start[]; 156extern unsigned char __sbss_end[]; 157extern unsigned char _end[]; 158 159extern void dcache_enable(void); 160extern void dcache_inval(void); 161extern void icache_enable(void); 162extern void icache_inval(void); 163 164struct kva_md_info kmi; 165struct pcpu __pcpu[MAXCPU]; 166struct trapframe frame0; 167int cold = 1; 168long realmem = 0; 169long Maxmem = 0; 170 171struct bootinfo *bootinfo; 172 173char machine[] = "powerpc"; 174SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); 175 176int cacheline_size = 32; 177 178SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size, 179 CTLFLAG_RD, &cacheline_size, 0, ""); 180 181int hw_direct_map = 0; 182int ppc64 = 0; 183 184static void cpu_e500_startup(void *); 185SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL); 186 187void print_kernel_section_addr(void); 188void print_bootinfo(void); 189void print_kenv(void); 190u_int e500_init(u_int32_t, u_int32_t, void *); 191 192static void 193cpu_e500_startup(void *dummy) 194{ 195 int indx, size; 196 197 /* Initialise the decrementer-based clock. */ 198 decr_init(); 199 200 /* Good {morning,afternoon,evening,night}. */ 201 cpu_setup(PCPU_GET(cpuid)); 202 203 printf("real memory = %ld (%ld MB)\n", ptoa(physmem), 204 ptoa(physmem) / 1048576); 205 realmem = physmem; 206 207 /* Display any holes after the first chunk of extended memory. */ 208 if (bootverbose) { 209 printf("Physical memory chunk(s):\n"); 210 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 211 size = phys_avail[indx + 1] - phys_avail[indx]; 212 213 printf("0x%08x - 0x%08x, %d bytes (%d pages)\n", 214 phys_avail[indx], phys_avail[indx + 1] - 1, 215 size, size / PAGE_SIZE); 216 } 217 } 218 219 vm_ksubmap_init(&kmi); 220 221 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count), 222 ptoa(cnt.v_free_count) / 1048576); 223 224 /* Set up buffers, so they can be used to read disk labels. */ 225 bufinit(); 226 vm_pager_bufferinit(); 227} 228 229static char * 230kenv_next(char *cp) 231{ 232 233 if (cp != NULL) { 234 while (*cp != 0) 235 cp++; 236 cp++; 237 if (*cp == 0) 238 cp = NULL; 239 } 240 return (cp); 241} 242 243void 244print_kenv(void) 245{ 246 int len; 247 char *cp; 248 249 debugf("loader passed (static) kenv:\n"); 250 if (kern_envp == NULL) { 251 debugf(" no env, null ptr\n"); 252 return; 253 } 254 debugf(" kern_envp = 0x%08x\n", (u_int32_t)kern_envp); 255 256 len = 0; 257 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 258 debugf(" %x %s\n", (u_int32_t)cp, cp); 259} 260 261void 262print_bootinfo(void) 263{ 264 struct bi_mem_region *mr; 265 struct bi_eth_addr *eth; 266 int i, j; 267 268 debugf("bootinfo:\n"); 269 if (bootinfo == NULL) { 270 debugf(" no bootinfo, null ptr\n"); 271 return; 272 } 273 274 debugf(" version = 0x%08x\n", bootinfo->bi_version); 275 debugf(" ccsrbar = 0x%08x\n", bootinfo->bi_bar_base); 276 debugf(" cpu_clk = 0x%08x\n", bootinfo->bi_cpu_clk); 277 debugf(" bus_clk = 0x%08x\n", bootinfo->bi_bus_clk); 278 279 debugf(" mem regions:\n"); 280 mr = (struct bi_mem_region *)bootinfo->bi_data; 281 for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++) 282 debugf(" #%d, base = 0x%08x, size = 0x%08x\n", i, 283 mr->mem_base, mr->mem_size); 284 285 debugf(" eth addresses:\n"); 286 eth = (struct bi_eth_addr *)mr; 287 for (i = 0; i < bootinfo->bi_eth_addr_no; i++, eth++) { 288 debugf(" #%d, addr = ", i); 289 for (j = 0; j < 6; j++) 290 debugf("%02x ", eth->mac_addr[j]); 291 debugf("\n"); 292 } 293} 294 295void 296print_kernel_section_addr(void) 297{ 298 299 debugf("kernel image addresses:\n"); 300 debugf(" kernel_text = 0x%08x\n", (uint32_t)kernel_text); 301 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext); 302 debugf(" _edata = 0x%08x\n", (uint32_t)_edata); 303 debugf(" __sbss_start = 0x%08x\n", (uint32_t)__sbss_start); 304 debugf(" __sbss_end = 0x%08x\n", (uint32_t)__sbss_end); 305 debugf(" __sbss_start = 0x%08x\n", (uint32_t)__bss_start); 306 debugf(" _end = 0x%08x\n", (uint32_t)_end); 307} 308 309struct bi_mem_region * 310bootinfo_mr(void) 311{ 312 313 return ((struct bi_mem_region *)bootinfo->bi_data); 314} 315 316struct bi_eth_addr * 317bootinfo_eth(void) 318{ 319 struct bi_mem_region *mr; 320 struct bi_eth_addr *eth; 321 int i; 322 323 /* Advance to the eth section */ 324 mr = bootinfo_mr(); 325 for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++) 326 ; 327 328 eth = (struct bi_eth_addr *)mr; 329 return (eth); 330} 331 332u_int 333e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp) 334{ 335 struct pcpu *pc; 336 void *kmdp; 337 vm_offset_t end; 338 uint32_t csr; 339 340 kmdp = NULL; 341 342 end = endkernel; 343 344 /* 345 * Parse metadata and fetch parameters. This must be done as the first 346 * step as we need bootinfo data to at least init the console 347 */ 348 if (mdp != NULL) { 349 preload_metadata = mdp; 350 kmdp = preload_search_by_type("elf kernel"); 351 if (kmdp != NULL) { 352 bootinfo = (struct bootinfo *)preload_search_info(kmdp, 353 MODINFO_METADATA | MODINFOMD_BOOTINFO); 354 355 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 356 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 357 end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 358#ifdef DDB 359 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 360 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 361#endif 362 } 363 } else { 364 /* 365 * We should scream but how? - without CCSR bar (in bootinfo) 366 * cannot even output anything... 367 */ 368 369 /* 370 * FIXME add return value and handle in the locore so we can 371 * return to the loader maybe? (this seems not very easy to 372 * restore everything as the TLB have all been reprogrammed 373 * in the locore etc...) 374 */ 375 while(1); 376 } 377 378 /* Initialize TLB1 handling */ 379 tlb1_init(bootinfo->bi_bar_base); 380 381 /* Reset Time Base */ 382 mttb(0); 383 384 /* Init params/tunables that can be overridden by the loader. */ 385 init_param1(); 386 387 /* Start initializing proc0 and thread0. */ 388 proc_linkup(&proc0, &thread0); 389 thread0.td_frame = &frame0; 390 391 /* Set up per-cpu data and store the pointer in SPR general 0. */ 392 pc = &__pcpu[0]; 393 pcpu_init(pc, 0, sizeof(struct pcpu)); 394 pc->pc_curthread = &thread0; 395 __asm __volatile("mtsprg 0, %0" :: "r"(pc)); 396 397 /* Initialize system mutexes. */ 398 mutex_init(); 399 400 /* Initialize the console before printing anything. */ 401 cninit(); 402 403 /* Print out some debug info... */ 404 debugf("e500_init: console initialized\n"); 405 debugf(" arg1 startkernel = 0x%08x\n", startkernel); 406 debugf(" arg2 endkernel = 0x%08x\n", endkernel); 407 debugf(" arg3 mdp = 0x%08x\n", (u_int32_t)mdp); 408 debugf(" end = 0x%08x\n", (u_int32_t)end); 409 debugf(" boothowto = 0x%08x\n", boothowto); 410 debugf(" kernel ccsrbar = 0x%08x\n", CCSRBAR_VA); 411 debugf(" MSR = 0x%08x\n", mfmsr()); 412 debugf(" HID0 = 0x%08x\n", mfspr(SPR_HID0)); 413 debugf(" HID1 = 0x%08x\n", mfspr(SPR_HID1)); 414 debugf(" BUCSR = 0x%08x\n", mfspr(SPR_BUCSR)); 415 416 __asm __volatile("msync; isync"); 417 csr = ccsr_read4(OCP85XX_L2CTL); 418 debugf(" L2CTL = 0x%08x\n", csr); 419 420 print_bootinfo(); 421 print_kernel_section_addr(); 422 print_kenv(); 423 //tlb1_print_entries(); 424 //tlb1_print_tlbentries(); 425 426 kdb_init(); 427 428#ifdef KDB 429 if (boothowto & RB_KDB) 430 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 431#endif 432 433 /* Initialise platform module */ 434 platform_probe_and_attach(); 435 436 /* Initialise virtual memory. */ 437 pmap_mmu_install(MMU_TYPE_BOOKE, 0); 438 pmap_bootstrap(startkernel, end); 439 debugf("MSR = 0x%08x\n", mfmsr()); 440 //tlb1_print_entries(); 441 //tlb1_print_tlbentries(); 442 443 /* Initialize params/tunables that are derived from memsize. */ 444 init_param2(physmem); 445 446 /* Finish setting up thread0. */ 447 thread0.td_pcb = (struct pcb *) 448 ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE - 449 sizeof(struct pcb)) & ~15); 450 bzero((void *)thread0.td_pcb, sizeof(struct pcb)); 451 pc->pc_curpcb = thread0.td_pcb; 452 453 /* Initialise the message buffer. */ 454 msgbufinit(msgbufp, MSGBUF_SIZE); 455 456 /* Enable Machine Check interrupt. */ 457 mtmsr(mfmsr() | PSL_ME); 458 isync(); 459 460 /* Enable D-cache if applicable */ 461 csr = mfspr(SPR_L1CSR0); 462 if ((csr & L1CSR0_DCE) == 0) { 463 dcache_inval(); 464 dcache_enable(); 465 } 466 467 csr = mfspr(SPR_L1CSR0); 468 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) 469 printf("L1 D-cache %sabled\n", 470 (csr & L1CSR0_DCE) ? "en" : "dis"); 471 472 /* Enable L1 I-cache if applicable. */ 473 csr = mfspr(SPR_L1CSR1); 474 if ((csr & L1CSR1_ICE) == 0) { 475 icache_inval(); 476 icache_enable(); 477 } 478 479 csr = mfspr(SPR_L1CSR1); 480 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) 481 printf("L1 I-cache %sabled\n", 482 (csr & L1CSR1_ICE) ? "en" : "dis"); 483 484 debugf("e500_init: SP = 0x%08x\n", ((uintptr_t)thread0.td_pcb - 16) & ~15); 485 debugf("e500_init: e\n"); 486 487 return (((uintptr_t)thread0.td_pcb - 16) & ~15); 488} 489 490#define RES_GRANULE 32 491extern uint32_t tlb0_miss_locks[]; 492 493/* Initialise a struct pcpu. */ 494void 495cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) 496{ 497 498 pcpu->pc_tid_next = TID_MIN; 499 500#ifdef SMP 501 uint32_t *ptr; 502 int words_per_gran = RES_GRANULE / sizeof(uint32_t); 503 504 ptr = &tlb0_miss_locks[cpuid * words_per_gran]; 505 pcpu->pc_booke_tlb_lock = ptr; 506 *ptr = MTX_UNOWNED; 507 *(ptr + 1) = 0; /* recurse counter */ 508#endif 509} 510 511/* Set set up registers on exec. */ 512void 513exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings) 514{ 515 struct trapframe *tf; 516 struct ps_strings arginfo; 517 518 tf = trapframe(td); 519 bzero(tf, sizeof *tf); 520 tf->fixreg[1] = -roundup(-stack + 8, 16); 521 522 /* 523 * XXX Machine-independent code has already copied arguments and 524 * XXX environment to userland. Get them back here. 525 */ 526 (void)copyin((char *)PS_STRINGS, &arginfo, sizeof(arginfo)); 527 528 /* 529 * Set up arguments for _start(): 530 * _start(argc, argv, envp, obj, cleanup, ps_strings); 531 * 532 * Notes: 533 * - obj and cleanup are the auxilliary and termination 534 * vectors. They are fixed up by ld.elf_so. 535 * - ps_strings is a NetBSD extention, and will be 536 * ignored by executables which are strictly 537 * compliant with the SVR4 ABI. 538 * 539 * XXX We have to set both regs and retval here due to different 540 * XXX calling convention in trap.c and init_main.c. 541 */ 542 /* 543 * XXX PG: these get overwritten in the syscall return code. 544 * execve() should return EJUSTRETURN, like it does on NetBSD. 545 * Emulate by setting the syscall return value cells. The 546 * registers still have to be set for init's fork trampoline. 547 */ 548 td->td_retval[0] = arginfo.ps_nargvstr; 549 td->td_retval[1] = (register_t)arginfo.ps_argvstr; 550 tf->fixreg[3] = arginfo.ps_nargvstr; 551 tf->fixreg[4] = (register_t)arginfo.ps_argvstr; 552 tf->fixreg[5] = (register_t)arginfo.ps_envstr; 553 tf->fixreg[6] = 0; /* auxillary vector */ 554 tf->fixreg[7] = 0; /* termination vector */ 555 tf->fixreg[8] = (register_t)PS_STRINGS; /* NetBSD extension */ 556 557 tf->srr0 = entry; 558 tf->srr1 = PSL_USERSET; 559 td->td_pcb->pcb_flags = 0; 560} 561 562int 563fill_regs(struct thread *td, struct reg *regs) 564{ 565 struct trapframe *tf; 566 567 tf = td->td_frame; 568 memcpy(regs, tf, sizeof(struct reg)); 569 570 return (0); 571} 572 573int 574fill_fpregs(struct thread *td, struct fpreg *fpregs) 575{ 576 577 return (0); 578} 579 580/* 581 * Flush the D-cache for non-DMA I/O so that the I-cache can 582 * be made coherent later. 583 */ 584void 585cpu_flush_dcache(void *ptr, size_t len) 586{ 587 /* TBD */ 588} 589 590/* 591 * Construct a PCB from a trapframe. This is called from kdb_trap() where 592 * we want to start a backtrace from the function that caused us to enter 593 * the debugger. We have the context in the trapframe, but base the trace 594 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 595 * enough for a backtrace. 596 */ 597void 598makectx(struct trapframe *tf, struct pcb *pcb) 599{ 600 601 pcb->pcb_lr = tf->srr0; 602 pcb->pcb_sp = tf->fixreg[1]; 603} 604 605/* 606 * get_mcontext/sendsig helper routine that doesn't touch the 607 * proc lock. 608 */ 609static int 610grab_mcontext(struct thread *td, mcontext_t *mcp, int flags) 611{ 612 struct pcb *pcb; 613 614 pcb = td->td_pcb; 615 memset(mcp, 0, sizeof(mcontext_t)); 616 617 mcp->mc_vers = _MC_VERSION; 618 mcp->mc_flags = 0; 619 memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe)); 620 if (flags & GET_MC_CLEAR_RET) { 621 mcp->mc_gpr[3] = 0; 622 mcp->mc_gpr[4] = 0; 623 } 624 625 /* XXX Altivec context ? */ 626 627 mcp->mc_len = sizeof(*mcp); 628 return (0); 629} 630 631int 632get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 633{ 634 int error; 635 636 error = grab_mcontext(td, mcp, flags); 637 if (error == 0) { 638 PROC_LOCK(curthread->td_proc); 639 mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); 640 PROC_UNLOCK(curthread->td_proc); 641 } 642 643 return (error); 644} 645 646int 647set_mcontext(struct thread *td, const mcontext_t *mcp) 648{ 649 struct pcb *pcb; 650 struct trapframe *tf; 651 652 pcb = td->td_pcb; 653 tf = td->td_frame; 654 655 if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp)) 656 return (EINVAL); 657 658 memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame)); 659 660 /* XXX Altivec context? */ 661 662 return (0); 663} 664 665int 666sigreturn(struct thread *td, struct sigreturn_args *uap) 667{ 668 ucontext_t uc; 669 int error; 670 671 CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); 672 673 if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { 674 CTR1(KTR_SIG, "sigreturn: efault td=%p", td); 675 return (EFAULT); 676 } 677 678 error = set_mcontext(td, &uc.uc_mcontext); 679 if (error != 0) 680 return (error); 681 682 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 683 684 CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", 685 td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); 686 687 return (EJUSTRETURN); 688} 689 690#ifdef COMPAT_FREEBSD4 691int 692freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 693{ 694 695 return sigreturn(td, (struct sigreturn_args *)uap); 696} 697#endif 698 699/* 700 * cpu_idle 701 * 702 * Set Wait state enable. 703 */ 704void 705cpu_idle (int busy) 706{ 707 register_t msr; 708 709 msr = mfmsr(); 710#ifdef INVARIANTS 711 if ((msr & PSL_EE) != PSL_EE) { 712 struct thread *td = curthread; 713 printf("td msr %x\n", td->td_md.md_saved_msr); 714 panic("ints disabled in idleproc!"); 715 } 716#endif 717#if 0 718 /* 719 * Freescale E500 core RM section 6.4.1 720 */ 721 msr = msr | PSL_WE; 722 723 __asm__(" msync;" 724 " mtmsr %0;" 725 " isync;" 726 "loop: b loop" : 727 /* no output */ : 728 "r" (msr)); 729#endif 730} 731 732int 733cpu_idle_wakeup(int cpu) 734{ 735 736 return (0); 737} 738 739void 740spinlock_enter(void) 741{ 742 struct thread *td; 743 744 td = curthread; 745 if (td->td_md.md_spinlock_count == 0) 746 td->td_md.md_saved_msr = intr_disable(); 747 td->td_md.md_spinlock_count++; 748 critical_enter(); 749} 750 751void 752spinlock_exit(void) 753{ 754 struct thread *td; 755 756 td = curthread; 757 critical_exit(); 758 td->td_md.md_spinlock_count--; 759 if (td->td_md.md_spinlock_count == 0) 760 intr_restore(td->td_md.md_saved_msr); 761} 762 763/* Shutdown the CPU as much as possible. */ 764void 765cpu_halt(void) 766{ 767 768 mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE)); 769 while (1); 770} 771 772int 773set_regs(struct thread *td, struct reg *regs) 774{ 775 struct trapframe *tf; 776 777 tf = td->td_frame; 778 memcpy(tf, regs, sizeof(struct reg)); 779 return (0); 780} 781 782int 783fill_dbregs(struct thread *td, struct dbreg *dbregs) 784{ 785 786 /* No debug registers on PowerPC */ 787 return (ENOSYS); 788} 789 790int 791set_dbregs(struct thread *td, struct dbreg *dbregs) 792{ 793 794 /* No debug registers on PowerPC */ 795 return (ENOSYS); 796} 797 798int 799set_fpregs(struct thread *td, struct fpreg *fpregs) 800{ 801 802 return (0); 803} 804 805int 806ptrace_set_pc(struct thread *td, unsigned long addr) 807{ 808 struct trapframe *tf; 809 810 tf = td->td_frame; 811 tf->srr0 = (register_t)addr; 812 813 return (0); 814} 815 816int 817ptrace_single_step(struct thread *td) 818{ 819 struct trapframe *tf; 820 821 tf = td->td_frame; 822 tf->srr1 |= PSL_DE; 823 tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC); 824 return (0); 825} 826 827int 828ptrace_clear_single_step(struct thread *td) 829{ 830 struct trapframe *tf; 831 832 tf = td->td_frame; 833 tf->srr1 &= ~PSL_DE; 834 tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); 835 return (0); 836} 837 838void 839kdb_cpu_clear_singlestep(void) 840{ 841 register_t r; 842 843 r = mfspr(SPR_DBCR0); 844 mtspr(SPR_DBCR0, r & ~DBCR0_IC); 845 kdb_frame->srr1 &= ~PSL_DE; 846} 847 848void 849kdb_cpu_set_singlestep(void) 850{ 851 register_t r; 852 853 r = mfspr(SPR_DBCR0); 854 mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM); 855 kdb_frame->srr1 |= PSL_DE; 856} 857 858void 859sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 860{ 861 struct trapframe *tf; 862 struct sigframe *sfp; 863 struct sigacts *psp; 864 struct sigframe sf; 865 struct thread *td; 866 struct proc *p; 867 int oonstack, rndfsize; 868 int sig, code; 869 870 td = curthread; 871 p = td->td_proc; 872 PROC_LOCK_ASSERT(p, MA_OWNED); 873 sig = ksi->ksi_signo; 874 code = ksi->ksi_code; 875 psp = p->p_sigacts; 876 mtx_assert(&psp->ps_mtx, MA_OWNED); 877 tf = td->td_frame; 878 oonstack = sigonstack(tf->fixreg[1]); 879 880 rndfsize = ((sizeof(sf) + 15) / 16) * 16; 881 882 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 883 catcher, sig); 884 885 /* 886 * Save user context 887 */ 888 memset(&sf, 0, sizeof(sf)); 889 grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 890 sf.sf_uc.uc_sigmask = *mask; 891 sf.sf_uc.uc_stack = td->td_sigstk; 892 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 893 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 894 895 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 896 897 /* 898 * Allocate and validate space for the signal handler context. 899 */ 900 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 901 SIGISMEMBER(psp->ps_sigonstack, sig)) { 902 sfp = (struct sigframe *)((caddr_t)td->td_sigstk.ss_sp + 903 td->td_sigstk.ss_size - rndfsize); 904 } else { 905 sfp = (struct sigframe *)(tf->fixreg[1] - rndfsize); 906 } 907 908 /* 909 * Translate the signal if appropriate (Linux emu ?) 910 */ 911 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 912 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 913 914 /* 915 * Save the floating-point state, if necessary, then copy it. 916 */ 917 /* XXX */ 918 919 /* 920 * Set up the registers to return to sigcode. 921 * 922 * r1/sp - sigframe ptr 923 * lr - sig function, dispatched to by blrl in trampoline 924 * r3 - sig number 925 * r4 - SIGINFO ? &siginfo : exception code 926 * r5 - user context 927 * srr0 - trampoline function addr 928 */ 929 tf->lr = (register_t)catcher; 930 tf->fixreg[1] = (register_t)sfp; 931 tf->fixreg[FIRSTARG] = sig; 932 tf->fixreg[FIRSTARG+2] = (register_t)&sfp->sf_uc; 933 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 934 /* 935 * Signal handler installed with SA_SIGINFO. 936 */ 937 tf->fixreg[FIRSTARG+1] = (register_t)&sfp->sf_si; 938 939 /* 940 * Fill siginfo structure. 941 */ 942 sf.sf_si = ksi->ksi_info; 943 sf.sf_si.si_signo = sig; 944 sf.sf_si.si_addr = (void *) ((tf->exc == EXC_DSI) ? 945 tf->cpu.booke.dear : tf->srr0); 946 } else { 947 /* Old FreeBSD-style arguments. */ 948 tf->fixreg[FIRSTARG+1] = code; 949 tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ? 950 tf->cpu.booke.dear : tf->srr0; 951 } 952 mtx_unlock(&psp->ps_mtx); 953 PROC_UNLOCK(p); 954 955 tf->srr0 = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 956 957 /* 958 * copy the frame out to userland. 959 */ 960 if (copyout((caddr_t)&sf, (caddr_t)sfp, sizeof(sf)) != 0) { 961 /* 962 * Process has trashed its stack. Kill it. 963 */ 964 CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp); 965 PROC_LOCK(p); 966 sigexit(td, SIGILL); 967 } 968 969 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, 970 tf->srr0, tf->fixreg[1]); 971 972 PROC_LOCK(p); 973 mtx_lock(&psp->ps_mtx); 974} 975 976void 977bzero(void *buf, size_t len) 978{ 979 caddr_t p; 980 981 p = buf; 982 983 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { 984 *p++ = 0; 985 len--; 986 } 987 988 while (len >= sizeof(u_long) * 8) { 989 *(u_long*) p = 0; 990 *((u_long*) p + 1) = 0; 991 *((u_long*) p + 2) = 0; 992 *((u_long*) p + 3) = 0; 993 len -= sizeof(u_long) * 8; 994 *((u_long*) p + 4) = 0; 995 *((u_long*) p + 5) = 0; 996 *((u_long*) p + 6) = 0; 997 *((u_long*) p + 7) = 0; 998 p += sizeof(u_long) * 8; 999 } 1000 1001 while (len >= sizeof(u_long)) { 1002 *(u_long*) p = 0; 1003 len -= sizeof(u_long); 1004 p += sizeof(u_long); 1005 } 1006 1007 while (len) { 1008 *p++ = 0; 1009 len--; 1010 } 1011} 1012 1013/* 1014 * XXX what is the better/proper place for this routine? 1015 */ 1016int 1017mem_valid(vm_offset_t addr, int len) 1018{ 1019 1020 return (1); 1021} 1022