pci.h revision 307011
1/*- 2 * Copyright (c) 2010 Isilon Systems, Inc. 3 * Copyright (c) 2010 iX Systems, Inc. 4 * Copyright (c) 2010 Panasas, Inc. 5 * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#ifndef _LINUX_PCI_H_ 31#define _LINUX_PCI_H_ 32 33#define CONFIG_PCI_MSI 34 35#include <linux/types.h> 36 37#include <sys/param.h> 38#include <sys/bus.h> 39#include <sys/pciio.h> 40#include <sys/rman.h> 41#include <dev/pci/pcivar.h> 42#include <dev/pci/pcireg.h> 43#include <dev/pci/pci_private.h> 44 45#include <machine/resource.h> 46 47#include <linux/list.h> 48#include <linux/dmapool.h> 49#include <linux/dma-mapping.h> 50#include <linux/compiler.h> 51#include <linux/errno.h> 52#include <asm/atomic.h> 53#include <linux/device.h> 54 55struct pci_device_id { 56 uint32_t vendor; 57 uint32_t device; 58 uint32_t subvendor; 59 uint32_t subdevice; 60 uint32_t class_mask; 61 uintptr_t driver_data; 62}; 63 64#define MODULE_DEVICE_TABLE(bus, table) 65#define PCI_ANY_ID (-1) 66#define PCI_VENDOR_ID_MELLANOX 0x15b3 67#define PCI_VENDOR_ID_TOPSPIN 0x1867 68#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 69#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 70#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 71#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 72#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 73#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 74 75#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 76#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 77#define PCI_FUNC(devfn) ((devfn) & 0x07) 78 79#define PCI_VDEVICE(_vendor, _device) \ 80 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \ 81 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 82#define PCI_DEVICE(_vendor, _device) \ 83 .vendor = (_vendor), .device = (_device), \ 84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 85 86#define to_pci_dev(n) container_of(n, struct pci_dev, dev) 87 88#define PCI_VENDOR_ID PCIR_DEVVENDOR 89#define PCI_COMMAND PCIR_COMMAND 90#define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */ 91#define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */ 92#define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */ 93#define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */ 94#define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */ 95#define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */ 96#define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */ 97#define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */ 98#define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */ 99#define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */ 100#define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */ 101#define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */ 102#define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */ 103#define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */ 104#define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */ 105#define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */ 106#define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */ 107#define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */ 108#define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */ 109#define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */ 110#define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */ 111#define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */ 112#define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */ 113#define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */ 114#define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */ 115#define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */ 116 117 118#define IORESOURCE_MEM (1 << SYS_RES_MEMORY) 119#define IORESOURCE_IO (1 << SYS_RES_IOPORT) 120#define IORESOURCE_IRQ (1 << SYS_RES_IRQ) 121 122struct pci_dev; 123 124 125struct pci_driver { 126 struct list_head links; 127 char *name; 128 const struct pci_device_id *id_table; 129 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); 130 void (*remove)(struct pci_dev *dev); 131 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 132 int (*resume) (struct pci_dev *dev); /* Device woken up */ 133 driver_t driver; 134 devclass_t bsdclass; 135 const struct pci_error_handlers *err_handler; 136}; 137 138extern struct list_head pci_drivers; 139extern struct list_head pci_devices; 140extern spinlock_t pci_lock; 141 142#define __devexit_p(x) x 143 144struct pci_dev { 145 struct device dev; 146 struct list_head links; 147 struct pci_driver *pdrv; 148 uint64_t dma_mask; 149 uint16_t device; 150 uint16_t vendor; 151 unsigned int irq; 152 unsigned int devfn; 153 u8 revision; 154}; 155 156static inline struct resource_list_entry * 157_pci_get_rle(struct pci_dev *pdev, int type, int rid) 158{ 159 struct pci_devinfo *dinfo; 160 struct resource_list *rl; 161 162 dinfo = device_get_ivars(pdev->dev.bsddev); 163 rl = &dinfo->resources; 164 return resource_list_find(rl, type, rid); 165} 166 167static inline struct resource_list_entry * 168_pci_get_bar(struct pci_dev *pdev, int bar) 169{ 170 struct resource_list_entry *rle; 171 172 bar = PCIR_BAR(bar); 173 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL) 174 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar); 175 return (rle); 176} 177 178static inline struct device * 179_pci_find_irq_dev(unsigned int irq) 180{ 181 struct pci_dev *pdev; 182 183 spin_lock(&pci_lock); 184 list_for_each_entry(pdev, &pci_devices, links) { 185 if (irq == pdev->dev.irq) 186 break; 187 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max) 188 break; 189 } 190 spin_unlock(&pci_lock); 191 if (pdev) 192 return &pdev->dev; 193 return (NULL); 194} 195 196static inline unsigned long 197pci_resource_start(struct pci_dev *pdev, int bar) 198{ 199 struct resource_list_entry *rle; 200 201 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 202 return (0); 203 return rle->start; 204} 205 206static inline unsigned long 207pci_resource_len(struct pci_dev *pdev, int bar) 208{ 209 struct resource_list_entry *rle; 210 211 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 212 return (0); 213 return rle->count; 214} 215 216static inline int 217pci_resource_type(struct pci_dev *pdev, int bar) 218{ 219 struct pci_map *pm; 220 221 pm = pci_find_bar(pdev->dev.bsddev, PCIR_BAR(bar)); 222 if (!pm) 223 return (-1); 224 225 if (PCI_BAR_IO(pm->pm_value)) 226 return (SYS_RES_IOPORT); 227 else 228 return (SYS_RES_MEMORY); 229} 230 231/* 232 * All drivers just seem to want to inspect the type not flags. 233 */ 234static inline int 235pci_resource_flags(struct pci_dev *pdev, int bar) 236{ 237 int type; 238 239 type = pci_resource_type(pdev, bar); 240 if (type < 0) 241 return (0); 242 return (1 << type); 243} 244 245static inline const char * 246pci_name(struct pci_dev *d) 247{ 248 249 return device_get_desc(d->dev.bsddev); 250} 251 252static inline void * 253pci_get_drvdata(struct pci_dev *pdev) 254{ 255 256 return dev_get_drvdata(&pdev->dev); 257} 258 259static inline void 260pci_set_drvdata(struct pci_dev *pdev, void *data) 261{ 262 263 dev_set_drvdata(&pdev->dev, data); 264} 265 266static inline int 267pci_enable_device(struct pci_dev *pdev) 268{ 269 270 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT); 271 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY); 272 return (0); 273} 274 275static inline void 276pci_disable_device(struct pci_dev *pdev) 277{ 278} 279 280static inline int 281pci_set_master(struct pci_dev *pdev) 282{ 283 284 pci_enable_busmaster(pdev->dev.bsddev); 285 return (0); 286} 287 288static inline int 289pci_clear_master(struct pci_dev *pdev) 290{ 291 292 pci_disable_busmaster(pdev->dev.bsddev); 293 return (0); 294} 295 296static inline int 297pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) 298{ 299 int rid; 300 int type; 301 302 type = pci_resource_type(pdev, bar); 303 if (type < 0) 304 return (-ENODEV); 305 rid = PCIR_BAR(bar); 306 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid, 307 RF_ACTIVE) == NULL) 308 return (-EINVAL); 309 return (0); 310} 311 312static inline void 313pci_release_region(struct pci_dev *pdev, int bar) 314{ 315 struct resource_list_entry *rle; 316 317 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 318 return; 319 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res); 320} 321 322static inline void 323pci_release_regions(struct pci_dev *pdev) 324{ 325 int i; 326 327 for (i = 0; i <= PCIR_MAX_BAR_0; i++) 328 pci_release_region(pdev, i); 329} 330 331static inline int 332pci_request_regions(struct pci_dev *pdev, const char *res_name) 333{ 334 int error; 335 int i; 336 337 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 338 error = pci_request_region(pdev, i, res_name); 339 if (error && error != -ENODEV) { 340 pci_release_regions(pdev); 341 return (error); 342 } 343 } 344 return (0); 345} 346 347static inline void 348pci_disable_msix(struct pci_dev *pdev) 349{ 350 351 pci_release_msi(pdev->dev.bsddev); 352} 353 354#define PCI_CAP_ID_EXP PCIY_EXPRESS 355#define PCI_CAP_ID_PCIX PCIY_PCIX 356 357 358static inline int 359pci_find_capability(struct pci_dev *pdev, int capid) 360{ 361 int reg; 362 363 if (pci_find_cap(pdev->dev.bsddev, capid, ®)) 364 return (0); 365 return (reg); 366} 367 368 369 370 371/** 372 * pci_pcie_cap - get the saved PCIe capability offset 373 * @dev: PCI device 374 * 375 * PCIe capability offset is calculated at PCI device initialization 376 * time and saved in the data structure. This function returns saved 377 * PCIe capability offset. Using this instead of pci_find_capability() 378 * reduces unnecessary search in the PCI configuration space. If you 379 * need to calculate PCIe capability offset from raw device for some 380 * reasons, please use pci_find_capability() instead. 381 */ 382static inline int pci_pcie_cap(struct pci_dev *dev) 383{ 384 return pci_find_capability(dev, PCI_CAP_ID_EXP); 385} 386 387 388static inline int 389pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 390{ 391 392 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 393 return (0); 394} 395 396static inline int 397pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 398{ 399 400 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 401 return (0); 402} 403 404static inline int 405pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 406{ 407 408 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 409 return (0); 410} 411 412static inline int 413pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 414{ 415 416 pci_write_config(pdev->dev.bsddev, where, val, 1); 417 return (0); 418} 419 420static inline int 421pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 422{ 423 424 pci_write_config(pdev->dev.bsddev, where, val, 2); 425 return (0); 426} 427 428static inline int 429pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 430{ 431 432 pci_write_config(pdev->dev.bsddev, where, val, 4); 433 return (0); 434} 435 436static struct pci_driver * 437linux_pci_find(device_t dev, const struct pci_device_id **idp) 438{ 439 const struct pci_device_id *id; 440 struct pci_driver *pdrv; 441 uint16_t vendor; 442 uint16_t device; 443 444 vendor = pci_get_vendor(dev); 445 device = pci_get_device(dev); 446 447 spin_lock(&pci_lock); 448 list_for_each_entry(pdrv, &pci_drivers, links) { 449 for (id = pdrv->id_table; id->vendor != 0; id++) { 450 if (vendor == id->vendor && device == id->device) { 451 *idp = id; 452 spin_unlock(&pci_lock); 453 return (pdrv); 454 } 455 } 456 } 457 spin_unlock(&pci_lock); 458 return (NULL); 459} 460 461static inline int 462linux_pci_probe(device_t dev) 463{ 464 const struct pci_device_id *id; 465 struct pci_driver *pdrv; 466 467 if ((pdrv = linux_pci_find(dev, &id)) == NULL) 468 return (ENXIO); 469 if (device_get_driver(dev) != &pdrv->driver) 470 return (ENXIO); 471 device_set_desc(dev, pdrv->name); 472 return (0); 473} 474 475static inline int 476linux_pci_attach(device_t dev) 477{ 478 struct resource_list_entry *rle; 479 struct pci_dev *pdev; 480 struct pci_driver *pdrv; 481 const struct pci_device_id *id; 482 int error; 483 484 pdrv = linux_pci_find(dev, &id); 485 pdev = device_get_softc(dev); 486 pdev->dev.parent = &linux_rootdev; 487 pdev->dev.bsddev = dev; 488 INIT_LIST_HEAD(&pdev->dev.irqents); 489 pdev->device = id->device; 490 pdev->vendor = id->vendor; 491 pdev->dev.dma_mask = &pdev->dma_mask; 492 pdev->pdrv = pdrv; 493 kobject_init(&pdev->dev.kobj, &dev_ktype); 494 kobject_set_name(&pdev->dev.kobj, device_get_nameunit(dev)); 495 kobject_add(&pdev->dev.kobj, &linux_rootdev.kobj, 496 kobject_name(&pdev->dev.kobj)); 497 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 0); 498 if (rle) 499 pdev->dev.irq = rle->start; 500 else 501 pdev->dev.irq = 0; 502 pdev->irq = pdev->dev.irq; 503 mtx_unlock(&Giant); 504 spin_lock(&pci_lock); 505 list_add(&pdev->links, &pci_devices); 506 spin_unlock(&pci_lock); 507 error = pdrv->probe(pdev, id); 508 mtx_lock(&Giant); 509 if (error) { 510 spin_lock(&pci_lock); 511 list_del(&pdev->links); 512 spin_unlock(&pci_lock); 513 put_device(&pdev->dev); 514 return (-error); 515 } 516 return (0); 517} 518 519static inline int 520linux_pci_detach(device_t dev) 521{ 522 struct pci_dev *pdev; 523 524 pdev = device_get_softc(dev); 525 mtx_unlock(&Giant); 526 pdev->pdrv->remove(pdev); 527 mtx_lock(&Giant); 528 spin_lock(&pci_lock); 529 list_del(&pdev->links); 530 spin_unlock(&pci_lock); 531 put_device(&pdev->dev); 532 533 return (0); 534} 535 536static device_method_t pci_methods[] = { 537 DEVMETHOD(device_probe, linux_pci_probe), 538 DEVMETHOD(device_attach, linux_pci_attach), 539 DEVMETHOD(device_detach, linux_pci_detach), 540 {0, 0} 541}; 542 543static inline int 544pci_register_driver(struct pci_driver *pdrv) 545{ 546 devclass_t bus; 547 int error; 548 549 spin_lock(&pci_lock); 550 list_add(&pdrv->links, &pci_drivers); 551 spin_unlock(&pci_lock); 552 bus = devclass_find("pci"); 553 pdrv->driver.name = pdrv->name; 554 pdrv->driver.methods = pci_methods; 555 pdrv->driver.size = sizeof(struct pci_dev); 556 mtx_lock(&Giant); 557 error = devclass_add_driver(bus, &pdrv->driver, BUS_PASS_DEFAULT, 558 &pdrv->bsdclass); 559 mtx_unlock(&Giant); 560 if (error) 561 return (-error); 562 return (0); 563} 564 565static inline void 566pci_unregister_driver(struct pci_driver *pdrv) 567{ 568 devclass_t bus; 569 570 list_del(&pdrv->links); 571 bus = devclass_find("pci"); 572 mtx_lock(&Giant); 573 devclass_delete_driver(bus, &pdrv->driver); 574 mtx_unlock(&Giant); 575} 576 577struct msix_entry { 578 int entry; 579 int vector; 580}; 581 582/* 583 * Enable msix, positive errors indicate actual number of available 584 * vectors. Negative errors are failures. 585 * 586 * NB: define added to prevent this definition of pci_enable_msix from 587 * clashing with the native FreeBSD version. 588 */ 589#define pci_enable_msix linux_pci_enable_msix 590static inline int 591pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq) 592{ 593 struct resource_list_entry *rle; 594 int error; 595 int avail; 596 int i; 597 598 avail = pci_msix_count(pdev->dev.bsddev); 599 if (avail < nreq) { 600 if (avail == 0) 601 return -EINVAL; 602 return avail; 603 } 604 avail = nreq; 605 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0) 606 return error; 607 /* 608 * Handle case where "pci_alloc_msix()" may allocate less 609 * interrupts than available and return with no error: 610 */ 611 if (avail < nreq) { 612 pci_release_msi(pdev->dev.bsddev); 613 return avail; 614 } 615 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1); 616 pdev->dev.msix = rle->start; 617 pdev->dev.msix_max = rle->start + avail; 618 for (i = 0; i < nreq; i++) 619 entries[i].vector = pdev->dev.msix + i; 620 return (0); 621} 622 623#define pci_enable_msix_range linux_pci_enable_msix_range 624static inline int 625pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, 626 int minvec, int maxvec) 627{ 628 int nvec = maxvec; 629 int rc; 630 631 if (maxvec < minvec) 632 return (-ERANGE); 633 634 do { 635 rc = pci_enable_msix(dev, entries, nvec); 636 if (rc < 0) { 637 return (rc); 638 } else if (rc > 0) { 639 if (rc < minvec) 640 return (-ENOSPC); 641 nvec = rc; 642 } 643 } while (rc); 644 return (nvec); 645} 646 647static inline int pci_channel_offline(struct pci_dev *pdev) 648{ 649 return false; 650} 651 652static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 653{ 654 return -ENODEV; 655} 656static inline void pci_disable_sriov(struct pci_dev *dev) 657{ 658} 659 660/** 661 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 662 * @_table: device table name 663 * 664 * This macro is used to create a struct pci_device_id array (a device table) 665 * in a generic manner. 666 */ 667#define DEFINE_PCI_DEVICE_TABLE(_table) \ 668 const struct pci_device_id _table[] __devinitdata 669 670 671/* XXX This should not be necessary. */ 672#define pcix_set_mmrbc(d, v) 0 673#define pcix_get_max_mmrbc(d) 0 674#define pcie_set_readrq(d, v) 0 675 676#define PCI_DMA_BIDIRECTIONAL 0 677#define PCI_DMA_TODEVICE 1 678#define PCI_DMA_FROMDEVICE 2 679#define PCI_DMA_NONE 3 680 681#define pci_pool dma_pool 682#define pci_pool_destroy dma_pool_destroy 683#define pci_pool_alloc dma_pool_alloc 684#define pci_pool_free dma_pool_free 685#define pci_pool_create(_name, _pdev, _size, _align, _alloc) \ 686 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc) 687#define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \ 688 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 689 _size, _vaddr, _dma_handle) 690#define pci_map_sg(_hwdev, _sg, _nents, _dir) \ 691 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 692 _sg, _nents, (enum dma_data_direction)_dir) 693#define pci_map_single(_hwdev, _ptr, _size, _dir) \ 694 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 695 (_ptr), (_size), (enum dma_data_direction)_dir) 696#define pci_unmap_single(_hwdev, _addr, _size, _dir) \ 697 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 698 _addr, _size, (enum dma_data_direction)_dir) 699#define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \ 700 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 701 _sg, _nents, (enum dma_data_direction)_dir) 702#define pci_map_page(_hwdev, _page, _offset, _size, _dir) \ 703 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\ 704 _offset, _size, (enum dma_data_direction)_dir) 705#define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \ 706 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 707 _dma_address, _size, (enum dma_data_direction)_dir) 708#define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask)) 709#define pci_dma_mapping_error(_pdev, _dma_addr) \ 710 dma_mapping_error(&(_pdev)->dev, _dma_addr) 711#define pci_set_consistent_dma_mask(_pdev, _mask) \ 712 dma_set_coherent_mask(&(_pdev)->dev, (_mask)) 713#define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x); 714#define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x); 715#define pci_unmap_addr dma_unmap_addr 716#define pci_unmap_addr_set dma_unmap_addr_set 717#define pci_unmap_len dma_unmap_len 718#define pci_unmap_len_set dma_unmap_len_set 719 720typedef unsigned int __bitwise pci_channel_state_t; 721typedef unsigned int __bitwise pci_ers_result_t; 722 723enum pci_channel_state { 724 /* I/O channel is in normal state */ 725 pci_channel_io_normal = (__force pci_channel_state_t) 1, 726 727 /* I/O to channel is blocked */ 728 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 729 730 /* PCI card is dead */ 731 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 732}; 733 734enum pci_ers_result { 735 /* no result/none/not supported in device driver */ 736 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 737 738 /* Device driver can recover without slot reset */ 739 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 740 741 /* Device driver wants slot to be reset. */ 742 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 743 744 /* Device has completely failed, is unrecoverable */ 745 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 746 747 /* Device driver is fully recovered and operational */ 748 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 749}; 750 751 752/* PCI bus error event callbacks */ 753struct pci_error_handlers { 754 /* PCI bus error detected on this device */ 755 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 756 enum pci_channel_state error); 757 758 /* MMIO has been re-enabled, but not DMA */ 759 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 760 761 /* PCI Express link has been reset */ 762 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 763 764 /* PCI slot has been reset */ 765 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 766 767 /* Device driver may resume normal operations */ 768 void (*resume)(struct pci_dev *dev); 769}; 770 771/* freeBSD does not support SRIOV - yet */ 772static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 773{ 774 return dev; 775} 776 777static inline bool pci_is_pcie(struct pci_dev *dev) 778{ 779 return !!pci_pcie_cap(dev); 780} 781 782static inline u16 pcie_flags_reg(struct pci_dev *dev) 783{ 784 int pos; 785 u16 reg16; 786 787 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 788 if (!pos) 789 return 0; 790 791 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); 792 793 return reg16; 794} 795 796 797static inline int pci_pcie_type(struct pci_dev *dev) 798{ 799 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; 800} 801 802static inline int pcie_cap_version(struct pci_dev *dev) 803{ 804 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS; 805} 806 807static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev) 808{ 809 int type = pci_pcie_type(dev); 810 811 return pcie_cap_version(dev) > 1 || 812 type == PCI_EXP_TYPE_ROOT_PORT || 813 type == PCI_EXP_TYPE_ENDPOINT || 814 type == PCI_EXP_TYPE_LEG_END; 815} 816 817static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) 818{ 819 return true; 820} 821 822static inline bool pcie_cap_has_sltctl(struct pci_dev *dev) 823{ 824 int type = pci_pcie_type(dev); 825 826 return pcie_cap_version(dev) > 1 || 827 type == PCI_EXP_TYPE_ROOT_PORT || 828 (type == PCI_EXP_TYPE_DOWNSTREAM && 829 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT); 830} 831 832static inline bool pcie_cap_has_rtctl(struct pci_dev *dev) 833{ 834 int type = pci_pcie_type(dev); 835 836 return pcie_cap_version(dev) > 1 || 837 type == PCI_EXP_TYPE_ROOT_PORT || 838 type == PCI_EXP_TYPE_RC_EC; 839} 840 841static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos) 842{ 843 if (!pci_is_pcie(dev)) 844 return false; 845 846 switch (pos) { 847 case PCI_EXP_FLAGS_TYPE: 848 return true; 849 case PCI_EXP_DEVCAP: 850 case PCI_EXP_DEVCTL: 851 case PCI_EXP_DEVSTA: 852 return pcie_cap_has_devctl(dev); 853 case PCI_EXP_LNKCAP: 854 case PCI_EXP_LNKCTL: 855 case PCI_EXP_LNKSTA: 856 return pcie_cap_has_lnkctl(dev); 857 case PCI_EXP_SLTCAP: 858 case PCI_EXP_SLTCTL: 859 case PCI_EXP_SLTSTA: 860 return pcie_cap_has_sltctl(dev); 861 case PCI_EXP_RTCTL: 862 case PCI_EXP_RTCAP: 863 case PCI_EXP_RTSTA: 864 return pcie_cap_has_rtctl(dev); 865 case PCI_EXP_DEVCAP2: 866 case PCI_EXP_DEVCTL2: 867 case PCI_EXP_LNKCAP2: 868 case PCI_EXP_LNKCTL2: 869 case PCI_EXP_LNKSTA2: 870 return pcie_cap_version(dev) > 1; 871 default: 872 return false; 873 } 874} 875 876 877static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) 878{ 879 if (pos & 1) 880 return -EINVAL; 881 882 if (!pcie_capability_reg_implemented(dev, pos)) 883 return 0; 884 885 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); 886} 887 888 889#endif /* _LINUX_PCI_H_ */ 890