1219820Sjeff/* 2219820Sjeff * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3219820Sjeff * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4219820Sjeff * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved. 5272407Shselasky * Copyright (c) 2005, 2006, 2007, 2008, 2014 Mellanox Technologies. All rights reserved. 6219820Sjeff * Copyright (c) 2004 Voltaire, Inc. All rights reserved. 7219820Sjeff * 8219820Sjeff * This software is available to you under a choice of one of two 9219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 10219820Sjeff * General Public License (GPL) Version 2, available from the file 11219820Sjeff * COPYING in the main directory of this source tree, or the 12219820Sjeff * OpenIB.org BSD license below: 13219820Sjeff * 14219820Sjeff * Redistribution and use in source and binary forms, with or 15219820Sjeff * without modification, are permitted provided that the following 16219820Sjeff * conditions are met: 17219820Sjeff * 18219820Sjeff * - Redistributions of source code must retain the above 19219820Sjeff * copyright notice, this list of conditions and the following 20219820Sjeff * disclaimer. 21219820Sjeff * 22219820Sjeff * - Redistributions in binary form must reproduce the above 23219820Sjeff * copyright notice, this list of conditions and the following 24219820Sjeff * disclaimer in the documentation and/or other materials 25219820Sjeff * provided with the distribution. 26219820Sjeff * 27219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 28219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 29219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 30219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 31219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 32219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 33219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 34219820Sjeff * SOFTWARE. 35219820Sjeff */ 36219820Sjeff 37219820Sjeff#ifndef MLX4_H 38219820Sjeff#define MLX4_H 39219820Sjeff 40219820Sjeff#include <linux/mutex.h> 41219820Sjeff#include <linux/radix-tree.h> 42255932Salfred#include <linux/rbtree.h> 43219820Sjeff#include <linux/timer.h> 44255932Salfred#include <linux/semaphore.h> 45219820Sjeff#include <linux/workqueue.h> 46272407Shselasky#include <linux/device.h> 47339086Shselasky#include <linux/rwsem.h> 48219820Sjeff#include <linux/mlx4/device.h> 49219820Sjeff#include <linux/mlx4/driver.h> 50219820Sjeff#include <linux/mlx4/doorbell.h> 51255932Salfred#include <linux/mlx4/cmd.h> 52219820Sjeff 53219820Sjeff#define DRV_NAME "mlx4_core" 54219820Sjeff#define PFX DRV_NAME ": " 55292107Shselasky#define DRV_VERSION "2.1.6" 56272407Shselasky#define DRV_RELDATE __DATE__ 57219820Sjeff 58272407Shselasky#define DRV_STACK_NAME "Linux-MLNX_OFED" 59272407Shselasky#define DRV_STACK_VERSION "2.1" 60272407Shselasky#define DRV_NAME_FOR_FW DRV_STACK_NAME","DRV_STACK_VERSION 61272407Shselasky 62255932Salfred#define MLX4_FS_UDP_UC_EN (1 << 1) 63255932Salfred#define MLX4_FS_TCP_UC_EN (1 << 2) 64255932Salfred#define MLX4_FS_NUM_OF_L2_ADDR 8 65255932Salfred#define MLX4_FS_MGM_LOG_ENTRY_SIZE 7 66255932Salfred#define MLX4_FS_NUM_MCG (1 << 17) 67255932Salfred 68255932Salfredstruct mlx4_set_port_prio2tc_context { 69255932Salfred u8 prio2tc[4]; 70255932Salfred}; 71255932Salfred 72255932Salfredstruct mlx4_port_scheduler_tc_cfg_be { 73255932Salfred __be16 pg; 74255932Salfred __be16 bw_precentage; 75255932Salfred __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */ 76255932Salfred __be16 max_bw_value; 77255932Salfred}; 78255932Salfred 79255932Salfredstruct mlx4_set_port_scheduler_context { 80255932Salfred struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC]; 81255932Salfred}; 82255932Salfred 83219820Sjeffenum { 84219820Sjeff MLX4_HCR_BASE = 0x80680, 85219820Sjeff MLX4_HCR_SIZE = 0x0001c, 86255932Salfred MLX4_CLR_INT_SIZE = 0x00008, 87255932Salfred MLX4_SLAVE_COMM_BASE = 0x0, 88255932Salfred MLX4_COMM_PAGESIZE = 0x1000, 89255932Salfred MLX4_CLOCK_SIZE = 0x00008 90219820Sjeff}; 91219820Sjeff 92219820Sjeffenum { 93255932Salfred MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE = 10, 94255932Salfred MLX4_MIN_MGM_LOG_ENTRY_SIZE = 7, 95255932Salfred MLX4_MAX_MGM_LOG_ENTRY_SIZE = 12, 96255932Salfred MLX4_MAX_QP_PER_MGM = 4 * ((1 << MLX4_MAX_MGM_LOG_ENTRY_SIZE)/16 - 2), 97219820Sjeff}; 98219820Sjeff 99219820Sjeffenum { 100219820Sjeff MLX4_NUM_PDS = 1 << 15 101219820Sjeff}; 102219820Sjeff 103219820Sjeffenum { 104219820Sjeff MLX4_CMPT_TYPE_QP = 0, 105219820Sjeff MLX4_CMPT_TYPE_SRQ = 1, 106219820Sjeff MLX4_CMPT_TYPE_CQ = 2, 107219820Sjeff MLX4_CMPT_TYPE_EQ = 3, 108219820Sjeff MLX4_CMPT_NUM_TYPE 109219820Sjeff}; 110219820Sjeff 111219820Sjeffenum { 112219820Sjeff MLX4_CMPT_SHIFT = 24, 113219820Sjeff MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT 114219820Sjeff}; 115219820Sjeff 116272407Shselaskyenum mlx4_mpt_state { 117272407Shselasky MLX4_MPT_DISABLED = 0, 118272407Shselasky MLX4_MPT_EN_HW, 119272407Shselasky MLX4_MPT_EN_SW 120255932Salfred}; 121255932Salfred 122255932Salfred#define MLX4_COMM_TIME 10000 123255932Salfredenum { 124255932Salfred MLX4_COMM_CMD_RESET, 125255932Salfred MLX4_COMM_CMD_VHCR0, 126255932Salfred MLX4_COMM_CMD_VHCR1, 127255932Salfred MLX4_COMM_CMD_VHCR2, 128255932Salfred MLX4_COMM_CMD_VHCR_EN, 129255932Salfred MLX4_COMM_CMD_VHCR_POST, 130255932Salfred MLX4_COMM_CMD_FLR = 254 131255932Salfred}; 132255932Salfred 133255932Salfred/*The flag indicates that the slave should delay the RESET cmd*/ 134255932Salfred#define MLX4_DELAY_RESET_SLAVE 0xbbbbbbb 135255932Salfred/*indicates how many retries will be done if we are in the middle of FLR*/ 136255932Salfred#define NUM_OF_RESET_RETRIES 10 137255932Salfred#define SLEEP_TIME_IN_RESET (2 * 1000) 138255932Salfredenum mlx4_resource { 139255932Salfred RES_QP, 140255932Salfred RES_CQ, 141255932Salfred RES_SRQ, 142255932Salfred RES_XRCD, 143255932Salfred RES_MPT, 144255932Salfred RES_MTT, 145255932Salfred RES_MAC, 146255932Salfred RES_VLAN, 147272407Shselasky RES_NPORT_ID, 148255932Salfred RES_COUNTER, 149255932Salfred RES_FS_RULE, 150272407Shselasky RES_EQ, 151255932Salfred MLX4_NUM_OF_RESOURCE_TYPE 152255932Salfred}; 153255932Salfred 154255932Salfredenum mlx4_alloc_mode { 155255932Salfred RES_OP_RESERVE, 156255932Salfred RES_OP_RESERVE_AND_MAP, 157255932Salfred RES_OP_MAP_ICM, 158255932Salfred}; 159255932Salfred 160255932Salfredenum mlx4_res_tracker_free_type { 161255932Salfred RES_TR_FREE_ALL, 162255932Salfred RES_TR_FREE_SLAVES_ONLY, 163255932Salfred RES_TR_FREE_STRUCTS_ONLY, 164255932Salfred}; 165255932Salfred 166255932Salfred/* 167255932Salfred *Virtual HCR structures. 168255932Salfred * mlx4_vhcr is the sw representation, in machine endianess 169255932Salfred * 170255932Salfred * mlx4_vhcr_cmd is the formalized structure, the one that is passed 171255932Salfred * to FW to go through communication channel. 172255932Salfred * It is big endian, and has the same structure as the physical HCR 173255932Salfred * used by command interface 174255932Salfred */ 175255932Salfredstruct mlx4_vhcr { 176255932Salfred u64 in_param; 177255932Salfred u64 out_param; 178255932Salfred u32 in_modifier; 179255932Salfred u32 errno; 180255932Salfred u16 op; 181255932Salfred u16 token; 182255932Salfred u8 op_modifier; 183255932Salfred u8 e_bit; 184255932Salfred}; 185255932Salfred 186255932Salfredstruct mlx4_vhcr_cmd { 187255932Salfred __be64 in_param; 188255932Salfred __be32 in_modifier; 189272407Shselasky u32 reserved1; 190255932Salfred __be64 out_param; 191255932Salfred __be16 token; 192255932Salfred u16 reserved; 193255932Salfred u8 status; 194255932Salfred u8 flags; 195255932Salfred __be16 opcode; 196272407Shselasky} __packed; 197255932Salfred 198255932Salfredstruct mlx4_cmd_info { 199255932Salfred u16 opcode; 200255932Salfred bool has_inbox; 201255932Salfred bool has_outbox; 202255932Salfred bool out_is_imm; 203255932Salfred bool encode_slave_id; 204272407Shselasky bool skip_err_print; 205255932Salfred int (*verify)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, 206255932Salfred struct mlx4_cmd_mailbox *inbox); 207255932Salfred int (*wrapper)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, 208255932Salfred struct mlx4_cmd_mailbox *inbox, 209255932Salfred struct mlx4_cmd_mailbox *outbox, 210255932Salfred struct mlx4_cmd_info *cmd); 211255932Salfred}; 212255932Salfred 213272407Shselaskyenum { 214272407Shselasky MLX4_DEBUG_MASK_CMD_TIME = 0x100, 215272407Shselasky}; 216272407Shselasky 217219820Sjeff#ifdef CONFIG_MLX4_DEBUG 218219820Sjeffextern int mlx4_debug_level; 219219820Sjeff#else /* CONFIG_MLX4_DEBUG */ 220219820Sjeff#define mlx4_debug_level (0) 221219820Sjeff#endif /* CONFIG_MLX4_DEBUG */ 222219820Sjeff 223219820Sjeff#define mlx4_dbg(mdev, format, arg...) \ 224255932Salfreddo { \ 225255932Salfred if (mlx4_debug_level) \ 226255932Salfred dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ##arg); \ 227255932Salfred} while (0) 228219820Sjeff 229219820Sjeff#define mlx4_err(mdev, format, arg...) \ 230255932Salfred dev_err(&mdev->pdev->dev, format, ##arg) 231219820Sjeff#define mlx4_info(mdev, format, arg...) \ 232255932Salfred dev_info(&mdev->pdev->dev, format, ##arg) 233219820Sjeff#define mlx4_warn(mdev, format, arg...) \ 234255932Salfred dev_warn(&mdev->pdev->dev, format, ##arg) 235219820Sjeff 236255932Salfredextern int mlx4_log_num_mgm_entry_size; 237255932Salfredextern int log_mtts_per_seg; 238219820Sjeffextern int mlx4_blck_lb; 239255932Salfredextern int mlx4_set_4k_mtu; 240219820Sjeff 241255932Salfred#define MLX4_MAX_NUM_SLAVES (MLX4_MAX_NUM_PF + MLX4_MAX_NUM_VF) 242255932Salfred#define ALL_SLAVES 0xff 243255932Salfred 244219820Sjeffstruct mlx4_bitmap { 245219820Sjeff u32 last; 246219820Sjeff u32 top; 247219820Sjeff u32 max; 248219820Sjeff u32 reserved_top; 249219820Sjeff u32 mask; 250219820Sjeff u32 avail; 251219820Sjeff spinlock_t lock; 252219820Sjeff unsigned long *table; 253219820Sjeff}; 254219820Sjeff 255219820Sjeffstruct mlx4_buddy { 256219820Sjeff unsigned long **bits; 257219820Sjeff unsigned int *num_free; 258255932Salfred u32 max_order; 259219820Sjeff spinlock_t lock; 260219820Sjeff}; 261219820Sjeff 262219820Sjeffstruct mlx4_icm; 263219820Sjeff 264219820Sjeffstruct mlx4_icm_table { 265219820Sjeff u64 virt; 266219820Sjeff int num_icm; 267255932Salfred u32 num_obj; 268219820Sjeff int obj_size; 269219820Sjeff int lowmem; 270219820Sjeff int coherent; 271219820Sjeff struct mutex mutex; 272219820Sjeff struct mlx4_icm **icm; 273219820Sjeff}; 274219820Sjeff 275272407Shselasky#define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) 276272407Shselasky#define MLX4_MPT_FLAG_FREE (0x3UL << 28) 277272407Shselasky#define MLX4_MPT_FLAG_MIO (1 << 17) 278272407Shselasky#define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15) 279272407Shselasky#define MLX4_MPT_FLAG_PHYSICAL (1 << 9) 280272407Shselasky#define MLX4_MPT_FLAG_REGION (1 << 8) 281272407Shselasky 282272407Shselasky#define MLX4_MPT_PD_FLAG_FAST_REG (1 << 27) 283272407Shselasky#define MLX4_MPT_PD_FLAG_RAE (1 << 28) 284272407Shselasky#define MLX4_MPT_PD_FLAG_EN_INV (3 << 24) 285272407Shselasky 286272407Shselasky#define MLX4_MPT_QP_FLAG_BOUND_QP (1 << 7) 287272407Shselasky 288272407Shselasky#define MLX4_MPT_STATUS_SW 0xF0 289272407Shselasky#define MLX4_MPT_STATUS_HW 0x00 290272407Shselasky 291255932Salfred/* 292255932Salfred * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. 293255932Salfred */ 294255932Salfredstruct mlx4_mpt_entry { 295255932Salfred __be32 flags; 296255932Salfred __be32 qpn; 297255932Salfred __be32 key; 298255932Salfred __be32 pd_flags; 299255932Salfred __be64 start; 300255932Salfred __be64 length; 301255932Salfred __be32 lkey; 302255932Salfred __be32 win_cnt; 303255932Salfred u8 reserved1[3]; 304255932Salfred u8 mtt_rep; 305255932Salfred __be64 mtt_addr; 306255932Salfred __be32 mtt_sz; 307255932Salfred __be32 entity_size; 308255932Salfred __be32 first_byte_offset; 309255932Salfred} __packed; 310255932Salfred 311255932Salfred/* 312255932Salfred * Must be packed because start is 64 bits but only aligned to 32 bits. 313255932Salfred */ 314255932Salfredstruct mlx4_eq_context { 315255932Salfred __be32 flags; 316255932Salfred u16 reserved1[3]; 317255932Salfred __be16 page_offset; 318255932Salfred u8 log_eq_size; 319255932Salfred u8 reserved2[4]; 320255932Salfred u8 eq_period; 321255932Salfred u8 reserved3; 322255932Salfred u8 eq_max_count; 323255932Salfred u8 reserved4[3]; 324255932Salfred u8 intr; 325255932Salfred u8 log_page_size; 326255932Salfred u8 reserved5[2]; 327255932Salfred u8 mtt_base_addr_h; 328255932Salfred __be32 mtt_base_addr_l; 329255932Salfred u32 reserved6[2]; 330255932Salfred __be32 consumer_index; 331255932Salfred __be32 producer_index; 332255932Salfred u32 reserved7[4]; 333255932Salfred}; 334255932Salfred 335255932Salfredstruct mlx4_cq_context { 336255932Salfred __be32 flags; 337255932Salfred u16 reserved1[3]; 338255932Salfred __be16 page_offset; 339255932Salfred __be32 logsize_usrpage; 340255932Salfred __be16 cq_period; 341255932Salfred __be16 cq_max_count; 342255932Salfred u8 reserved2[3]; 343255932Salfred u8 comp_eqn; 344255932Salfred u8 log_page_size; 345255932Salfred u8 reserved3[2]; 346255932Salfred u8 mtt_base_addr_h; 347255932Salfred __be32 mtt_base_addr_l; 348255932Salfred __be32 last_notified_index; 349255932Salfred __be32 solicit_producer_index; 350255932Salfred __be32 consumer_index; 351255932Salfred __be32 producer_index; 352255932Salfred u32 reserved4[2]; 353255932Salfred __be64 db_rec_addr; 354255932Salfred}; 355255932Salfred 356255932Salfredstruct mlx4_srq_context { 357255932Salfred __be32 state_logsize_srqn; 358255932Salfred u8 logstride; 359255932Salfred u8 reserved1; 360255932Salfred __be16 xrcd; 361255932Salfred __be32 pg_offset_cqn; 362255932Salfred u32 reserved2; 363255932Salfred u8 log_page_size; 364255932Salfred u8 reserved3[2]; 365255932Salfred u8 mtt_base_addr_h; 366255932Salfred __be32 mtt_base_addr_l; 367255932Salfred __be32 pd; 368255932Salfred __be16 limit_watermark; 369255932Salfred __be16 wqe_cnt; 370255932Salfred u16 reserved4; 371255932Salfred __be16 wqe_counter; 372255932Salfred u32 reserved5; 373255932Salfred __be64 db_rec_addr; 374255932Salfred}; 375255932Salfred 376219820Sjeffstruct mlx4_eq { 377219820Sjeff struct mlx4_dev *dev; 378219820Sjeff void __iomem *doorbell; 379219820Sjeff int eqn; 380219820Sjeff u32 cons_index; 381219820Sjeff u16 irq; 382219820Sjeff u16 have_irq; 383219820Sjeff int nent; 384219820Sjeff struct mlx4_buf_list *page_list; 385219820Sjeff struct mlx4_mtt mtt; 386219820Sjeff}; 387219820Sjeff 388255932Salfredstruct mlx4_slave_eqe { 389255932Salfred u8 type; 390255932Salfred u8 port; 391255932Salfred u32 param; 392255932Salfred}; 393255932Salfred 394255932Salfredstruct mlx4_slave_event_eq_info { 395255932Salfred int eqn; 396255932Salfred u16 token; 397255932Salfred}; 398255932Salfred 399219820Sjeffstruct mlx4_profile { 400219820Sjeff int num_qp; 401219820Sjeff int rdmarc_per_qp; 402219820Sjeff int num_srq; 403219820Sjeff int num_cq; 404219820Sjeff int num_mcg; 405219820Sjeff int num_mpt; 406272407Shselasky unsigned num_mtt_segs; 407219820Sjeff}; 408219820Sjeff 409219820Sjeffstruct mlx4_fw { 410219820Sjeff u64 clr_int_base; 411219820Sjeff u64 catas_offset; 412255932Salfred u64 comm_base; 413255932Salfred u64 clock_offset; 414219820Sjeff struct mlx4_icm *fw_icm; 415219820Sjeff struct mlx4_icm *aux_icm; 416219820Sjeff u32 catas_size; 417219820Sjeff u16 fw_pages; 418219820Sjeff u8 clr_int_bar; 419219820Sjeff u8 catas_bar; 420255932Salfred u8 comm_bar; 421255932Salfred u8 clock_bar; 422219820Sjeff}; 423219820Sjeff 424255932Salfredstruct mlx4_comm { 425255932Salfred u32 slave_write; 426255932Salfred u32 slave_read; 427255932Salfred}; 428255932Salfred 429255932Salfredenum { 430255932Salfred MLX4_MCAST_CONFIG = 0, 431255932Salfred MLX4_MCAST_DISABLE = 1, 432255932Salfred MLX4_MCAST_ENABLE = 2, 433255932Salfred}; 434255932Salfred 435255932Salfred#define VLAN_FLTR_SIZE 128 436255932Salfred 437255932Salfredstruct mlx4_vlan_fltr { 438255932Salfred __be32 entry[VLAN_FLTR_SIZE]; 439255932Salfred}; 440255932Salfred 441255932Salfredstruct mlx4_mcast_entry { 442255932Salfred struct list_head list; 443255932Salfred u64 addr; 444255932Salfred}; 445255932Salfred 446255932Salfredstruct mlx4_promisc_qp { 447255932Salfred struct list_head list; 448255932Salfred u32 qpn; 449255932Salfred}; 450255932Salfred 451255932Salfredstruct mlx4_steer_index { 452255932Salfred struct list_head list; 453255932Salfred unsigned int index; 454255932Salfred struct list_head duplicates; 455255932Salfred}; 456255932Salfred 457255932Salfred#define MLX4_EVENT_TYPES_NUM 64 458255932Salfred 459255932Salfredstruct mlx4_slave_state { 460255932Salfred u8 comm_toggle; 461255932Salfred u8 last_cmd; 462255932Salfred u8 init_port_mask; 463255932Salfred bool active; 464272407Shselasky bool old_vlan_api; 465255932Salfred u8 function; 466255932Salfred dma_addr_t vhcr_dma; 467255932Salfred u16 mtu[MLX4_MAX_PORTS + 1]; 468255932Salfred __be32 ib_cap_mask[MLX4_MAX_PORTS + 1]; 469255932Salfred struct mlx4_slave_eqe eq[MLX4_MFUNC_MAX_EQES]; 470255932Salfred struct list_head mcast_filters[MLX4_MAX_PORTS + 1]; 471255932Salfred struct mlx4_vlan_fltr *vlan_filter[MLX4_MAX_PORTS + 1]; 472255932Salfred /* event type to eq number lookup */ 473255932Salfred struct mlx4_slave_event_eq_info event_eq[MLX4_EVENT_TYPES_NUM]; 474255932Salfred u16 eq_pi; 475255932Salfred u16 eq_ci; 476255932Salfred spinlock_t lock; 477255932Salfred /*initialized via the kzalloc*/ 478255932Salfred u8 is_slave_going_down; 479255932Salfred u32 cookie; 480255932Salfred enum slave_port_state port_state[MLX4_MAX_PORTS + 1]; 481255932Salfred}; 482255932Salfred 483255932Salfred#define MLX4_VGT 4095 484255932Salfred#define NO_INDX (-1) 485255932Salfred 486272407Shselasky 487255932Salfredstruct mlx4_vport_state { 488255932Salfred u64 mac; 489255932Salfred u16 default_vlan; 490255932Salfred u8 default_qos; 491255932Salfred u32 tx_rate; 492255932Salfred bool spoofchk; 493272407Shselasky u32 link_state; 494255932Salfred}; 495255932Salfred 496255932Salfredstruct mlx4_vf_admin_state { 497255932Salfred struct mlx4_vport_state vport[MLX4_MAX_PORTS + 1]; 498255932Salfred}; 499255932Salfred 500255932Salfredstruct mlx4_vport_oper_state { 501255932Salfred struct mlx4_vport_state state; 502255932Salfred int mac_idx; 503255932Salfred int vlan_idx; 504255932Salfred}; 505255932Salfredstruct mlx4_vf_oper_state { 506255932Salfred struct mlx4_vport_oper_state vport[MLX4_MAX_PORTS + 1]; 507255932Salfred}; 508255932Salfred 509255932Salfredstruct slave_list { 510255932Salfred struct mutex mutex; 511255932Salfred struct list_head res_list[MLX4_NUM_OF_RESOURCE_TYPE]; 512255932Salfred}; 513255932Salfred 514255932Salfredstruct resource_allocator { 515255932Salfred spinlock_t alloc_lock; 516255932Salfred union { 517255932Salfred int res_reserved; 518255932Salfred int res_port_rsvd[MLX4_MAX_PORTS]; 519255932Salfred }; 520255932Salfred union { 521255932Salfred int res_free; 522255932Salfred int res_port_free[MLX4_MAX_PORTS]; 523255932Salfred }; 524255932Salfred int *quota; 525255932Salfred int *allocated; 526255932Salfred int *guaranteed; 527255932Salfred}; 528255932Salfred 529255932Salfredstruct mlx4_resource_tracker { 530255932Salfred spinlock_t lock; 531255932Salfred /* tree for each resources */ 532255932Salfred struct rb_root res_tree[MLX4_NUM_OF_RESOURCE_TYPE]; 533255932Salfred /* num_of_slave's lists, one per slave */ 534255932Salfred struct slave_list *slave_list; 535255932Salfred struct resource_allocator res_alloc[MLX4_NUM_OF_RESOURCE_TYPE]; 536255932Salfred}; 537255932Salfred 538255932Salfred#define SLAVE_EVENT_EQ_SIZE 128 539255932Salfredstruct mlx4_slave_event_eq { 540255932Salfred u32 eqn; 541255932Salfred u32 cons; 542255932Salfred u32 prod; 543255932Salfred spinlock_t event_lock; 544255932Salfred struct mlx4_eqe event_eqe[SLAVE_EVENT_EQ_SIZE]; 545255932Salfred}; 546255932Salfred 547255932Salfredstruct mlx4_master_qp0_state { 548255932Salfred int proxy_qp0_active; 549255932Salfred int qp0_active; 550255932Salfred int port_active; 551255932Salfred}; 552255932Salfred 553255932Salfredstruct mlx4_mfunc_master_ctx { 554255932Salfred struct mlx4_slave_state *slave_state; 555255932Salfred struct mlx4_vf_admin_state *vf_admin; 556255932Salfred struct mlx4_vf_oper_state *vf_oper; 557255932Salfred struct mlx4_master_qp0_state qp0_state[MLX4_MAX_PORTS + 1]; 558255932Salfred int init_port_ref[MLX4_MAX_PORTS + 1]; 559255932Salfred u16 max_mtu[MLX4_MAX_PORTS + 1]; 560255932Salfred int disable_mcast_ref[MLX4_MAX_PORTS + 1]; 561255932Salfred struct mlx4_resource_tracker res_tracker; 562255932Salfred struct workqueue_struct *comm_wq; 563255932Salfred struct work_struct comm_work; 564272407Shselasky struct work_struct arm_comm_work; 565255932Salfred struct work_struct slave_event_work; 566255932Salfred struct work_struct slave_flr_event_work; 567255932Salfred spinlock_t slave_state_lock; 568255932Salfred __be32 comm_arm_bit_vector[4]; 569255932Salfred struct mlx4_eqe cmd_eqe; 570255932Salfred struct mlx4_slave_event_eq slave_eq; 571255932Salfred struct mutex gen_eqe_mutex[MLX4_MFUNC_MAX]; 572255932Salfred}; 573255932Salfred 574255932Salfredstruct mlx4_mfunc { 575255932Salfred struct mlx4_comm __iomem *comm; 576255932Salfred struct mlx4_vhcr_cmd *vhcr; 577255932Salfred dma_addr_t vhcr_dma; 578255932Salfred 579255932Salfred struct mlx4_mfunc_master_ctx master; 580255932Salfred}; 581255932Salfred 582255932Salfred#define MGM_QPN_MASK 0x00FFFFFF 583255932Salfred#define MGM_BLCK_LB_BIT 30 584255932Salfred 585255932Salfredstruct mlx4_mgm { 586255932Salfred __be32 next_gid_index; 587255932Salfred __be32 members_count; 588255932Salfred u32 reserved[2]; 589255932Salfred u8 gid[16]; 590255932Salfred __be32 qp[MLX4_MAX_QP_PER_MGM]; 591255932Salfred}; 592255932Salfred 593219820Sjeffstruct mlx4_cmd { 594219820Sjeff struct pci_pool *pool; 595219820Sjeff void __iomem *hcr; 596219820Sjeff struct mutex hcr_mutex; 597255932Salfred struct mutex slave_cmd_mutex; 598219820Sjeff struct semaphore poll_sem; 599219820Sjeff struct semaphore event_sem; 600339086Shselasky struct rw_semaphore switch_sem; 601219820Sjeff int max_cmds; 602219820Sjeff spinlock_t context_lock; 603219820Sjeff int free_head; 604219820Sjeff struct mlx4_cmd_context *context; 605219820Sjeff u16 token_mask; 606219820Sjeff u8 use_events; 607219820Sjeff u8 toggle; 608255932Salfred u8 comm_toggle; 609219820Sjeff}; 610219820Sjeff 611272407Shselaskyenum { 612272407Shselasky MLX4_VF_IMMED_VLAN_FLAG_VLAN = 1 << 0, 613272407Shselasky MLX4_VF_IMMED_VLAN_FLAG_QOS = 1 << 1, 614272407Shselasky}; 615272407Shselaskystruct mlx4_vf_immed_vlan_work { 616272407Shselasky struct work_struct work; 617272407Shselasky struct mlx4_priv *priv; 618272407Shselasky int flags; 619272407Shselasky int slave; 620272407Shselasky int vlan_ix; 621272407Shselasky int orig_vlan_ix; 622272407Shselasky u8 port; 623272407Shselasky u8 qos; 624272407Shselasky u16 vlan_id; 625272407Shselasky u16 orig_vlan_id; 626272407Shselasky}; 627272407Shselasky 628272407Shselasky 629219820Sjeffstruct mlx4_uar_table { 630219820Sjeff struct mlx4_bitmap bitmap; 631219820Sjeff}; 632219820Sjeff 633219820Sjeffstruct mlx4_mr_table { 634219820Sjeff struct mlx4_bitmap mpt_bitmap; 635219820Sjeff struct mlx4_buddy mtt_buddy; 636219820Sjeff u64 mtt_base; 637219820Sjeff u64 mpt_base; 638219820Sjeff struct mlx4_icm_table mtt_table; 639219820Sjeff struct mlx4_icm_table dmpt_table; 640219820Sjeff}; 641219820Sjeff 642219820Sjeffstruct mlx4_cq_table { 643219820Sjeff struct mlx4_bitmap bitmap; 644219820Sjeff spinlock_t lock; 645272407Shselasky rwlock_t cq_table_lock; 646219820Sjeff struct radix_tree_root tree; 647219820Sjeff struct mlx4_icm_table table; 648219820Sjeff struct mlx4_icm_table cmpt_table; 649219820Sjeff}; 650219820Sjeff 651219820Sjeffstruct mlx4_eq_table { 652219820Sjeff struct mlx4_bitmap bitmap; 653219820Sjeff char *irq_names; 654219820Sjeff void __iomem *clr_int; 655219820Sjeff void __iomem **uar_map; 656219820Sjeff u32 clr_mask; 657219820Sjeff struct mlx4_eq *eq; 658219820Sjeff struct mlx4_icm_table table; 659219820Sjeff struct mlx4_icm_table cmpt_table; 660219820Sjeff int have_irq; 661219820Sjeff u8 inta_pin; 662219820Sjeff}; 663219820Sjeff 664219820Sjeffstruct mlx4_srq_table { 665219820Sjeff struct mlx4_bitmap bitmap; 666219820Sjeff spinlock_t lock; 667255932Salfred struct radix_tree_root tree; 668219820Sjeff struct mlx4_icm_table table; 669219820Sjeff struct mlx4_icm_table cmpt_table; 670219820Sjeff}; 671219820Sjeff 672219820Sjeffstruct mlx4_qp_table { 673219820Sjeff struct mlx4_bitmap bitmap; 674219820Sjeff u32 rdmarc_base; 675219820Sjeff int rdmarc_shift; 676219820Sjeff spinlock_t lock; 677219820Sjeff struct mlx4_icm_table qp_table; 678219820Sjeff struct mlx4_icm_table auxc_table; 679219820Sjeff struct mlx4_icm_table altc_table; 680219820Sjeff struct mlx4_icm_table rdmarc_table; 681219820Sjeff struct mlx4_icm_table cmpt_table; 682219820Sjeff}; 683219820Sjeff 684219820Sjeffstruct mlx4_mcg_table { 685219820Sjeff struct mutex mutex; 686219820Sjeff struct mlx4_bitmap bitmap; 687219820Sjeff struct mlx4_icm_table table; 688219820Sjeff}; 689219820Sjeff 690219820Sjeffstruct mlx4_catas_err { 691219820Sjeff u32 __iomem *map; 692219820Sjeff struct timer_list timer; 693219820Sjeff struct list_head list; 694219820Sjeff}; 695219820Sjeff 696219820Sjeff#define MLX4_MAX_MAC_NUM 128 697219820Sjeff#define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3) 698219820Sjeff 699219820Sjeffstruct mlx4_mac_table { 700219820Sjeff __be64 entries[MLX4_MAX_MAC_NUM]; 701219820Sjeff int refs[MLX4_MAX_MAC_NUM]; 702219820Sjeff struct mutex mutex; 703219820Sjeff int total; 704219820Sjeff int max; 705219820Sjeff}; 706219820Sjeff 707219820Sjeff#define MLX4_MAX_VLAN_NUM 128 708219820Sjeff#define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2) 709219820Sjeff 710219820Sjeffstruct mlx4_vlan_table { 711219820Sjeff __be32 entries[MLX4_MAX_VLAN_NUM]; 712219820Sjeff int refs[MLX4_MAX_VLAN_NUM]; 713219820Sjeff struct mutex mutex; 714219820Sjeff int total; 715219820Sjeff int max; 716219820Sjeff}; 717219820Sjeff 718255932Salfred#define SET_PORT_GEN_ALL_VALID 0x7 719255932Salfred#define SET_PORT_PROMISC_SHIFT 31 720255932Salfred#define SET_PORT_MC_PROMISC_SHIFT 30 721255932Salfred 722255932Salfredenum { 723255932Salfred MCAST_DIRECT_ONLY = 0, 724255932Salfred MCAST_DIRECT = 1, 725255932Salfred MCAST_DEFAULT = 2 726255932Salfred}; 727255932Salfred 728255932Salfred 729255932Salfredstruct mlx4_set_port_general_context { 730255932Salfred u8 reserved[3]; 731255932Salfred u8 flags; 732255932Salfred u16 reserved2; 733255932Salfred __be16 mtu; 734255932Salfred u8 pptx; 735255932Salfred u8 pfctx; 736255932Salfred u16 reserved3; 737255932Salfred u8 pprx; 738255932Salfred u8 pfcrx; 739255932Salfred u16 reserved4; 740255932Salfred}; 741255932Salfred 742255932Salfredstruct mlx4_set_port_rqp_calc_context { 743255932Salfred __be32 base_qpn; 744255932Salfred u8 rererved; 745255932Salfred u8 n_mac; 746255932Salfred u8 n_vlan; 747255932Salfred u8 n_prio; 748255932Salfred u8 reserved2[3]; 749255932Salfred u8 mac_miss; 750255932Salfred u8 intra_no_vlan; 751255932Salfred u8 no_vlan; 752255932Salfred u8 intra_vlan_miss; 753255932Salfred u8 vlan_miss; 754255932Salfred u8 reserved3[3]; 755255932Salfred u8 no_vlan_prio; 756255932Salfred __be32 promisc; 757255932Salfred __be32 mcast; 758255932Salfred}; 759255932Salfred 760292107Shselaskystruct mlx4_hca_info { 761292107Shselasky struct mlx4_dev *dev; 762292107Shselasky struct device_attribute firmware_attr; 763292107Shselasky struct device_attribute hca_attr; 764292107Shselasky struct device_attribute board_attr; 765292107Shselasky}; 766292107Shselasky 767219820Sjeffstruct mlx4_port_info { 768219820Sjeff struct mlx4_dev *dev; 769219820Sjeff int port; 770219820Sjeff char dev_name[16]; 771219820Sjeff struct device_attribute port_attr; 772219820Sjeff enum mlx4_port_type tmp_type; 773255932Salfred char dev_mtu_name[16]; 774255932Salfred struct device_attribute port_mtu_attr; 775219820Sjeff struct mlx4_mac_table mac_table; 776219820Sjeff struct mlx4_vlan_table vlan_table; 777255932Salfred int base_qpn; 778219820Sjeff}; 779219820Sjeff 780219820Sjeffstruct mlx4_sense { 781219820Sjeff struct mlx4_dev *dev; 782219820Sjeff u8 do_sense_port[MLX4_MAX_PORTS + 1]; 783219820Sjeff u8 sense_allowed[MLX4_MAX_PORTS + 1]; 784219820Sjeff struct delayed_work sense_poll; 785219820Sjeff}; 786219820Sjeff 787255932Salfredstruct mlx4_msix_ctl { 788255932Salfred u64 pool_bm; 789255932Salfred struct mutex pool_lock; 790255932Salfred}; 791219820Sjeff 792255932Salfredstruct mlx4_steer { 793255932Salfred struct list_head promisc_qps[MLX4_NUM_STEERS]; 794255932Salfred struct list_head steer_entries[MLX4_NUM_STEERS]; 795255932Salfred}; 796255932Salfred 797272407Shselaskyenum { 798272407Shselasky MLX4_PCI_DEV_IS_VF = 1 << 0, 799272407Shselasky MLX4_PCI_DEV_FORCE_SENSE_PORT = 1 << 1, 800255932Salfred}; 801255932Salfred 802272407Shselaskystruct mlx4_roce_gid_entry { 803272407Shselasky u8 raw[16]; 804272407Shselasky}; 805255932Salfred 806272407Shselaskystruct counter_index { 807272407Shselasky struct list_head list; 808272407Shselasky u32 index; 809272407Shselasky}; 810255932Salfred 811272407Shselaskystruct mlx4_counters { 812272407Shselasky struct mlx4_bitmap bitmap; 813272407Shselasky struct list_head global_port_list[MLX4_MAX_PORTS]; 814272407Shselasky struct list_head vf_list[MLX4_MAX_NUM_VF][MLX4_MAX_PORTS]; 815272407Shselasky struct mutex mutex; 816255932Salfred}; 817255932Salfred 818255932Salfredenum { 819272407Shselasky MLX4_NO_RR = 0, 820272407Shselasky MLX4_USE_RR = 1, 821255932Salfred}; 822255932Salfred 823219820Sjeffstruct mlx4_priv { 824219820Sjeff struct mlx4_dev dev; 825219820Sjeff 826219820Sjeff struct list_head dev_list; 827219820Sjeff struct list_head ctx_list; 828219820Sjeff spinlock_t ctx_lock; 829219820Sjeff 830255932Salfred int pci_dev_data; 831255932Salfred 832219820Sjeff struct list_head pgdir_list; 833219820Sjeff struct mutex pgdir_mutex; 834219820Sjeff 835219820Sjeff struct mlx4_fw fw; 836219820Sjeff struct mlx4_cmd cmd; 837255932Salfred struct mlx4_mfunc mfunc; 838219820Sjeff 839219820Sjeff struct mlx4_bitmap pd_bitmap; 840219820Sjeff struct mlx4_bitmap xrcd_bitmap; 841219820Sjeff struct mlx4_uar_table uar_table; 842219820Sjeff struct mlx4_mr_table mr_table; 843219820Sjeff struct mlx4_cq_table cq_table; 844219820Sjeff struct mlx4_eq_table eq_table; 845219820Sjeff struct mlx4_srq_table srq_table; 846219820Sjeff struct mlx4_qp_table qp_table; 847219820Sjeff struct mlx4_mcg_table mcg_table; 848272407Shselasky struct mlx4_counters counters_table; 849219820Sjeff 850219820Sjeff struct mlx4_catas_err catas_err; 851219820Sjeff 852219820Sjeff void __iomem *clr_base; 853219820Sjeff 854219820Sjeff struct mlx4_uar driver_uar; 855219820Sjeff void __iomem *kar; 856219820Sjeff struct mlx4_port_info port[MLX4_MAX_PORTS + 1]; 857292107Shselasky struct mlx4_hca_info hca_info; 858219820Sjeff struct mlx4_sense sense; 859219820Sjeff struct mutex port_mutex; 860255932Salfred struct mlx4_msix_ctl msix_ctl; 861255932Salfred struct mlx4_steer *steer; 862255932Salfred struct list_head bf_list; 863255932Salfred struct mutex bf_mutex; 864255932Salfred struct io_mapping *bf_mapping; 865255932Salfred void __iomem *clock_mapping; 866255932Salfred int reserved_mtts; 867255932Salfred int fs_hash_mode; 868255932Salfred u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; 869255932Salfred __be64 slave_node_guids[MLX4_MFUNC_MAX]; 870255932Salfred struct mlx4_roce_gid_entry roce_gids[MLX4_MAX_PORTS][128]; 871255932Salfred atomic_t opreq_count; 872255932Salfred struct work_struct opreq_task; 873219820Sjeff}; 874219820Sjeff 875219820Sjeffstatic inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev) 876219820Sjeff{ 877219820Sjeff return container_of(dev, struct mlx4_priv, dev); 878219820Sjeff} 879219820Sjeff 880219820Sjeff#define MLX4_SENSE_RANGE (HZ * 3) 881219820Sjeff 882219820Sjeffextern struct workqueue_struct *mlx4_wq; 883219820Sjeff 884219820Sjeffu32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap); 885272407Shselaskyvoid mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj, int use_rr); 886255932Salfredu32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, 887255932Salfred int align, u32 skip_mask); 888272407Shselaskyvoid mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt, 889272407Shselasky int use_rr); 890219820Sjeffu32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap); 891219820Sjeffint mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, 892219820Sjeff u32 reserved_bot, u32 resetrved_top); 893219820Sjeffvoid mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap); 894219820Sjeff 895219820Sjeffint mlx4_reset(struct mlx4_dev *dev); 896219820Sjeff 897219820Sjeffint mlx4_alloc_eq_table(struct mlx4_dev *dev); 898219820Sjeffvoid mlx4_free_eq_table(struct mlx4_dev *dev); 899219820Sjeff 900219820Sjeffint mlx4_init_pd_table(struct mlx4_dev *dev); 901219820Sjeffint mlx4_init_xrcd_table(struct mlx4_dev *dev); 902219820Sjeffint mlx4_init_uar_table(struct mlx4_dev *dev); 903219820Sjeffint mlx4_init_mr_table(struct mlx4_dev *dev); 904219820Sjeffint mlx4_init_eq_table(struct mlx4_dev *dev); 905219820Sjeffint mlx4_init_cq_table(struct mlx4_dev *dev); 906219820Sjeffint mlx4_init_qp_table(struct mlx4_dev *dev); 907219820Sjeffint mlx4_init_srq_table(struct mlx4_dev *dev); 908219820Sjeffint mlx4_init_mcg_table(struct mlx4_dev *dev); 909219820Sjeff 910219820Sjeffvoid mlx4_cleanup_pd_table(struct mlx4_dev *dev); 911255932Salfredvoid mlx4_cleanup_xrcd_table(struct mlx4_dev *dev); 912219820Sjeffvoid mlx4_cleanup_uar_table(struct mlx4_dev *dev); 913219820Sjeffvoid mlx4_cleanup_mr_table(struct mlx4_dev *dev); 914219820Sjeffvoid mlx4_cleanup_eq_table(struct mlx4_dev *dev); 915219820Sjeffvoid mlx4_cleanup_cq_table(struct mlx4_dev *dev); 916219820Sjeffvoid mlx4_cleanup_qp_table(struct mlx4_dev *dev); 917219820Sjeffvoid mlx4_cleanup_srq_table(struct mlx4_dev *dev); 918219820Sjeffvoid mlx4_cleanup_mcg_table(struct mlx4_dev *dev); 919255932Salfredint __mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn); 920255932Salfredvoid __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn); 921255932Salfredint __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn); 922255932Salfredvoid __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn); 923255932Salfredint __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn); 924255932Salfredvoid __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn); 925272407Shselaskyint __mlx4_mpt_reserve(struct mlx4_dev *dev); 926272407Shselaskyvoid __mlx4_mpt_release(struct mlx4_dev *dev, u32 index); 927272407Shselaskyint __mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index); 928272407Shselaskyvoid __mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index); 929255932Salfredu32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order); 930255932Salfredvoid __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, int order); 931219820Sjeff 932255932Salfredint mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, 933255932Salfred struct mlx4_vhcr *vhcr, 934255932Salfred struct mlx4_cmd_mailbox *inbox, 935255932Salfred struct mlx4_cmd_mailbox *outbox, 936255932Salfred struct mlx4_cmd_info *cmd); 937255932Salfredint mlx4_SYNC_TPT_wrapper(struct mlx4_dev *dev, int slave, 938255932Salfred struct mlx4_vhcr *vhcr, 939255932Salfred struct mlx4_cmd_mailbox *inbox, 940255932Salfred struct mlx4_cmd_mailbox *outbox, 941255932Salfred struct mlx4_cmd_info *cmd); 942255932Salfredint mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave, 943255932Salfred struct mlx4_vhcr *vhcr, 944255932Salfred struct mlx4_cmd_mailbox *inbox, 945255932Salfred struct mlx4_cmd_mailbox *outbox, 946255932Salfred struct mlx4_cmd_info *cmd); 947255932Salfredint mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave, 948255932Salfred struct mlx4_vhcr *vhcr, 949255932Salfred struct mlx4_cmd_mailbox *inbox, 950255932Salfred struct mlx4_cmd_mailbox *outbox, 951255932Salfred struct mlx4_cmd_info *cmd); 952255932Salfredint mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave, 953255932Salfred struct mlx4_vhcr *vhcr, 954255932Salfred struct mlx4_cmd_mailbox *inbox, 955255932Salfred struct mlx4_cmd_mailbox *outbox, 956255932Salfred struct mlx4_cmd_info *cmd); 957255932Salfredint mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave, 958255932Salfred struct mlx4_vhcr *vhcr, 959255932Salfred struct mlx4_cmd_mailbox *inbox, 960255932Salfred struct mlx4_cmd_mailbox *outbox, 961255932Salfred struct mlx4_cmd_info *cmd); 962255932Salfredint mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave, 963255932Salfred struct mlx4_vhcr *vhcr, 964255932Salfred struct mlx4_cmd_mailbox *inbox, 965255932Salfred struct mlx4_cmd_mailbox *outbox, 966255932Salfred struct mlx4_cmd_info *cmd); 967255932Salfredint __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, 968272407Shselasky int *base, u8 flags); 969255932Salfredvoid __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); 970255932Salfredint __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); 971255932Salfredvoid __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); 972255932Salfredint __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, 973255932Salfred int start_index, int npages, u64 *page_list); 974272407Shselaskyint __mlx4_counter_alloc(struct mlx4_dev *dev, int slave, int port, u32 *idx); 975272407Shselaskyvoid __mlx4_counter_free(struct mlx4_dev *dev, int slave, int port, u32 idx); 976272407Shselasky 977272407Shselaskyint __mlx4_slave_counters_free(struct mlx4_dev *dev, int slave); 978272407Shselaskyint __mlx4_clear_if_stat(struct mlx4_dev *dev, 979272407Shselasky u8 counter_index); 980272407Shselaskyu8 mlx4_get_default_counter_index(struct mlx4_dev *dev, int slave, int port); 981272407Shselasky 982255932Salfredint __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); 983255932Salfredvoid __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); 984255932Salfred 985219820Sjeffvoid mlx4_start_catas_poll(struct mlx4_dev *dev); 986219820Sjeffvoid mlx4_stop_catas_poll(struct mlx4_dev *dev); 987219820Sjeffvoid mlx4_catas_init(void); 988219820Sjeffint mlx4_restart_one(struct pci_dev *pdev); 989219820Sjeffint mlx4_register_device(struct mlx4_dev *dev); 990219820Sjeffvoid mlx4_unregister_device(struct mlx4_dev *dev); 991255932Salfredvoid mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, 992255932Salfred unsigned long param); 993219820Sjeff 994219820Sjeffstruct mlx4_dev_cap; 995219820Sjeffstruct mlx4_init_hca_param; 996219820Sjeff 997219820Sjeffu64 mlx4_make_profile(struct mlx4_dev *dev, 998219820Sjeff struct mlx4_profile *request, 999219820Sjeff struct mlx4_dev_cap *dev_cap, 1000219820Sjeff struct mlx4_init_hca_param *init_hca); 1001255932Salfredvoid mlx4_master_comm_channel(struct work_struct *work); 1002272407Shselaskyvoid mlx4_master_arm_comm_channel(struct work_struct *work); 1003255932Salfredvoid mlx4_gen_slave_eqe(struct work_struct *work); 1004255932Salfredvoid mlx4_master_handle_slave_flr(struct work_struct *work); 1005219820Sjeff 1006255932Salfredint mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave, 1007255932Salfred struct mlx4_vhcr *vhcr, 1008255932Salfred struct mlx4_cmd_mailbox *inbox, 1009255932Salfred struct mlx4_cmd_mailbox *outbox, 1010255932Salfred struct mlx4_cmd_info *cmd); 1011255932Salfredint mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave, 1012255932Salfred struct mlx4_vhcr *vhcr, 1013255932Salfred struct mlx4_cmd_mailbox *inbox, 1014255932Salfred struct mlx4_cmd_mailbox *outbox, 1015255932Salfred struct mlx4_cmd_info *cmd); 1016255932Salfredint mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, 1017255932Salfred struct mlx4_vhcr *vhcr, struct mlx4_cmd_mailbox *inbox, 1018255932Salfred struct mlx4_cmd_mailbox *outbox, 1019255932Salfred struct mlx4_cmd_info *cmd); 1020255932Salfredint mlx4_COMM_INT_wrapper(struct mlx4_dev *dev, int slave, 1021255932Salfred struct mlx4_vhcr *vhcr, 1022255932Salfred struct mlx4_cmd_mailbox *inbox, 1023255932Salfred struct mlx4_cmd_mailbox *outbox, 1024255932Salfred struct mlx4_cmd_info *cmd); 1025255932Salfredint mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave, 1026255932Salfred struct mlx4_vhcr *vhcr, 1027255932Salfred struct mlx4_cmd_mailbox *inbox, 1028255932Salfred struct mlx4_cmd_mailbox *outbox, 1029255932Salfred struct mlx4_cmd_info *cmd); 1030255932Salfredint mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave, 1031255932Salfred struct mlx4_vhcr *vhcr, 1032255932Salfred struct mlx4_cmd_mailbox *inbox, 1033255932Salfred struct mlx4_cmd_mailbox *outbox, 1034255932Salfred struct mlx4_cmd_info *cmd); 1035255932Salfredint mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave, 1036255932Salfred struct mlx4_vhcr *vhcr, 1037255932Salfred struct mlx4_cmd_mailbox *inbox, 1038255932Salfred struct mlx4_cmd_mailbox *outbox, 1039255932Salfred struct mlx4_cmd_info *cmd); 1040255932Salfredint mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave, 1041255932Salfred struct mlx4_vhcr *vhcr, 1042255932Salfred struct mlx4_cmd_mailbox *inbox, 1043255932Salfred struct mlx4_cmd_mailbox *outbox, 1044255932Salfred struct mlx4_cmd_info *cmd); 1045255932Salfredint mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave, 1046255932Salfred struct mlx4_vhcr *vhcr, 1047255932Salfred struct mlx4_cmd_mailbox *inbox, 1048255932Salfred struct mlx4_cmd_mailbox *outbox, 1049255932Salfred struct mlx4_cmd_info *cmd); 1050255932Salfredint mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave, 1051255932Salfred struct mlx4_vhcr *vhcr, 1052255932Salfred struct mlx4_cmd_mailbox *inbox, 1053255932Salfred struct mlx4_cmd_mailbox *outbox, 1054255932Salfred struct mlx4_cmd_info *cmd); 1055255932Salfredint mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1056255932Salfred struct mlx4_vhcr *vhcr, 1057255932Salfred struct mlx4_cmd_mailbox *inbox, 1058255932Salfred struct mlx4_cmd_mailbox *outbox, 1059255932Salfred struct mlx4_cmd_info *cmd); 1060255932Salfredint mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1061255932Salfred struct mlx4_vhcr *vhcr, 1062255932Salfred struct mlx4_cmd_mailbox *inbox, 1063255932Salfred struct mlx4_cmd_mailbox *outbox, 1064255932Salfred struct mlx4_cmd_info *cmd); 1065255932Salfredint mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1066255932Salfred struct mlx4_vhcr *vhcr, 1067255932Salfred struct mlx4_cmd_mailbox *inbox, 1068255932Salfred struct mlx4_cmd_mailbox *outbox, 1069255932Salfred struct mlx4_cmd_info *cmd); 1070255932Salfredint mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1071255932Salfred struct mlx4_vhcr *vhcr, 1072255932Salfred struct mlx4_cmd_mailbox *inbox, 1073255932Salfred struct mlx4_cmd_mailbox *outbox, 1074255932Salfred struct mlx4_cmd_info *cmd); 1075255932Salfredint mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave, 1076255932Salfred struct mlx4_vhcr *vhcr, 1077255932Salfred struct mlx4_cmd_mailbox *inbox, 1078255932Salfred struct mlx4_cmd_mailbox *outbox, 1079255932Salfred struct mlx4_cmd_info *cmd); 1080255932Salfredint mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, 1081255932Salfred struct mlx4_vhcr *vhcr, 1082255932Salfred struct mlx4_cmd_mailbox *inbox, 1083255932Salfred struct mlx4_cmd_mailbox *outbox, 1084255932Salfred struct mlx4_cmd_info *cmd); 1085255932Salfredint mlx4_INIT2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, 1086255932Salfred struct mlx4_vhcr *vhcr, 1087255932Salfred struct mlx4_cmd_mailbox *inbox, 1088255932Salfred struct mlx4_cmd_mailbox *outbox, 1089255932Salfred struct mlx4_cmd_info *cmd); 1090255932Salfredint mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, 1091255932Salfred struct mlx4_vhcr *vhcr, 1092255932Salfred struct mlx4_cmd_mailbox *inbox, 1093255932Salfred struct mlx4_cmd_mailbox *outbox, 1094255932Salfred struct mlx4_cmd_info *cmd); 1095255932Salfredint mlx4_RTR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1096255932Salfred struct mlx4_vhcr *vhcr, 1097255932Salfred struct mlx4_cmd_mailbox *inbox, 1098255932Salfred struct mlx4_cmd_mailbox *outbox, 1099255932Salfred struct mlx4_cmd_info *cmd); 1100255932Salfredint mlx4_RTS2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1101255932Salfred struct mlx4_vhcr *vhcr, 1102255932Salfred struct mlx4_cmd_mailbox *inbox, 1103255932Salfred struct mlx4_cmd_mailbox *outbox, 1104255932Salfred struct mlx4_cmd_info *cmd); 1105255932Salfredint mlx4_SQERR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1106255932Salfred struct mlx4_vhcr *vhcr, 1107255932Salfred struct mlx4_cmd_mailbox *inbox, 1108255932Salfred struct mlx4_cmd_mailbox *outbox, 1109255932Salfred struct mlx4_cmd_info *cmd); 1110255932Salfredint mlx4_2ERR_QP_wrapper(struct mlx4_dev *dev, int slave, 1111255932Salfred struct mlx4_vhcr *vhcr, 1112255932Salfred struct mlx4_cmd_mailbox *inbox, 1113255932Salfred struct mlx4_cmd_mailbox *outbox, 1114255932Salfred struct mlx4_cmd_info *cmd); 1115255932Salfredint mlx4_RTS2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, 1116255932Salfred struct mlx4_vhcr *vhcr, 1117255932Salfred struct mlx4_cmd_mailbox *inbox, 1118255932Salfred struct mlx4_cmd_mailbox *outbox, 1119255932Salfred struct mlx4_cmd_info *cmd); 1120255932Salfredint mlx4_SQD2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, 1121255932Salfred struct mlx4_vhcr *vhcr, 1122255932Salfred struct mlx4_cmd_mailbox *inbox, 1123255932Salfred struct mlx4_cmd_mailbox *outbox, 1124255932Salfred struct mlx4_cmd_info *cmd); 1125255932Salfredint mlx4_SQD2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1126255932Salfred struct mlx4_vhcr *vhcr, 1127255932Salfred struct mlx4_cmd_mailbox *inbox, 1128255932Salfred struct mlx4_cmd_mailbox *outbox, 1129255932Salfred struct mlx4_cmd_info *cmd); 1130255932Salfredint mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave, 1131255932Salfred struct mlx4_vhcr *vhcr, 1132255932Salfred struct mlx4_cmd_mailbox *inbox, 1133255932Salfred struct mlx4_cmd_mailbox *outbox, 1134255932Salfred struct mlx4_cmd_info *cmd); 1135255932Salfredint mlx4_QUERY_QP_wrapper(struct mlx4_dev *dev, int slave, 1136255932Salfred struct mlx4_vhcr *vhcr, 1137255932Salfred struct mlx4_cmd_mailbox *inbox, 1138255932Salfred struct mlx4_cmd_mailbox *outbox, 1139255932Salfred struct mlx4_cmd_info *cmd); 1140255932Salfred 1141255932Salfredint mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe); 1142255932Salfred 1143219820Sjeffint mlx4_cmd_init(struct mlx4_dev *dev); 1144219820Sjeffvoid mlx4_cmd_cleanup(struct mlx4_dev *dev); 1145255932Salfredint mlx4_multi_func_init(struct mlx4_dev *dev); 1146255932Salfredvoid mlx4_multi_func_cleanup(struct mlx4_dev *dev); 1147219820Sjeffvoid mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param); 1148219820Sjeffint mlx4_cmd_use_events(struct mlx4_dev *dev); 1149219820Sjeffvoid mlx4_cmd_use_polling(struct mlx4_dev *dev); 1150219820Sjeff 1151255932Salfredint mlx4_comm_cmd(struct mlx4_dev *dev, u8 cmd, u16 param, 1152255932Salfred unsigned long timeout); 1153255932Salfred 1154219820Sjeffvoid mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn); 1155219820Sjeffvoid mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type); 1156219820Sjeff 1157219820Sjeffvoid mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type); 1158219820Sjeff 1159219820Sjeffvoid mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type); 1160219820Sjeff 1161219820Sjeffvoid mlx4_handle_catas_err(struct mlx4_dev *dev); 1162219820Sjeff 1163255932Salfredint mlx4_SENSE_PORT(struct mlx4_dev *dev, int port, 1164255932Salfred enum mlx4_port_type *type); 1165219820Sjeffvoid mlx4_do_sense_ports(struct mlx4_dev *dev, 1166219820Sjeff enum mlx4_port_type *stype, 1167219820Sjeff enum mlx4_port_type *defaults); 1168219820Sjeffvoid mlx4_start_sense(struct mlx4_dev *dev); 1169219820Sjeffvoid mlx4_stop_sense(struct mlx4_dev *dev); 1170272407Shselaskyvoid mlx4_sense_init(struct mlx4_dev *dev); 1171219820Sjeffint mlx4_check_port_params(struct mlx4_dev *dev, 1172219820Sjeff enum mlx4_port_type *port_type); 1173219820Sjeffint mlx4_change_port_types(struct mlx4_dev *dev, 1174219820Sjeff enum mlx4_port_type *port_types); 1175219820Sjeff 1176219820Sjeffvoid mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table); 1177219820Sjeffvoid mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table); 1178255932Salfredvoid __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan); 1179255932Salfredint __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); 1180219820Sjeff 1181255932Salfredint mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz); 1182255932Salfred/* resource tracker functions*/ 1183255932Salfredint mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, 1184255932Salfred enum mlx4_resource resource_type, 1185255932Salfred u64 resource_id, int *slave); 1186255932Salfredvoid mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave_id); 1187255932Salfredint mlx4_init_resource_tracker(struct mlx4_dev *dev); 1188255932Salfred 1189255932Salfredvoid mlx4_free_resource_tracker(struct mlx4_dev *dev, 1190255932Salfred enum mlx4_res_tracker_free_type type); 1191255932Salfred 1192255932Salfredint mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave, 1193255932Salfred struct mlx4_vhcr *vhcr, 1194255932Salfred struct mlx4_cmd_mailbox *inbox, 1195255932Salfred struct mlx4_cmd_mailbox *outbox, 1196255932Salfred struct mlx4_cmd_info *cmd); 1197255932Salfredint mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, 1198255932Salfred struct mlx4_vhcr *vhcr, 1199255932Salfred struct mlx4_cmd_mailbox *inbox, 1200255932Salfred struct mlx4_cmd_mailbox *outbox, 1201255932Salfred struct mlx4_cmd_info *cmd); 1202255932Salfredint mlx4_INIT_PORT_wrapper(struct mlx4_dev *dev, int slave, 1203255932Salfred struct mlx4_vhcr *vhcr, 1204255932Salfred struct mlx4_cmd_mailbox *inbox, 1205255932Salfred struct mlx4_cmd_mailbox *outbox, 1206255932Salfred struct mlx4_cmd_info *cmd); 1207255932Salfredint mlx4_CLOSE_PORT_wrapper(struct mlx4_dev *dev, int slave, 1208255932Salfred struct mlx4_vhcr *vhcr, 1209255932Salfred struct mlx4_cmd_mailbox *inbox, 1210255932Salfred struct mlx4_cmd_mailbox *outbox, 1211255932Salfred struct mlx4_cmd_info *cmd); 1212255932Salfredint mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, 1213255932Salfred struct mlx4_vhcr *vhcr, 1214255932Salfred struct mlx4_cmd_mailbox *inbox, 1215255932Salfred struct mlx4_cmd_mailbox *outbox, 1216255932Salfred struct mlx4_cmd_info *cmd); 1217255932Salfredint mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave, 1218255932Salfred struct mlx4_vhcr *vhcr, 1219255932Salfred struct mlx4_cmd_mailbox *inbox, 1220255932Salfred struct mlx4_cmd_mailbox *outbox, 1221255932Salfred struct mlx4_cmd_info *cmd); 1222219820Sjeffint mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); 1223219820Sjeff 1224255932Salfredint mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port, 1225255932Salfred int *gid_tbl_len, int *pkey_tbl_len); 1226255932Salfred 1227255932Salfredint mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, 1228255932Salfred struct mlx4_vhcr *vhcr, 1229255932Salfred struct mlx4_cmd_mailbox *inbox, 1230255932Salfred struct mlx4_cmd_mailbox *outbox, 1231255932Salfred struct mlx4_cmd_info *cmd); 1232255932Salfred 1233255932Salfredint mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, 1234255932Salfred struct mlx4_vhcr *vhcr, 1235255932Salfred struct mlx4_cmd_mailbox *inbox, 1236255932Salfred struct mlx4_cmd_mailbox *outbox, 1237255932Salfred struct mlx4_cmd_info *cmd); 1238255932Salfredint mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], 1239255932Salfred enum mlx4_protocol prot, enum mlx4_steer_type steer); 1240255932Salfredint mlx4_qp_attach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], 1241255932Salfred int block_mcast_loopback, enum mlx4_protocol prot, 1242255932Salfred enum mlx4_steer_type steer); 1243272407Shselaskyint mlx4_trans_to_dmfs_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, 1244272407Shselasky u8 gid[16], u8 port, 1245272407Shselasky int block_mcast_loopback, 1246272407Shselasky enum mlx4_protocol prot, u64 *reg_id); 1247273379Shselaskyint mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); 1248255932Salfredint mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1249255932Salfred struct mlx4_vhcr *vhcr, 1250255932Salfred struct mlx4_cmd_mailbox *inbox, 1251255932Salfred struct mlx4_cmd_mailbox *outbox, 1252255932Salfred struct mlx4_cmd_info *cmd); 1253255932Salfredint mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1254255932Salfred struct mlx4_vhcr *vhcr, 1255255932Salfred struct mlx4_cmd_mailbox *inbox, 1256255932Salfred struct mlx4_cmd_mailbox *outbox, 1257255932Salfred struct mlx4_cmd_info *cmd); 1258255932Salfredint mlx4_common_set_vlan_fltr(struct mlx4_dev *dev, int function, 1259255932Salfred int port, void *buf); 1260255932Salfredint mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, 1261255932Salfred struct mlx4_vhcr *vhcr, 1262255932Salfred struct mlx4_cmd_mailbox *inbox, 1263255932Salfred struct mlx4_cmd_mailbox *outbox, 1264255932Salfred struct mlx4_cmd_info *cmd); 1265255932Salfredint mlx4_PKEY_TABLE_wrapper(struct mlx4_dev *dev, int slave, 1266255932Salfred struct mlx4_vhcr *vhcr, 1267255932Salfred struct mlx4_cmd_mailbox *inbox, 1268255932Salfred struct mlx4_cmd_mailbox *outbox, 1269255932Salfred struct mlx4_cmd_info *cmd); 1270255932Salfredint mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, 1271255932Salfred struct mlx4_vhcr *vhcr, 1272255932Salfred struct mlx4_cmd_mailbox *inbox, 1273255932Salfred struct mlx4_cmd_mailbox *outbox, 1274255932Salfred struct mlx4_cmd_info *cmd); 1275255932Salfredint mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, 1276255932Salfred struct mlx4_vhcr *vhcr, 1277255932Salfred struct mlx4_cmd_mailbox *inbox, 1278255932Salfred struct mlx4_cmd_mailbox *outbox, 1279255932Salfred struct mlx4_cmd_info *cmd); 1280255932Salfredint mlx4_QP_FLOW_STEERING_DETACH_wrapper(struct mlx4_dev *dev, int slave, 1281255932Salfred struct mlx4_vhcr *vhcr, 1282255932Salfred struct mlx4_cmd_mailbox *inbox, 1283255932Salfred struct mlx4_cmd_mailbox *outbox, 1284255932Salfred struct mlx4_cmd_info *cmd); 1285272407Shselaskyint mlx4_MOD_STAT_CFG_wrapper(struct mlx4_dev *dev, int slave, 1286272407Shselasky struct mlx4_vhcr *vhcr, 1287272407Shselasky struct mlx4_cmd_mailbox *inbox, 1288272407Shselasky struct mlx4_cmd_mailbox *outbox, 1289272407Shselasky struct mlx4_cmd_info *cmd); 1290255932Salfred 1291255932Salfredint mlx4_get_mgm_entry_size(struct mlx4_dev *dev); 1292255932Salfredint mlx4_get_qp_per_mgm(struct mlx4_dev *dev); 1293255932Salfred 1294255932Salfredstatic inline void set_param_l(u64 *arg, u32 val) 1295255932Salfred{ 1296255932Salfred *arg = (*arg & 0xffffffff00000000ULL) | (u64) val; 1297255932Salfred} 1298255932Salfred 1299255932Salfredstatic inline void set_param_h(u64 *arg, u32 val) 1300255932Salfred{ 1301255932Salfred *arg = (*arg & 0xffffffff) | ((u64) val << 32); 1302255932Salfred} 1303255932Salfred 1304255932Salfredstatic inline u32 get_param_l(u64 *arg) 1305255932Salfred{ 1306255932Salfred return (u32) (*arg & 0xffffffff); 1307255932Salfred} 1308255932Salfred 1309255932Salfredstatic inline u32 get_param_h(u64 *arg) 1310255932Salfred{ 1311255932Salfred return (u32)(*arg >> 32); 1312255932Salfred} 1313255932Salfred 1314255932Salfredstatic inline spinlock_t *mlx4_tlock(struct mlx4_dev *dev) 1315255932Salfred{ 1316255932Salfred return &mlx4_priv(dev)->mfunc.master.res_tracker.lock; 1317255932Salfred} 1318255932Salfred 1319255932Salfred#define NOT_MASKED_PD_BITS 17 1320255932Salfred 1321255932Salfredvoid sys_tune_init(void); 1322255932Salfredvoid sys_tune_fini(void); 1323255932Salfred 1324255932Salfredvoid mlx4_init_quotas(struct mlx4_dev *dev); 1325255932Salfred 1326255932Salfredint mlx4_get_slave_num_gids(struct mlx4_dev *dev, int slave); 1327255932Salfredint mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave); 1328272407Shselaskyvoid mlx4_vf_immed_vlan_work_handler(struct work_struct *_work); 1329255932Salfred 1330219820Sjeff#endif /* MLX4_H */ 1331