1296047Soshogbo/*-
2296047Soshogbo * Copyright (c) 2010 Adrian Chadd
3296047Soshogbo * All rights reserved.
4296047Soshogbo *
5296047Soshogbo * Redistribution and use in source and binary forms, with or without
6296047Soshogbo * modification, are permitted provided that the following conditions
7296047Soshogbo * are met:
8296047Soshogbo * 1. Redistributions of source code must retain the above copyright
9296047Soshogbo *    notice, this list of conditions and the following disclaimer.
10296047Soshogbo * 2. Redistributions in binary form must reproduce the above copyright
11296047Soshogbo *    notice, this list of conditions and the following disclaimer in the
12296047Soshogbo *    documentation and/or other materials provided with the distribution.
13296047Soshogbo *
14296047Soshogbo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15296047Soshogbo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16296047Soshogbo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17296047Soshogbo * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18296047Soshogbo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19296047Soshogbo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20296047Soshogbo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21296047Soshogbo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22296047Soshogbo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23296047Soshogbo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24296047Soshogbo * SUCH DAMAGE.
25296047Soshogbo */
26296047Soshogbo
27296047Soshogbo/* $FreeBSD$ */
28296047Soshogbo
29296047Soshogbo#ifndef	__AR71XX_CPUDEF_H__
30296047Soshogbo#define	__AR71XX_CPUDEF_H__
31296047Soshogbo
32296047Soshogbostruct ar71xx_cpu_def {
33296047Soshogbo	void (* detect_mem_size) (void);
34296047Soshogbo	void (* detect_sys_frequency) (void);
35296047Soshogbo	void (* ar71xx_chip_device_stop) (uint32_t);
36296047Soshogbo	void (* ar71xx_chip_device_start) (uint32_t);
37296047Soshogbo	int (* ar71xx_chip_device_stopped) (uint32_t);
38296047Soshogbo	void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t);
39296047Soshogbo	void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t);
40296047Soshogbo	void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode);
41296047Soshogbo	void (* ar71xx_chip_ddr_flush_ge) (int);
42296047Soshogbo	uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int);
43296047Soshogbo
44296047Soshogbo	/*
45370004Sgit2svn	 * From Linux - Handling this IRQ is a bit special.
46296047Soshogbo	 * AR71xx - AR71XX_DDR_REG_FLUSH_PCI
47296047Soshogbo	 * AR724x - AR724X_DDR_REG_FLUSH_PCIE
48296047Soshogbo	 * AR91xx - AR91XX_DDR_REG_FLUSH_WMAC
49296047Soshogbo	 *
50301572Soshogbo	 * These are set when STATUSF_IP2 is set in regiser c0.
51296047Soshogbo	 * This flush is done before the IRQ is handled to make
52296047Soshogbo	 * sure the driver correctly sees any memory updates.
53296047Soshogbo	 */
54301572Soshogbo	void (* ar71xx_chip_ddr_flush_ip2) (void);
55296047Soshogbo	/*
56296047Soshogbo	 * The USB peripheral init code is subtly different for
57296047Soshogbo	 * each chip.
58296047Soshogbo	 */
59296047Soshogbo	void (* ar71xx_chip_init_usb_peripheral) (void);
60296047Soshogbo};
61296047Soshogbo
62296047Soshogboextern struct ar71xx_cpu_def * ar71xx_cpu_ops;
63296047Soshogbo
64296047Soshogbostatic inline void ar71xx_detect_sys_frequency(void)
65296047Soshogbo{
66296047Soshogbo	ar71xx_cpu_ops->detect_sys_frequency();
67296047Soshogbo}
68296047Soshogbo
69296047Soshogbostatic inline void ar71xx_device_stop(uint32_t mask)
70296047Soshogbo{
71296047Soshogbo	ar71xx_cpu_ops->ar71xx_chip_device_stop(mask);
72296047Soshogbo}
73296047Soshogbo
74296047Soshogbostatic inline void ar71xx_device_start(uint32_t mask)
75296047Soshogbo{
76296047Soshogbo	ar71xx_cpu_ops->ar71xx_chip_device_start(mask);
77296047Soshogbo}
78296047Soshogbo
79296047Soshogbostatic inline int ar71xx_device_stopped(uint32_t mask)
80296047Soshogbo{
81296047Soshogbo	return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask);
82296047Soshogbo}
83296047Soshogbo
84static inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll)
85{
86	ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll);
87}
88
89static inline void ar71xx_device_set_mii_speed(int unit, int speed)
90{
91	ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed);
92}
93
94static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg)
95{
96	ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg);
97}
98
99static inline void ar71xx_device_flush_ddr_ge(int unit)
100{
101	ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge(unit);
102}
103
104static inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed)
105{
106	return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed));
107}
108
109static inline void ar71xx_init_usb_peripheral(void)
110{
111	ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral();
112}
113
114static inline void ar71xx_device_ddr_flush_ip2(void)
115{
116	ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ip2();
117}
118
119/* XXX shouldn't be here! */
120extern uint32_t u_ar71xx_refclk;
121extern uint32_t u_ar71xx_cpu_freq;
122extern uint32_t u_ar71xx_ahb_freq;
123extern uint32_t u_ar71xx_ddr_freq;
124extern uint32_t u_ar71xx_uart_freq;
125extern uint32_t u_ar71xx_wdt_freq;
126
127static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; }
128static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; }
129static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; }
130static inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; }
131static inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; }
132static inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; }
133
134#endif
135