__umodsi3.S revision 66633 
1.file "__umodsi3.s"
2
3// $FreeBSD: head/sys/libkern/ia64/__umodsi3.S 66633 2000-10-04 17:53:03Z dfr $
4//
5// Copyright (c) 2000, Intel Corporation
6// All rights reserved.
7//
8// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
9// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
10// Intel Corporation.
11//
12// WARRANTY DISCLAIMER
13//
14// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
15// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
16// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
17// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
18// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
22// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
23// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25//
26// Intel Corporation is the author of this code, and requests that all
27// problem reports or change requests be submitted to it directly at
28// http://developer.intel.com/opensource.
29//
30
31.section .text
32
33// 32-bit unsigned integer remainder
34
35.proc __umodsi3#
36.align 32
37.global __umodsi3#
38.align 32
39
40__umodsi3:
41
42{ .mii
43  alloc r31=ar.pfs,2,0,0,0
44  nop.i 0
45  nop.i 0;;
46} { .mii
47  nop.m 0
48
49  // 32-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE
50
51  // general register used:
52  //    r32 - 32-bit unsigned integer dividend
53  //    r33 - 32-bit unsigned integer divisor
54  //    r8 - 32-bit unsigned integer result
55  //    r2 - scratch register
56  // floating-point registers used: f6, f7, f8, f9, f10, f11
57  // predicate registers used: p6
58
59  zxt4 r32=r32
60  zxt4 r33=r33;;
61} { .mmb
62  setf.sig f11=r32
63  setf.sig f7=r33
64  nop.b 0;;
65} { .mfi
66  nop.m 0
67  fcvt.xf f6=f11
68  nop.i 0
69} { .mfi
70  // get 2's complement of b
71  sub r33=r0,r33
72  fcvt.xf f7=f7
73  mov r2 = 0x0ffdd;;
74} { .mfi
75  setf.exp f9 = r2
76  // (1) y0
77  frcpa.s1 f8,p6=f6,f7
78  nop.i 0;;
79}  { .mfi
80  nop.m 0
81  // (2) q0 = a * y0
82  (p6) fma.s1 f10=f6,f8,f0
83  nop.i 0
84} { .mfi
85  nop.m 0
86  // (3) e0 = 1 - b * y0
87  (p6) fnma.s1 f8=f7,f8,f1
88  nop.i 0;;
89} { .mfi
90  nop.m 0
91  // (4) q1 = q0 + e0 * q0
92  (p6) fma.s1 f10=f8,f10,f10
93  nop.i 0
94} { .mfi
95  // get 2's complement of b
96  setf.sig f7=r33
97  // (5) e1 = e0 * e0 + 2^-34
98  (p6) fma.s1 f8=f8,f8,f9
99  nop.i 0;;
100} { .mfi
101  nop.m 0
102  // (6) q2 = q1 + e1 * q1
103  (p6) fma.s1 f8=f8,f10,f10
104  nop.i 0;;
105} { .mfi
106  nop.m 0
107  // (7) q = trunc(q2)
108  fcvt.fxu.trunc.s1 f8=f8
109  nop.i 0;;
110}  { .mfi
111  nop.m 0
112  // (8) r = a + (-b) * q
113  xma.l f8=f8,f7,f11
114  nop.i 0;;
115}  { .mmi
116  // remainder will be in the least significant 32 bits of r8 (if b != 0)
117  getf.sig r8=f8
118  nop.m 0
119  nop.i 0;;
120}
121
122  // 32-BIT UNSIGNED INTEGER REMAINDER ENDS HERE
123
124{ .mmb
125  nop.m 0
126  nop.m 0
127  br.ret.sptk b0;;
128}
129
130.endp __umodsi3
131