isareg.h revision 38136
138136Sdfr/*- 238136Sdfr * Copyright (c) 1990 The Regents of the University of California. 338136Sdfr * All rights reserved. 438136Sdfr * 538136Sdfr * This code is derived from software contributed to Berkeley by 638136Sdfr * William Jolitz. 738136Sdfr * 838136Sdfr * Redistribution and use in source and binary forms, with or without 938136Sdfr * modification, are permitted provided that the following conditions 1038136Sdfr * are met: 1138136Sdfr * 1. Redistributions of source code must retain the above copyright 1238136Sdfr * notice, this list of conditions and the following disclaimer. 1338136Sdfr * 2. Redistributions in binary form must reproduce the above copyright 1438136Sdfr * notice, this list of conditions and the following disclaimer in the 1538136Sdfr * documentation and/or other materials provided with the distribution. 1638136Sdfr * 3. All advertising materials mentioning features or use of this software 1738136Sdfr * must display the following acknowledgement: 1838136Sdfr * This product includes software developed by the University of 1938136Sdfr * California, Berkeley and its contributors. 2038136Sdfr * 4. Neither the name of the University nor the names of its contributors 2138136Sdfr * may be used to endorse or promote products derived from this software 2238136Sdfr * without specific prior written permission. 2338136Sdfr * 2438136Sdfr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2538136Sdfr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2638136Sdfr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2738136Sdfr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2838136Sdfr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2938136Sdfr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3038136Sdfr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3138136Sdfr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3238136Sdfr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3338136Sdfr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3438136Sdfr * SUCH DAMAGE. 3538136Sdfr * 3638136Sdfr * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 3738136Sdfr * $Id: isa.h,v 1.21 1997/02/22 09:36:41 peter Exp $ 3838136Sdfr */ 3938136Sdfr 4038136Sdfr#ifdef PC98 4138136Sdfr#error isa.h is included from PC-9801 source 4238136Sdfr#endif 4338136Sdfr 4438136Sdfr#ifndef _I386_ISA_ISA_H_ 4538136Sdfr#define _I386_ISA_ISA_H_ 4638136Sdfr 4738136Sdfr/* BEWARE: Included in both assembler and C code */ 4838136Sdfr 4938136Sdfr/* 5038136Sdfr * ISA Bus conventions 5138136Sdfr */ 5238136Sdfr 5338136Sdfr/* 5438136Sdfr * Input / Output Port Assignments 5538136Sdfr */ 5638136Sdfr#ifndef IO_ISABEGIN 5738136Sdfr#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 5838136Sdfr 5938136Sdfr /* CPU Board */ 6038136Sdfr#define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ 6138136Sdfr#define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ 6238136Sdfr#define IO_PMP1 0x026 /* 82347 Power Management Peripheral */ 6338136Sdfr#define IO_TIMER1 0x040 /* 8253 Timer #1 */ 6438136Sdfr#define IO_TIMER2 0x048 /* 8253 Timer #2 */ 6538136Sdfr#define IO_KBD 0x060 /* 8042 Keyboard */ 6638136Sdfr#define IO_PPI 0x061 /* Programmable Peripheral Interface */ 6738136Sdfr#define IO_RTC 0x070 /* RTC */ 6838136Sdfr#define IO_NMI IO_RTC /* NMI Control */ 6938136Sdfr#define IO_DMAPG 0x080 /* DMA Page Registers */ 7038136Sdfr#define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ 7138136Sdfr#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ 7238136Sdfr#define IO_NPX 0x0F0 /* Numeric Coprocessor */ 7338136Sdfr 7438136Sdfr /* Cards */ 7538136Sdfr /* 0x100 - 0x16F Open */ 7638136Sdfr 7738136Sdfr#define IO_WD2 0x170 /* Secondary Fixed Disk Controller */ 7838136Sdfr 7938136Sdfr#define IO_PMP2 0x178 /* 82347 Power Management Peripheral */ 8038136Sdfr 8138136Sdfr /* 0x17A - 0x1EF Open */ 8238136Sdfr 8338136Sdfr#define IO_WD1 0x1F0 /* Primary Fixed Disk Controller */ 8438136Sdfr#define IO_GAME 0x201 /* Game Controller */ 8538136Sdfr 8638136Sdfr /* 0x202 - 0x22A Open */ 8738136Sdfr 8838136Sdfr#define IO_ASC2 0x22B /* AmiScan addr.grp. 2 */ 8938136Sdfr 9038136Sdfr /* 0x230 - 0x26A Open */ 9138136Sdfr 9238136Sdfr#define IO_ASC3 0x26B /* AmiScan addr.grp. 3 */ 9338136Sdfr#define IO_GSC1 0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */ 9438136Sdfr#define IO_LPT2 0x278 /* Parallel Port #2 */ 9538136Sdfr 9638136Sdfr /* 0x280 - 0x2AA Open */ 9738136Sdfr 9838136Sdfr#define IO_ASC4 0x2AB /* AmiScan addr.grp. 4 */ 9938136Sdfr 10038136Sdfr /* 0x2B0 - 0x2DF Open */ 10138136Sdfr 10238136Sdfr#define IO_GSC2 0x2E0 /* GeniScan GS-4500 addr.grp. 2 */ 10338136Sdfr#define IO_COM4 0x2E8 /* COM4 i/o address */ 10438136Sdfr#define IO_ASC5 0x2EB /* AmiScan addr.grp. 5 */ 10538136Sdfr 10638136Sdfr /* 0x2F0 - 0x2F7 Open */ 10738136Sdfr 10838136Sdfr#define IO_COM2 0x2F8 /* COM2 i/o address */ 10938136Sdfr 11038136Sdfr /* 0x300 - 0x32A Open */ 11138136Sdfr 11238136Sdfr#define IO_ASC6 0x32B /* AmiScan addr.grp. 6 */ 11338136Sdfr#define IO_AHA0 0x330 /* adaptec 1542 default addr. */ 11438136Sdfr#define IO_BT0 0x330 /* bustek 742a default addr. */ 11538136Sdfr#define IO_UHA0 0x330 /* ultrastore 14f default addr. */ 11638136Sdfr#define IO_AHA1 0x334 /* adaptec 1542 default addr. */ 11738136Sdfr#define IO_BT1 0x334 /* bustek 742a default addr. */ 11838136Sdfr 11938136Sdfr /* 0x340 - 0x36A Open */ 12038136Sdfr 12138136Sdfr#define IO_ASC7 0x36B /* AmiScan addr.grp. 7 */ 12238136Sdfr#define IO_GSC3 0x370 /* GeniScan GS-4500 addr.grp. 3 */ 12338136Sdfr#define IO_FD2 0x370 /* secondary base i/o address */ 12438136Sdfr#define IO_LPT1 0x378 /* Parallel Port #1 */ 12538136Sdfr 12638136Sdfr /* 0x380 - 0x3AA Open */ 12738136Sdfr 12838136Sdfr#define IO_ASC8 0x3AB /* AmiScan addr.grp. 8 */ 12938136Sdfr#define IO_MDA 0x3B0 /* Monochome Adapter */ 13038136Sdfr#define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ 13138136Sdfr#define IO_VGA 0x3C0 /* E/VGA Ports */ 13238136Sdfr#define IO_CGA 0x3D0 /* CGA Ports */ 13338136Sdfr#define IO_GSC4 0x3E0 /* GeniScan GS-4500 addr.grp. 4 */ 13438136Sdfr#define IO_COM3 0x3E8 /* COM3 i/o address */ 13538136Sdfr#define IO_ASC1 0x3EB /* AmiScan addr.grp. 1 */ 13638136Sdfr#define IO_FD1 0x3F0 /* primary base i/o address */ 13738136Sdfr#define IO_COM1 0x3F8 /* COM1 i/o address */ 13838136Sdfr 13938136Sdfr#define IO_ISAEND 0x3FF /* End (actually Max) of I/O Regs */ 14038136Sdfr#endif /* !IO_ISABEGIN */ 14138136Sdfr 14238136Sdfr/* 14338136Sdfr * Input / Output Port Sizes - these are from several sources, and tend 14438136Sdfr * to be the larger of what was found. 14538136Sdfr */ 14638136Sdfr#ifndef IO_ISASIZES 14738136Sdfr#define IO_ISASIZES 14838136Sdfr 14938136Sdfr#define IO_ASCSIZE 5 /* AmiScan GI1904-based hand scanner */ 15038136Sdfr#define IO_CGASIZE 16 /* CGA controllers */ 15138136Sdfr#define IO_COMSIZE 8 /* 8250, 16x50 com controllers */ 15238136Sdfr#define IO_DMASIZE 16 /* 8237 DMA controllers */ 15338136Sdfr#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */ 15438136Sdfr#define IO_EISASIZE 256 /* EISA controllers */ 15538136Sdfr#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ 15638136Sdfr#define IO_GAMSIZE 16 /* AT compatible game controllers */ 15738136Sdfr#define IO_GSCSIZE 8 /* GeniScan GS-4500G hand scanner */ 15838136Sdfr#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 15938136Sdfr#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 16038136Sdfr#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ 16138136Sdfr#define IO_MDASIZE 16 /* Monochrome display controllers */ 16238136Sdfr#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ 16338136Sdfr#define IO_PMPSIZE 2 /* 82347 power management peripheral */ 16438136Sdfr#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 16538136Sdfr#define IO_TMRSIZE 16 /* 8253 programmable timers */ 16638136Sdfr#define IO_VGASIZE 16 /* VGA controllers */ 16738136Sdfr#define IO_WDCSIZE 8 /* WD compatible disk controllers */ 16838136Sdfr 16938136Sdfr#endif /* !IO_ISASIZES */ 17038136Sdfr 17138136Sdfr/* 17238136Sdfr * Input / Output Memory Physical Addresses 17338136Sdfr */ 17438136Sdfr#ifndef IOM_BEGIN 17538136Sdfr#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ 17638136Sdfr#define IOM_END 0x100000 /* End of I/O Memory "hole" */ 17738136Sdfr#define IOM_SIZE (IOM_END - IOM_BEGIN) 17838136Sdfr#endif /* !IOM_BEGIN */ 17938136Sdfr 18038136Sdfr/* 18138136Sdfr * RAM Physical Address Space (ignoring the above mentioned "hole") 18238136Sdfr */ 18338136Sdfr#ifndef RAM_BEGIN 18438136Sdfr#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 18538136Sdfr#define RAM_END 0x1000000 /* End of RAM Memory */ 18638136Sdfr#define RAM_SIZE (RAM_END - RAM_BEGIN) 18738136Sdfr#endif /* !RAM_BEGIN */ 18838136Sdfr 18938136Sdfr/* 19038136Sdfr * Oddball Physical Memory Addresses 19138136Sdfr */ 19238136Sdfr#ifndef COMPAQ_RAMRELOC 19338136Sdfr#define COMPAQ_RAMRELOC 0x80C00000 /* Compaq RAM relocation/diag */ 19438136Sdfr#define COMPAQ_RAMSETUP 0x80C00002 /* Compaq RAM setup */ 19538136Sdfr#define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 19638136Sdfr#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ 19738136Sdfr#endif /* !COMPAQ_RAMRELOC */ 19838136Sdfr 19938136Sdfr#endif /* !_I386_ISA_ISA_H_ */ 200