vmparam.h revision 219808
1/*- 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1992, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department and Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: Utah $Hdr: vmparam.h 1.16 91/01/18$ 35 * 36 * @(#)vmparam.h 8.2 (Berkeley) 4/22/94 37 * 38 * $FreeBSD: head/sys/ia64/include/vmparam.h 219808 2011-03-21 01:09:50Z marcel $ 39 */ 40 41#ifndef _MACHINE_VMPARAM_H_ 42#define _MACHINE_VMPARAM_H_ 43 44/* 45 * Virtual memory related constants, all in bytes 46 */ 47#ifndef MAXTSIZ 48#define MAXTSIZ (1<<30) /* max text size (1G) */ 49#endif 50#ifndef DFLDSIZ 51#define DFLDSIZ (1<<27) /* initial data size (128M) */ 52#endif 53#ifndef MAXDSIZ 54#define MAXDSIZ (1<<30) /* max data size (1G) */ 55#endif 56#ifndef DFLSSIZ 57#define DFLSSIZ (1<<21) /* initial stack size (2M) */ 58#endif 59#ifndef MAXSSIZ 60#define MAXSSIZ (1<<28) /* max stack size (256M) */ 61#endif 62#ifndef SGROWSIZ 63#define SGROWSIZ (128UL*1024) /* amount to grow stack */ 64#endif 65 66/* 67 * We need region 7 virtual addresses for pagetables. 68 */ 69#define UMA_MD_SMALL_ALLOC 70 71/* 72 * The physical address space is sparsely populated. 73 */ 74#define VM_PHYSSEG_SPARSE 75 76/* 77 * The number of PHYSSEG entries is equal to the number of phys_avail 78 * entries. 79 */ 80#define VM_PHYSSEG_MAX 49 81 82/* 83 * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool 84 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 85 * the pool from which physical pages for small UMA objects are 86 * allocated. 87 */ 88#define VM_NFREEPOOL 3 89#define VM_FREEPOOL_CACHE 2 90#define VM_FREEPOOL_DEFAULT 0 91#define VM_FREEPOOL_DIRECT 1 92 93/* 94 * Create one free page list. 95 */ 96#define VM_NFREELIST 1 97#define VM_FREELIST_DEFAULT 0 98 99/* 100 * An allocation size of 256MB is supported in order to optimize the 101 * use of the identity mappings in region 7 by UMA. 102 */ 103#define VM_NFREEORDER 16 104 105/* 106 * Only one memory domain. 107 */ 108#ifndef VM_NDOMAIN 109#define VM_NDOMAIN 1 110#endif 111 112/* 113 * Disable superpage reservations. 114 */ 115#ifndef VM_NRESERVLEVEL 116#define VM_NRESERVLEVEL 0 117#endif 118 119#define IA64_VM_MINKERN_REGION 4 120 121/* 122 * Manipulating region bits of an address. 123 */ 124#define IA64_RR_BASE(n) (((uint64_t) (n)) << 61) 125#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1)) 126 127#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7)) 128 129/* 130 * The Itanium architecture defines that all implementations support at 131 * least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented 132 * bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in 133 * the virtual address range, which extends at most from 0x0004000000000000 134 * to 0x1ffbffffffffffff. We define the top half of a region in terms of 135 * this worst-case gap. 136 */ 137#define IA64_REGION_GAP_START 0x0004000000000000 138#define IA64_REGION_GAP_EXTEND 0x1ffc000000000000 139 140/* 141 * Page size of the identity mappings in region 7. 142 */ 143#ifndef LOG2_ID_PAGE_SIZE 144#define LOG2_ID_PAGE_SIZE 28 /* 256M */ 145#endif 146 147#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE) 148#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE)) 149#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1) 150 151 152/* 153 * Parameters for Pre-Boot Virtual Memory (PBVM). 154 * The kernel, its modules and metadata are loaded in the PBVM by the loader. 155 * The PBVM consists of pages for which the mapping is maintained in a page 156 * table. The page table is at least 1 EFI page large (i.e. 4KB), but can be 157 * larger to accommodate more PBVM. The maximum page table size is 1MB. With 158 * 8 bytes per page table entry, this means that the PBVM has at least 512 159 * pages and at most 128K pages. 160 * The GNU toolchain (in particular GNU ld) does not support an alignment 161 * larger than 64K. This means that we cannot guarantee page alignment for 162 * a page size that's larger than 64K. We do want to have text and data in 163 * different pages, which means that the maximum usable page size is 64KB. 164 * Consequently: 165 * The maximum total PBVM size is 8GB -- enough for a DVD image. A page table 166 * of a single EFI page (4KB) allows for 32MB of PBVM. 167 * 168 * The kernel is given the PA and size of the page table that provides the 169 * mapping of the PBVM. The page table itself is assumed to be mapped at a 170 * known virtual address and using a single translation wired into the CPU. 171 * As such, the page table is assumed to be a power of 2 and naturally aligned. 172 * The kernel also assumes that a good portion of the kernel text is mapped 173 * and wired into the CPU, but does not assume that the mapping covers the 174 * whole of PBVM. 175 */ 176#define IA64_PBVM_RR IA64_VM_MINKERN_REGION 177#define IA64_PBVM_BASE \ 178 (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_GAP_EXTEND) 179 180#define IA64_PBVM_PGTBL_MAXSZ 1048576 181#define IA64_PBVM_PGTBL \ 182 (IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ) 183 184#define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */ 185#define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT) 186#define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1) 187 188/* 189 * Mach derived constants 190 */ 191 192/* user/kernel map constants */ 193#define VM_MIN_ADDRESS 0 194#define VM_MAXUSER_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION) 195#define VM_MIN_KERNEL_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION + 1) 196#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(IA64_VM_MINKERN_REGION + 2) - 1) 197#define VM_MAX_ADDRESS ~0UL 198 199#define KERNBASE VM_MAXUSER_ADDRESS 200 201/* 202 * USRSTACK is the top (end) of the user stack. Immediately above the user 203 * stack resides the syscall gateway page. 204 */ 205#define USRSTACK VM_MAXUSER_ADDRESS 206#define IA64_BACKINGSTORE (USRSTACK - (2 * MAXSSIZ) - PAGE_SIZE) 207 208/* virtual sizes (bytes) for various kernel submaps */ 209#ifndef VM_KMEM_SIZE 210#define VM_KMEM_SIZE (12 * 1024 * 1024) 211#endif 212 213/* 214 * How many physical pages per KVA page allocated. 215 * min(max(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE), 216 * VM_KMEM_SIZE_MIN), VM_KMEM_SIZE_MAX) 217 * is the total KVA space allocated for kmem_map. 218 */ 219#ifndef VM_KMEM_SIZE_SCALE 220#define VM_KMEM_SIZE_SCALE (4) /* XXX 8192 byte pages */ 221#endif 222 223/* initial pagein size of beginning of executable file */ 224#ifndef VM_INITIAL_PAGEIN 225#define VM_INITIAL_PAGEIN 16 226#endif 227 228#endif /* !_MACHINE_VMPARAM_H_ */ 229