1/*-
2 * Copyright (c) 2007-2010 Marcel Moolenaar
3 * Copyright (c) 1998 Doug Rabson
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30#ifndef _MACHINE_INTR_H_
31#define	_MACHINE_INTR_H_
32
33#define	IA64_NXIVS		256	/* External Interrupt Vectors */
34#define	IA64_MIN_XIV		16
35
36#define	IA64_MAX_HWPRIO		14
37
38struct pcpu;
39struct sapic;
40struct thread;
41struct trapframe;
42
43/*
44 * Layout of the Processor Interrupt Block.
45 */
46struct ia64_pib
47{
48	uint64_t	ib_ipi[65536][2];	/* 64K-way IPIs (1MB area). */
49	uint8_t		_rsvd1[0xe0000];
50	uint8_t		ib_inta;		/* Generate INTA cycle. */
51	uint8_t		_rsvd2[7];
52	uint8_t		ib_xtp;			/* External Task Priority. */
53	uint8_t		_rsvd3[7];
54	uint8_t		_rsvd4[0x1fff0];
55};
56
57enum ia64_xiv_use {
58	IA64_XIV_FREE,
59	IA64_XIV_ARCH,		/* Architecturally defined. */
60	IA64_XIV_PLAT,		/* Platform defined. */
61	IA64_XIV_IPI,		/* Used for IPIs. */
62	IA64_XIV_IRQ		/* Used for external interrupts. */
63};
64
65typedef u_int (ia64_ihtype)(struct thread *, u_int, struct trapframe *);
66
67extern struct ia64_pib *ia64_pib;
68
69void	ia64_bind_intr(void);
70void	ia64_handle_intr(struct trapframe *);
71int	ia64_setup_intr(const char *, int, driver_filter_t, driver_intr_t,
72	    void *, enum intr_type, void **);
73int	ia64_teardown_intr(void *);
74
75void	ia64_xiv_init(void);
76u_int	ia64_xiv_alloc(u_int, enum ia64_xiv_use, ia64_ihtype);
77int	ia64_xiv_free(u_int, enum ia64_xiv_use);
78int	ia64_xiv_reserve(u_int, enum ia64_xiv_use, ia64_ihtype);
79
80int	sapic_bind_intr(u_int, struct pcpu *);
81int	sapic_config_intr(u_int, enum intr_trigger, enum intr_polarity);
82struct sapic *sapic_create(u_int, u_int, uint64_t);
83int	sapic_enable(struct sapic *, u_int, u_int);
84void	sapic_eoi(struct sapic *, u_int);
85struct sapic *sapic_lookup(u_int, u_int *);
86void	sapic_mask(struct sapic *, u_int);
87void	sapic_unmask(struct sapic *, u_int);
88
89#ifdef DDB
90void	sapic_print(struct sapic *, u_int);
91#endif
92
93#endif /* !_MACHINE_INTR_H_ */
94