ste-href-ab8505.dtsi revision 284090 
1/*
2 * Copyright 2014 Linaro Ltd.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13	soc {
14		prcmu@80157000 {
15			ab8505 {
16				ab8505-gpio {
17					/* Hog a few default settings */
18					pinctrl-names = "default";
19					pinctrl-0 = <&gpio2_default_mode>,
20						    <&gpio10_default_mode>,
21						    <&gpio11_default_mode>,
22						    <&gpio13_default_mode>,
23						    <&gpio34_default_mode>,
24						    <&gpio50_default_mode>,
25						    <&pwm_default_mode>,
26						    <&adi2_default_mode>,
27						    <&modsclsda_default_mode>,
28						    <&resethw_default_mode>,
29						    <&service_default_mode>;
30
31					/*
32					 * Pins 2, 10, 11, 13, 34 and 50
33					 * are muxed in as GPIO, and configured as INPUT PULL DOWN
34					 */
35					gpio2 {
36						gpio2_default_mode: gpio2_default {
37							default_mux {
38								function = "gpio";
39								groups = "gpio2_a_1";
40							};
41							default_cfg {
42								pins = "GPIO2_R5";
43								input-enable;
44								bias-pull-down;
45							};
46						};
47					};
48					gpio10 {
49						gpio10_default_mode: gpio10_default {
50							default_mux {
51								function = "gpio";
52								groups = "gpio10_d_1";
53							};
54							default_cfg {
55								pins = "GPIO10_B16";
56								input-enable;
57								bias-pull-down;
58							};
59						};
60					};
61					gpio11 {
62						gpio11_default_mode: gpio11_default {
63							default_mux {
64								function = "gpio";
65								groups = "gpio11_d_1";
66							};
67							default_cfg {
68								pins = "GPIO11_B17";
69								input-enable;
70								bias-pull-down;
71							};
72						};
73					};
74					gpio13 {
75						gpio13_default_mode: gpio13_default {
76							default_mux {
77								function = "gpio";
78								groups = "gpio13_d_1";
79							};
80							default_cfg {
81								pins = "GPIO13_D17";
82								input-enable;
83								bias-disable;
84							};
85						};
86					};
87					gpio34 {
88						gpio34_default_mode: gpio34_default {
89							default_mux {
90								function = "gpio";
91								groups = "gpio34_a_1";
92							};
93							default_cfg {
94								pins = "GPIO34_H14";
95								input-enable;
96								bias-pull-down;
97							};
98						};
99					};
100					gpio50 {
101						gpio50_default_mode: gpio50_default {
102							default_mux {
103								function = "gpio";
104								groups = "gpio50_d_1";
105							};
106							default_cfg {
107								pins = "GPIO50_L4";
108								input-enable;
109								bias-disable;
110							};
111						};
112					};
113					/* This sets up the PWM pin 14 */
114					pwm {
115						pwm_default_mode: pwm_default {
116							default_mux {
117								function = "pwmout";
118								groups = "pwmout1_d_1";
119							};
120							default_cfg {
121								pins = "GPIO14_C16";
122								input-enable;
123								bias-pull-down;
124							};
125						};
126					};
127					/* This sets up audio interface 2 */
128					adi2 {
129						adi2_default_mode: adi2_default {
130							default_mux {
131								function = "adi2";
132								groups = "adi2_d_1";
133							};
134							default_cfg {
135								pins = "GPIO17_P2",
136									 "GPIO18_N3",
137									 "GPIO19_T1",
138									 "GPIO20_P3";
139								input-enable;
140								bias-pull-down;
141							};
142						};
143					};
144					/* Modem I2C setup (SCL and SDA pins) */
145					modsclsda {
146						modsclsda_default_mode: modsclsda_default {
147							default_mux {
148								function = "modsclsda";
149								groups = "modsclsda_d_1";
150							};
151							default_cfg {
152								pins = "GPIO40_J15",
153									"GPIO41_J14";
154								input-enable;
155								bias-pull-down;
156							};
157						};
158					};
159					resethw {
160						resethw_default_mode: resethw_default {
161							default_mux {
162								function = "resethw";
163								groups = "resethw_d_1";
164							};
165							default_cfg {
166								pins = "GPIO52_D16";
167								input-enable;
168								bias-pull-down;
169							};
170						};
171					};
172					service {
173						service_default_mode: service_default {
174							default_mux {
175								function = "service";
176								groups = "service_d_1";
177							};
178							default_cfg {
179								pins = "GPIO53_D15";
180								input-enable;
181								bias-pull-down;
182							};
183						};
184					};
185					/*
186					 * Clock output pins associated with regulators.
187					 */
188					sysclkreq2 {
189						sysclkreq2_default_mode: sysclkreq2_default {
190							default_mux {
191								function = "sysclkreq";
192								groups = "sysclkreq2_d_1";
193							};
194							default_cfg {
195								pins = "GPIO1_N4";
196								input-enable;
197								bias-disable;
198							};
199						};
200						sysclkreq2_sleep_mode: sysclkreq2_sleep {
201							default_mux {
202								function = "gpio";
203								groups = "gpio1_a_1";
204							};
205							default_cfg {
206								pins = "GPIO1_N4";
207								input-enable;
208								bias-pull-down;
209							};
210						};
211					};
212					sysclkreq4 {
213						sysclkreq4_default_mode: sysclkreq4_default {
214							default_mux {
215								function = "sysclkreq";
216								groups = "sysclkreq4_d_1";
217							};
218							default_cfg {
219								pins = "GPIO3_P5";
220								input-enable;
221								bias-disable;
222							};
223						};
224						sysclkreq4_sleep_mode: sysclkreq4_sleep {
225							default_mux {
226								function = "gpio";
227								groups = "gpio3_a_1";
228							};
229							default_cfg {
230								pins = "GPIO3_P5";
231								input-enable;
232								bias-pull-down;
233							};
234						};
235					};
236				};
237			};
238		};
239	};
240};
241